Voltage Detection Research Articles

Quench Detection Design for CFETR CSMC

The Central Solenoid Model Coils (CSMC) project (2014 to 2018), a part of the National Magnetic Confinement Fusion Science Program, is being developed by China independently under one of the largest research and development activities of the China Fusion Engineering Test Reactor (CFETR), demonstrating and validating the engineering design criteria of the CFETR central solenoid (CS) coil. The expected achievement is to charge the coil up to the operation current of 47.3 kA and the maximum magnetic field to 12 T with a swift rump rate of 1.5 T/s without quench. The quench detection shall be fast enough to dump out the magnetic energy and avoid irreversible damage to the systems. It is expected to provide the validation of design and analysis tools and the demonstration of quench analysis methods in the quench detection of the CFETR CS and the poloidal field (PF) magnet system.Quench detection by voltage measurements is likely to be the fastest available technical solution, but the voltage detection is a real challenge due to large noise induced by the power supply in alternating current operation. Specific solutions have been proposed for the voltage compensation to effectively reduce the large inductive components from the measured voltage to a certain level. In 2016, the conception design was completed and adopted after the domestic and foreign experts review. This technical note gives an overall view of the quench detection design applied to the CSMC and its numerical results developed, including the classical hot-spot criterion, the quench propagation study, the quench detection parameter settings using the commercial code Supermagnet, and the estimation of the inductive disturbances.

Design and Modeling of Single-Phase PV-UPQC Scheme for Power Quality Improvement Utilizing a Novel Notch Filter-Based Control Algorithm: An Experimental Approach

This paper deals with grid integration of photovoltaic systems through single-phase unified power quality conditioner (PV-1UPQC) based on notch filter novel control algorithm for its function such as better phase detection, voltage sag/swell, voltage unbalance, voltage and current harmonics eliminations. A notch filter-based control algorithm includes a phase-locked loop (PLL) mechanism which is responsible to avoid multiple zero crossing at the time of highly distorted grid voltage detection. Notch filter PLL-based control algorithm is applied to both series and shunt inverters of PV-tied UPQC. In addition to normalizing voltage and current perturbations, proposed controller has feature of phase detection and perfect grid synchronization. Synchronous reference d-q frame controller and unit vector control algorithm with conventional PLL is also studied, utilized and evaluated for control of PV-1UPQC. Hardware setup is developed in laboratory using DS1103 dSPACE processor. Performance and efficiency of PV-1UPQC are analyzed through simulation and experimentation for various operating conditions.

Modeling of an Uncooled CMOS THz Thermal Detector With Frequency-Selective Dipole Antenna and PTAT Temperature Sensor

A thermal THz detector based on commercial CMOS technology working in room temperature is proposed. The THz electromagnetic wave is first selectively absorbed by an on-chip λ/4 dipole antenna realized in the metallization layer. The absorbed wave energy is then converted to Joule heat energy via a polysilicon resistor. The heat-generated temperature rise is finally detected by a proportional to absolute temperature sensor. The theoretical analysis and physical modeling of the detector including the mechanism of the electromagnetic energy absorption, the thermal conversion, and the electrical circuit response, are presented. The detectors at three typical THz frequencies of 1, 2.9, and 28.3 THz are designed in standard 0.18-μm CMOS technology and post-simulated to illustrate the detector's frequency-selective capability in the whole THz range. The simulated detector's voltage responsivity is 18.0 V/W at 1 THz, 18.9 V/W at 2.9 THz, and 18.6 V/W at 28.3 THz, respectively. The noise equivalent power is 1.7 μW/√Hz at the three frequencies.

Application of digital signal processing tools for the detection of voltage sag/swell

Electrical engineering education textbooks usually restrict the linking between theory and practical work in power quality problems, such as voltage sag/swell. This paper presents a mathematic model of the power signal and digital signal processing tools, such as Kalman filter and wavelet transform, for analysis and detection of voltage sag/swell. Aiming at education and teaching in electrical power quality courses, M files for Kalman filter and wavelet transform in the Matlab program are introduced to record and track the waveform distortion with harmonics, voltage sag or a pulse, which allow students to simulate the effect of voltage sag and to see immediately the advantages and limitations of these two techniques for power quality problems.

A novel safety anticipation estimation method for the aerial lithium-ion battery pack based on the real-time detection and filtering

Abstract Lithium-ion battery packs have become increasingly important for power supply applications, in which the state of charge estimation and output voltage tracking should be very critical for the safety protection. A novel real-time estimation method is proposed by using the improved extended Kalman filtering algorithm together with the two-order resistance and capacitance circuit network battery model, aiming to solve its security protection issues. Experimental results show that this method can track the voltage signals effectively along with the real-time state estimation in the discharging and charging maintenance operation processes. The battery cell voltage detection accuracy is found to be 1.00 mV and the pack voltage measurement error is less than 20.00 mV. Meanwhile, the state of charge value can be estimated with a great accuracy of 2.00%, in which the state of balance parameter is considered for the internal connected battery cells. The developed experimental associated battery management system can be used for the working state monitoring in the aerial power supply application of the lithium-ion battery pack.

Development of hardware and software for calculation and monitoring of the unbalance factor in three­phase voltage system

Hardware and software for measuring and monitoring the unbalance factor of the three-phase voltage system is developed. The shortcomings of the existing technical and software solutions for calculating the unbalance factor, as well as problems of applying the methods used for analog control systems to digital systems are described. The block diagram of the microprocessor system for measuring the voltage unbalance factor in the ship three-phase network with the effective values of phase voltages is used. The analysis of the analytical expressions to calculate the unbalance factor allowed minimizing the utilization of system hardware necessary for the formation of all necessary signals. The optimized structure of the digital filter to calculate the effective value of the deterministic periodic signal at the optimum speed of a discrete system is proposed. An increase in the sampling rate in the optimized filter structure does not lead to an increase in the number of arithmetic operations of addition and multiplication, which is an advantage of the proposed system in comparison with similar ones. This allows monitoring of instantaneous changes in the unbalance factor of three-phase voltage and enables the system to operate in real time. The developed hardware and software can be integrated into the automated control system of the power plant and used in voltage control systems, as well as for the timely detection of voltage unbalance to protect equipment and prevent violation of normal operation.

A Self-Powered and Flexible Organometallic Halide Perovskite Photodetector with Very High Detectivity.

Flexible and self-powered photodetectors (PDs) are highly desirable for applications in image sensing, smart building, and optical communications. In this paper, a self-powered and flexible PD based on the methylammonium lead iodide (CH3 NH3 PBI3 ) perovskite is demonstrated. Such a self-powered PD can operate even with irregular motion such as human finger tapping, which enables it to work without a bulky external power source. In addition, with high-quality CH3 NH3 PBI3 perovskite thin film fabricated with solvent engineering, the PD exhibits an impressive detectivity of 1.22 × 1013 Jones. In the self-powered voltage detection mode, it achieves a large responsivity of up to 79.4 V mW-1 cm-2 and a voltage response of up to ≈90%. Moreover, as the PD is made of flexible and transparent polymer films, it can operate under bending and functions at 360 ° of illumination. As a result, the self-powered, flexible, 360 ° omnidirectional perovskite PD, featuring high detectivity and responsivity along with real-world sensing capability, suggests a new direction for next-generation optical communications, sensing, and imaging applications.

Luciola

In this paper, we present an approach to realize the levitation of a small object with an embedded electronic circuit. Luciola is a light-emitting particle with a diameter of 3.5mm and a weight of 16.2mg moving in mid-air in a 10.4cm x 10.4cm x 5.4cm space through acoustic levitation using two 40-kHz 17 x 17 ultrasonic transducer arrays placed face-to-face at a distance of 20cm and wirelessly powered by 12.3-MHz resonant inductive coupling. The novelty of this paper is the acoustically levitated electronic object by the combined application of ultrasonic levitation and wireless powering to the levitated electronic object. A new shape of the levitated object and a new placement of the receiver coil to simultaneously realize acoustic levitation and wireless powering are proposed, achieving a stable wireless powering to a rotating levitated object at the bottom of an acoustic potential. To enable the levitation of a particle, a custom IC chip is essential in reducing the size and weight of the particle. In the design of the custom IC chip, a new voltage detector circuit enabling an accurate voltage detection and a correct output during the start-up is proposed to achieve an intermittent lighting of the LED to increase the maximum distance between the transmitter and the receiver coil. Luciola is applied to a self-luminous pixel in a mid-air display and drawings of characters in mid-air are demonstrated.

Study of Non-contact Voltage Detector of 1000kV UHV AC Based on MEMS Electric Field Sensor

This paper expounds the working principle of non-contact voltage detector and the electric field sensor which made by the technology of microelectromechanical systems (MEMS), determined the requirements of the detecting area and the threshold of the detector through simulation, and correct the threshold by carrying out experiments, which shows that by setting the threshold of the detector at 25kV/m, when the detector is 10-15m away from the conductors, or 2m away from the tower toward the conductor at the tower body whereas the same high as the conductor or on the crossarm, the detector can effectively identify whether the conductor is power on or off. The MEMS no-contact voltage detector and the method put forward by this paper can solve the problem of voltage detecting on UHV transmission lines, which has wide popularization and application value.

Submodular Optimization for Voltage Control

Voltage instability occurs when a power system is unable to meet the reactive power demand, and is typically corrected by switching on additional reactive power devices such as capacitor banks. Real-time monitoring and communication technologies can potentially improve voltage stability by enabling the rapid detection of low voltages and the implementation of corrective actions. These corrective actions, however, will only be effective in restoring stability if they are chosen in a timely, scalable manner. In this paper, we propose a submodular optimization approach for designing a control strategy that prevents voltage instability. Our key insight is that the voltage deviation from the desired level is a supermodular function of the set of reactive power injections that are employed, leading to computationally efficient control algorithms for stabilization with provable optimality guarantees. This submodular control framework is tested on the IEEE 300-bus transmission system.

Speeding Up and Parallelizing the GARFIELD++

Garfield++ is a toolkit for the simulation of particle detectors that use gas and semi-conductors as sensitive medium. It takes enormous amount of time to complete the simulation of complex scenarios such as those involving high detector voltages, gases with large gains, or electric field meshes with large number of elements. We observed that most of the simulation time is being consumed in finding the correct element in the electric field mesh. We optimized the element search operation and achieved significant boost in the speed up. In addition, We added the parallel computing support in the toolkit to simulate multiple events simultaneously over multiple machines. In this paper, we present our approach of speeding up the computations and benchmark results.

An improved noise immune level-shifter via IGBT gate-emitter voltage detection [IEICE Electronics Express Vol. 15 (2018) No. 9 pp. 20180293

An improved noise immune level-shifter via IGBT gate-emitter voltage detection [IEICE Electronics Express Vol. 15 (2018) No. 9 pp. 20180293

An improved noise immune level-shifter via IGBT gate-emitter voltage detection

In this paper, a noise rejection circuit for level-shift gate drive ICs is proposed. This circuit is composed of a detection module and a pull down module with good process matching robustness and low circuit complexity. The dv/dt noise is removed by monitoring the interval of the IGBT gate-emitter voltage variation and locking the output logic in the period of the dv/dt noise comes. Spectre simulation has been performed with a 700 V 0.6 um BCD process model to verify the performance of the proposed noise rejection circuit which shows a full removal of 80 V/ns dv/dt noise and only 15 ns increasing in propagation delay time.

Development on electrical system performance test stand for combine harvester

Combine harvester is a large-scale multi-functional agricultural equipment integrating functions of picking, conveying, threshing and separating, and its working mechanism and electrical system are complicated. According to statistics, when the harvesting machinery works in the field, the fault of the electrical system accounts for about 30%, and there are even fire accidents caused by electrical failures. Therefore, the harvester should comprehensively diagnose its electrical system performance before leaving the factory to improve the quality of the combined harvester and reduce the accident rate. In this paper, according to the needs of the detection of the combine harvester production off-line, electrical detection parameters are proposed and an overall plan for the electrical system performance test stand is formulated. The current and voltage detection methods are used to detect the electrical parameters of the whole machine. The starting current curve evaluation method is used to detect the engine startup parameters. In order to verify the feasibility of the test stand, on-site verification tests were carried out on the combine harvester production line, and a comprehensive test was conducted on the detection efficiency, static parameters, and dynamic parameter detection flow of the whole electrical system. Off-line tests show that the test stand can meet the rapid detection requirements of the electrical system of the combined harvester production line, improve the detection efficiency.

Improved single-phase PLL structure with DC-SOGI block on FPGA board implementation

Synchronization block which is used as a part of photovoltaic (PV) inverters control structure has a key impact on connectinginverters with grid. One of the most important parameters in the point of connection PV inverter and grid is phase angle between gridvoltage and inverter current. This angle determines the energy transfer between inverter and grid. Synchronization algorithms havedeveloped for very long time. At first, they were based on zero crossing grid voltage detection, while today complexed synchronizationalgorithms implemented on high performance digital board have been used. One of these synchronization structures is Phase LockedLoop – PLL. In this paper implementation of improved PLL structure is presented. This improved structure is special while it haspossibility of grid parameters estimation even if grid voltage has noise or DC offset. This DC offset from the grid in PLL structureusually entered via measurement and A/D conversion processor or may be generated due to temporary system faults. Appearance ofDC offset in measured grid voltage on the one hand prevents any estimation process of grid parameters and on the other hand alsodegrades reference sine signal at the output of PLL structure in PV inverters. This improved structure is designed in digital form andimplemented on FPGA digital board and experimental results of this implementation are presented. Obtained experimental resultsshow that the proposed PLL structure successfully solves important issue such is presence of DC offset in measured grid voltage.

Sensitive detection of voltage transients using differential intensity surface plasmon resonance system.

This paper describes theoretical and experimental study of the fundamentals of using surface plasmon resonance (SPR) for label-free detection of voltage. Plasmonic voltage sensing relies on the capacitive properties of metal-electrolyte interface that are governed by electrostatic interactions between charge carriers in both phases. Externally-applied voltage leads to changes in the free electron density in the surface of the metal, shifting the SPR position. The study shows the effects of the applied voltage on the shape of the SPR curve. It also provides a comparison between the theoretical and experimental response to the applied voltage. The response is presented in a universal term that can be used to assess the voltage sensitivity of different SPR instruments. Finally, it demonstrates the capacity of the SPR system in resolving dynamic voltage signals; a detection limit of 10mV with a temporal resolution of 5ms is achievable. These findings pave the way for the use of SPR systems in the detection of electrical activity of biological cells.

Digital Control for a PV Powered BLDC Motor

Stand-alone applications of Photovoltaic (PV) can be found in water pumping systems for rural area. The proper electric motor must be chosen for optimal considerations. One of the modern electric motor called brushless motor (BLDC) can be an alternative for this application although it has complexity in control. Powering such a motor by using electric energy generating by PV modules will be an interesting problem. In this paper, a PV powered BLDC motor system is proposed. The PV modules must produce maximum power at any instant time and then this power must be able to rotate the motor. By combining sequential stator energizing due to a rotor detection and a PWM concept, the speed of BLDC can be controlled. Meanwhile, to get maximum power of PV modules, detection of voltage and current of the modules are required to be calculated. Digital Signal Control (DSC) is implemented to handle this control strategy and locks the width of the PWM signal to maintain the PV modules under maximum power operation. The effectiveness of the proposed system has been verified by simulation works. Finally the experimental works were done to validate.

Research on Control System of Three - phase Brushless DC Motor for Electric Vehicle

In order to study the three-phase brushless motor control system of electric vehicle, Freescale9S12XS128 chip is used as the control core, and the power MOSFET is used as the inverter device. The software is compiled by Codewarrior software. The speed control link adopts open-loop control, and the control chip collects the external sensor signal voltage Change control PWM signal output control three-phase brushless DC motor speed. The whole system consists of Hall position detection module, current detection module, power drive module and voltage detection module. The basic functions of three-phase brushless DC motor drive control are realized.

An automatic gain control circuit to improve ECG acquisition

Abstract Introduction Long-term electrocardiogram (ECG) recordings are widely employed to assist the diagnosis of cardiac and sleep disorders. However, variability of ECG amplitude during the recordings hampers the detection of QRS complexes by algorithms. This work presents a simple electronic circuit to automatically normalize the ECG amplitude, improving its sampling by analog to digital converters (ADCs). Methods The proposed circuit consists of an analog divider that normalizes the ECG amplitude using its absolute peak value as reference. The reference value is obtained by means of a full-wave rectifier and a peak voltage detector. The circuit and tasks of its different stages are described. Results Example of the circuit performance for a bradycardia ECG signal (40bpm) is presented; the signal has its amplitude suddenly halved, and later, restored. The signal is automatically normalized after 5 heart beats for the amplitude drop. For the amplitude increase, the signal is promptly normalized. Conclusion The proposed circuit adjusts the ECG amplitude to the input voltage range of ADC, avoiding signal to noise ratio degradation of the sampled waveform in order to allow a better performance of processing algorithms.

A readout circuit with cell output slew rate compensation for 5T single-ended 28 nm CMOS SRAM

A readout circuit with slew rate compensation for nano-scaled SRAMs (Static Random-Access Memory) is proposed in this study. Since the leakage current will dramatically increase to jeopardize memory read/write performance when the nano-scaled SRAM is operated at high system voltages, the proposed AVD (Adaptive Voltage Detector) is utilized to detect the system voltage variation to resolve this issue. When AVD generates an enable signal to WLBC (Word Line Boost Circuit), WLBC will boost wordline voltage to drive the SRAM cell such that the output slew rate is increased. Therefore, the active power of the SRAM will be reduced. A prototypical SRAM is implemented using TSMC 28 nm CMOS logic low power technology. By measurement results at 0.8 V system voltage, the proposed compensation design reduces 17.2% of the power dissipation, and enhances the output slew rate by 46.5% at the expense of 6.6% area overhead. The energy per access is measured to be 0.414 pJ given a 0.8 V system voltage and 100 MHz system clock.