The challenge of achieving a balanced capacitor voltage is one of the factors affecting the efficient operation of modular multilevel converters (MMC). This paper investigates this challenge through a proposed method that utilizes a high carrier frequency phase-shifted pulse width modulation (PS-PWM) scheme. This method aims to achieve natural balancing without the need for any additional control mechanisms. Moreover, the number of output voltage levels is affected by the phase shift between the carriers of the upper and lower arms. When there is no phase shift, N<sup>+1</sup> discrete levels are achieved, but when there is a phase shift, the number of discrete levels increases to 2<sup>N+1</sup>. The proportional-resonant (PR) controller and moving average filter (MAF) are employed to decrease the capacitor voltage ripples by suppressing the fourth and second harmonics in the circulating currents. The MMC inverter structure is modeled and simulated in the PLECS and MATLAB/Simulink environments to evaluate the impact of this control scheme on the converter’s performance.
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