Virtual Cut-through Switching Research Articles

A novel reconfigurable router for QoS guarantees in real-time NoC-based MPSoCs

Abstract This paper presents a proposal and implementation of a multi-mode full-reconfigurable router for Network-on-Chip (NoC). First, the router supports a hybrid packet-switching architecture that is dynamically reconfigurable to exchange between wormhole and virtual cut-through switching schemes at run-time. Therefore, it reaches a higher average performance than wormhole switching, while decreasing the implementation cost in comparison with the virtual cut-through switching. Second, the router is equipped a Quality-of-Services (QoS)-driven arbiter. Therefore, the proposed solution not only guarantees the guaranteed-throughput service without reserving resources but also enhances the average performance for the best-effort service by using network resources efficiently based on the priority inheritance arbitration mechanism. Third, the router is enhanced with the dynamically deadline-aware rerouting mechanism. In contention situation, the router can configure the routing computation unit to reroute the packet to another path so as to reduce the waiting interval of the blocked packets. The router was designed at the Register Transfer Level and modeled using VHDL language and then synthesized with Xilinx Virtex-7 FPGA technology. The experimental results prove that the proposed router is reliable and can improve the average performance of different QoS loads significantly compared with the generic routers while the area and power overhead are acceptable.

An Efficient Hybrid-Switched Network-on-Chip for Chip Multiprocessors

Chip multiprocessors (CMPs) require a low-latency interconnect fabric network-on-chip (NoC) to minimize processor stall time on instruction and data accesses that are serviced by the last-level cache (LLC). While packet-switched mesh interconnects sacrifice performance of many-core processors due to NoC-induced delays, existing circuit-switched interconnects do not offer lower network delays as they cannot hide the time it takes to set up a circuit. To address this problem, this work introduces CIMA—a hybrid circuit-switched and packet-switched mesh-based interconnection network that affords low LLC access delays at a small area cost. CIMA uses virtual cut-through (VCT) switching for short request packets, and benefits from circuit switching for longer, delay sensitive response packets. While a request is being served by the LLC, CIMA attempts to set up a circuit for the corresponding response packet. By the time the request packet is served and the response gets ready, a circuit has already been prepared, and as a result, the response packet experiences short delay in the network. A detailed evaluation targeting a 64-core CMP running scale-out workloads reveals that CIMA improves system performance by 21 percent over the state-of-the-art hybrid circuit-packet-switched network.

A single-cycle output buffered router with layered switching for Networks-on-Chips

We present a single-cycle output buffered router based on layered switching for networks on chips (NoCs). Different from state-of-the-art NoC routers, the router has three important characteristics: (1) It employs layered switching, which implements wormhole on top of virtual cut-through (VCT) switching; (2) In contrast to input buffered architectures, it adopts an output buffered architecture; (3) It is single cycle, meaning that the router pipeline takes only one cycle for all flits. Experimental results show that the router achieves up to 80% of ideal network throughput under uniform random traffic pattern. Compared with wormhole switching, layered switching achieves up to 36.9% latency reduction for 12-flit packets under uniform random traffic with an injection rate of 0.5 flit/cycle/node. Under 65nm technology synthesized results show that its critical path has only 20 logic gates, and it reduces 11% area compared to the input virtual-channel router with the same buffer capacity.

An Effective Design of Deadlock-Free Routing Algorithms Based on 2D Turn Model for Irregular Networks

System area networks (SANs), which usually accept arbitrary topologies, have been used to connect hosts in PC clusters. Although deadlock-free routing is often employed for low-latency communications using wormhole or virtual cut-through switching, the interconnection adaptivity introduces difficulties in establishing deadlock-free paths. An up*/down* routing algorithm, which has been widely used to avoid deadlocks in irregular networks, tends to make unbalanced paths as it employs a one-dimensional directed graph. The current study introduces a two-dimensional directed graph on which adaptive routings called left-up first turn (L-turn) routings and right-down last turn (R-turn) routings are proposed to make the paths as uniformly distributed as possible. This scheme guarantees deadlock-freedom because it uses the turn model approach, and the extra degree of freedom in the two-dimensional graph helps to ensure that the prohibited turns are well-distributed. Simulation results show that better throughput and latency results from uniformly distributing the prohibited turns by which the traffic would be more distributed toward the leaf nodes. The L-turn routings, which meet this condition, improve throughput by up to 100 percent compared with two up*/down*-based routings, and also reduce latency

Comparing four classes of torus-based parallel architectures: Networkparameters and communication performance

The relative communication performance of low- versus high-dimensional torus networks ( k-ary n-cubes) has been extensively studied under various assumptions about communication patterns and technological constraints. In this paper, we extend the comparison to torus networks with incomplete, but regular, connectivities. Taking an nD torus as the basis, we show that a simple pruning scheme can be used to reduce the node degree from 2 n to 4, while preserving many of the desirable properties of the intact network. Orienting the torus links (removing half of the channels) provides a second form of pruning that leads to (multidimensional) Manhattan street networks. Finally, combined pruning and orientation yields the fourth class of toroidal networks studied here. We compare the static performance parameters of these networks and evaluate their dynamic communication performance under the assumptions of virtual cut-through switching and constant pin count. The 3D case, leading to networks that are efficiently realizable with current technology, is used to demonstrate and quantify the performance benefits. Our results reinforce, extend, and complement previous studies that have demonstrated the performance advantages of low-dimensional k-ary n-cubes over higher-dimensional ones. For example pruned 3D tori provide additional design points that fall between 2D and 3D tori in terms of implementation complexity but can outperform both of these standard architectures. Thus, from a practical standpoint, pruning introduces additional flexibility in implementation options and trade-offs available to designers.

A new adaptive hardware tree-based multicast routing in k-ary n-cubes

Multicast communication is a key issue in almost all applications that run on any parallel architecture and, hence, efficient implementation of multicast is critical to the performance of multiprocessor machines. Multicast is implemented in parallel architectures either via software or via hardware. Software-based approaches for implementing multicast can result in high message latencies, while hardware-based schemes can greatly improve performance. Deadlock freedom in multicast communication is much more difficult to achieve resulting in more involved routing algorithms and higher startup delays. Hardware tree-based algorithms do not require these high startup delays, but do suffer from high probabilities of message blocking leading to poor performance. In this paper, we propose a new hardware tree-based routing algorithm (HTA) for multicast communication under virtual cut-through switching in k-ary n-cubes that outperforms existing software and hardware path-based multicast routing schemes. Simulation results are compared against several commonly used multicast routing algorithms and show that HTA performs extremely well under many different conditions.

Software-based rerouting for fault-tolerant pipelined communication

This paper presents a software-based approach to fault-tolerant routing in networks using wormhole or virtual cut-through switching. When a message encounters a faulty output link, it is removed from the network by the local router and delivered to the messaging layer of the local node's operating system. The message passing software can reroute this message, possibly along nonminimal paths. Alternatively, the message may be addressed to an intermediate node, which will forward the message to the destination. A message may encounter multiple faults and pass through multiple intermediate nodes. The proposed techniques are applicable to both obliviously and adaptively routed networks. The techniques are specifically targeted toward commercial multiprocessors where the mean time to repair (MTTR) is much smaller than the mean time between router failures (MTBF), i.e., it is sufficient to tolerate a maximum of three failures. This paper presents requirements for buffer management, deadlock freedom, and livelock freedom. Simulation results are presented to evaluate the degradation in latency and throughput as a function of the number and distribution of faults. There are several advantages of such an approach. Router designs are minimally impacted, and thus remain compact and fast. Only messages that encounter faulty components are affected, while the machine is ensured of continued operation until the faulty components can be replaced. The technique leverages existing network technology, and the concepts are portable across evolving switch and router designs. Therefore, we feel that the technique is a good candidate for incorporation into the next generation of multiprocessor networks.

A router architecture for flexible routing and switching in multihop point-to-point networks

Modern parallel and distributed applications have a wide range of communication characteristics and performance requirements. These diverse characteristics affect the performance and suitability of particular routing and switching policies in multihop point-to-point networks. In this paper, we identify a core set of architectural features necessary for flexible selection and implementation of multiple routing and switching schemes. Using this, we present a flexible router whose routing and switching policies can be tailored to the application, allowing the network to meet these diverse needs. By dedicating a small programmable processor to each incoming link, we can implement wormhole, virtual cut-through, and packet switching, as well as hybrid switching schemes, each under a variety of unicast and multicast routing algorithms. In addition, a flexible router can support several applications or traffic types simultaneously, enabling better support of applications with multiple traffic classes. We have designed, implemented, and fabricated the Programmable Routing Controller (PRG). Cycle-level simulations of mesh-connected PRCs also demonstrate that flexible routing and switching can significantly enhance application performance.

Delivery time analysis of a low Earth orbit satellite network for seamless PCS

The message delivery time on a low Earth orbit (LEG) satellite network is analyzed. The LEO network is assumed to be seamless and virtual cut-through switching is proposed for use. Equations to calculate the message delivery time and the probability of a message being delivered successfully using no more than a time delay bound for LEO networks, varying in size and connectivity, are derived. The message delivery times of different LEO networks, varying in network connectivity, are compared. Numerical examples show that with the probability of successful delivery =0.99 and the probability of cut-through =0.5, an 8/spl times/8 LEO network with six crosslinks per node can deliver messages 40% faster than with four crosslinks per node for communicating satellites, separated by D hops, where D is the network diameter. >

Traffic routing for multicomputer networks with virtual cut-through capability

The problem of selecting routes for interprocess communication in a network with virtual cut-through capability while balancing the network load and minimizing the number of times that a message gets buffered is addressed. The approach taken is to formulate the route selection problem as a minimization problem, with a link cost function that depends upon the traffic through the link. The form of this cost function is derived based on the probability of establishing a virtual cut-through route. It is shown that this route selection problem is NP-hard, and an approximate algorithm is developed which tries to incrementally reduce the cost by rerouting traffic. The performance of this algorithm is evaluated for the hypercube and the C-wrapped hexagonal mesh, example networks for which virtual cut-through switching support has been developed. >

Performance of multicomputer networks under pin-out constraints

When the performance of multiprocessor or multicomputer interconnection networks is modeled in the literature, it is usually assumed that communication links have a channel wide enough to accommodate the entire message so that switch-to-switch transfers can take place in one cycle. In practice, however, the channel width is constrained by real-world considerations. These constraints impact on the choice of network topology and mandate more sophisticated switching technologies. In this paper, we evaluate the performance of the family of multidimensional mesh topologies (which includes the hypercube) under the constant pin-out constraint. We assign a channel width to each system so that the product of the node degree and the channel width is constant and then analyze the stochastic performance of these systems using three schemes: message switching, virtual cut-through switching, and partial cut-through switching. Our analyses are more accurate than those appearing in the literature, and the results show that under the constant pin-out constraint, higher dimensionality is more important than wider channel width.

Performance analysis of virtual cut-through switching in HARTS: a hexagonal mesh multicomputer

The authors present a formal analysis of virtual cut-through in a C-wrapped hexagonal mesh multicomputer, called the HARTS (hexagonal architecture for real-time systems). In virtual cut-through, packets arriving at an intermediate node are forwarded to the next node in the route without buffering if a circuit can be established to the next node. The hexagonal mesh is first characterized using a combinatorial analysis to determine the probability that a packet will establish a cut-through at an intermediate node. Given this parameter the probability distribution function for packet delivery times in HARTS is derived. The delivery times obtained from the analytic model are then compared against results collected from a simulator of the routing hardware designed for use in HARTS. The results from both the analytic model and the simulator further reinforce the choice of the virtual cut-through routing scheme for use in HARTS. >

Local rerouting with virtual cut-through switching

The ‘virtual cut-through switching’ method of message transmission in computer communication is modified to achieve further reduction of message transmission delays. A local rerouting feature is also added, so that this ‘modified cut-through switching’ method sustains the ability to adjust the message transmission path in the face of fast fluctuations in traffic-flow conditions. The hardware architecture for the implementation of this method is also presented.

Window flow control in computer communication networks

Computer communication networks are basically resource sharing systems and are used for an efficient exchange of information among remote users. Performance (throughput, delay and power) of a computer network depends upon the intensity of data and/or information traffic. If a network's traffic is allowed to increase beyond certain limits, its performance rapidly degrades. In order to keep data traffic under control, some restrictions are applied at various levels of computer communication networks. These restrictions are usually referred to as flow control techniques. This paper deals with window (also called end-to-end or entry-to-exit) flow control in computer communication networks. In this method, a source node is allowed to have only a limited number of unacknowledged messages, usually termed as “window size”, at a time. Flow control, in this paper, is discussed in the context of three computer communication switching techniques: packet switching, virtual cut-through switching and quasi cut-through switching. The analysis of window flow control is based upon simulation of a typical store-and-forward computer network. Several simulation results are presented to illustrate the effects of window flow control on various computer communication switching techniques.

Towards performance improvement of cut-through switching in computer networks

‘Virtual cut-through’ is a relatively new computer communication switching technique. In this switching technique, messages traveling through a network need not wait and be error-checked at all intermediate nodes. A node which is found to be free is effectively bypassed by a message. The message in this case is said to have performed a cut at that node. As messages are not error-checked (and not stored) at all nodes, retransmission of an erroneous message is requested from a node where the message was last error-checked (and stored). Hence, a retransmitted message will again pass through those nodes where it had performed cuts. Therefore, this technique tends to increase the network's traffic intensity and, hence, the average network delay per message. In this paper, an improved version of virtual cut-through switching is proposed and analyzed. According to this method, a message is error-checked at every node irrespective of whether or not a cut is performed. Here, retransmission of an erroneous message is always requested from a node preceding the one where error was detected. The method is shown to be helpful in reducing the network delay per message. Several numerical results are presented in order to compare the original and improved versions of virtual cut-through switching.