Virtual Clock Research Articles

Object Motion Manipulation and time perception in virtual reality

This paper presents a novel approach to altering how time is perceived in Virtual Reality (VR). It involves manipulating the speed and pattern of motion in objects associated with timekeeping, both directly (such as clocks) and indirectly (like pendulums). Objects influencing our perception of time are called ‘zeitgebers‘; for instance, observing a clock or pendulum tends to affect how we perceive the passage of time. The speed of motion of their internal parts (clock hands or pendulum rings) is explicitly or implicitly related to the perception of time. However, the perceptual effects of accelerating or decelerating the speed of a virtual clock or pendulum in VR is still an open question. We hypothesize that the acceleration of their internal motion will accelerate the passage of time and that the irregularity of the orbit pendulum’s motion will amplify this effect. We anticipate that the irregular movements of the pendulum will lower boredom and heighten attention, thereby making time seem to pass more quickly. Therefore, we conducted an experiment with 32 participants, exposing them to two types of virtual zeitgebers exhibiting both regular and irregular motions. These were a virtual clock and an orbit pendulum, each operating at slow, normal, and fast speeds. Our results revealed that time passed by faster when participants observed virtual zeitgebers in the fast speed condition than in the slow speed condition. The orbit pendulum significantly accelerated the perceived passage of time compared to the clock. We believe that the irregular motion requires a higher degree of attention, which is confirmed by the significantly longer gaze fixations of the participants. These findings are crucial for time perception manipulation in VR, offering potential for innovative treatments for conditions like depression and improving wellbeing. Yet, further clinical research is needed to confirm these applications.

Proposal for a realtime Einstein-synchronization-defined satellite virtual clock

Abstract The realization of high performance satellite onboard clock is vital for various PNT applications. For further improvement of the synchronization-based satellite time and frequency references, this paper proposes a geosynchronous (GEO) satellite virtual clock concept based on ground–satellite synchronization and presents a beacon transponder structure for its implementation (scheduled for launch in 2025), which does not require atomic clocks to be mounted on the satellite. Its high performance relies only on minor modifications to the existing transponder structure of GEO satellites. We carefully modeled the carrier phase link and analyzed the factors causing link asymmetry within the special relativity. Considering that the performance of such synchronization-based satellite clocks is primarily limited by the link’s random phase noise, which cannot be adequately modeled, we designed a closed-loop experiment based on commercial GEO satellites for pre-evaluation. This experiment was aimed at extracting the zero-means random part of the ground-satellite Ku-band carrier phase via a feedback loop. Ultimately, we obtained a 1σ value of 0.633 ps (two-way link), following the Gaussian distribution. From this result, we conclude that the proposed real-time Einstein-synchronization-defined satellite virtual clock can achieve picosecond-level replication of onboard time and frequency.

Performance Evaluation of Spintronic-Based Spiking Neural Networks using Parallel Discrete-Event Simulation

Spintronics devices that use the spin of electrons as the information state variable have the potential to emulate neuro-synaptic dynamics and can be realized within a compact form-factor, while operating at ultra-low energy-delay point. In this paper, we benchmark the performance of a spintronics hardware platform designed for handling neuromorphic tasks. To explore the benefits of spintronics-based hardware on realistic neuromorphic workloads, we developed a Parallel Discrete-Event Simulation model called Doryta, which is further integrated with a materials-to-systems benchmarking framework. The benchmarking framework allows us to obtain quantitative metrics on the throughput and energy of spintronics-based neuromorphic computing and compare these against standard CMOS-based approaches. Although spintronics hardware offers significant energy and latency advantages, we find that for larger neuromorphic circuits, the performance is limited by the interconnection networks rather than the spintronics-based neurons and synapses. This limitation can be overcome by architectural changes to the network. Through Doryta we are also able to show the power of neuromorphic computing by simulating Conway’s Game of Life (GoL), thus showing that it is Turing complete. We show that Doryta obtains over 300 × speedup using 1,024 CPU cores when tested on a convolutional, sparse, neural architecture. When scaled-up 64 times, to a 200 million neuron model, the simulation ran in 3:42 minutes for a total of 2000 virtual clock steps. The conservative approach of execution was found to be faster in most cases than the optimistic approach, even when a tie-breaking mechanism to guarantee deterministic execution, was deactivated.

A redundant subspace weighting procedure for clock ensemble

Abstract A redundant-subspace-weighting (RSW) based approach is proposed to enhance the frequency stability of the time scale of a clock ensemble. In this approach, multiple overlapping subspaces are constructed in the clock ensemble, and the weight attributed to each clock in this ensemble is defined using the spatial covariance matrix. Superimposition averaging of different subspace covariances somewhat reduces the correlations between clocks located in the same laboratory. After optimizing the parameters of this weighting procedure, the frequency stabilities of virtual clock ensembles are significantly improved in most cases.

Neural network-based Bluetooth synchronization of multiple wearable devices

Bluetooth-enabled wearables can be linked to form synchronized networks to provide insightful and representative data that is exceptionally beneficial in healthcare applications. However, synchronization can be affected by inevitable variations in the component’s performance from their ideal behavior. Here, we report an application-level solution that embeds a Neural network to analyze and overcome these variations. The neural network examines the timing at each wearable node, recognizes time shifts, and fine-tunes a virtual clock to make them operate in unison and thus achieve synchronization. We demonstrate the integration of multiple Kinematics Detectors to provide synchronized motion capture at a high frequency (200 Hz) that could be used for performing spatial and temporal interpolation in movement assessments. The technique presented in this work is general and independent from the physical layer used, and it can be potentially applied to any wireless communication protocol.

New timestamp mark–based energy efficient time synchronization method for wireless sensor networks

Aimed at the demands of wireless sensor networks for high energy-efficient time synchronization, the reduction of synchronization energy consumption is studied from the aspects of both accurate timestamps marking and synchronous information transmission mechanism. First, the network is divided into several parent–child groups periodically. The group-wise pair selection algorithm is used to select the network’s pairwise synchronization nodes, and chain-type network topology is thus generated. Second, the sequential multi-hop synchronization algorithm is introduced to realize the synchronization information exchange among pairwise synchronization nodes. The overhearing synchronization (OS) nodes obtain the synchronization information packet based on a one-way overhearing mechanism. Moreover, the accurate acquisition of the synchronization ack packet’s timestamp is carried out through the use of receiving-time-plus-fixed-delay mode. Third, the joint maximum likelihood method and the minimum variance unbiased estimation method are used to estimate the clock offsets of pairwise synchronization nodes and overhearing nodes to the parent nodes, respectively, based on which the child nodes adjust their local virtual clocks. Periodically, the pairwise synchronization nodes initiate the network’s time synchronization, estimate, and broadcast the relative offset to the gateway node, assisting the upper layer child nodes in synchronizing to the gateway node. Simulation results show that the proposed method not only achieves the millisecond level synchronization accuracy but also reduces the synchronization energy consumption and thus improves the network lifetime.

Research on Global Clock Synchronization Mechanism in Software‐Defined Control Architecture

Adopt software-definition technology to decouple the functional components of the industrial control system (ICS) in a service-oriented and distributed form is an important way for the industrial Internet of things to integrate information technology, communication technology, and operation technology. Therefore, this paper presents the concept of software-defined control architecture and describes the time consistency requirements under the paradigm shift of ICS architecture. By analyzing the physical clock and virtual clock mechanism models, the global clock synchronization space is logically divided into the physical and virtual clock synchronization domains, and a formal description of the global clock synchronization space is proposed. According to the fundamental analysis of the clock state model, the physical clock linear filtering synchronization model is derived, and a distributed observation fusion filtering model is constructed by considering the two observation modes of the virtual clock to realize the time synchronization of the global clock space by way of timestamp layer-by-layer transfer and fusion estimation. Finally, the simulation results show that the proposed model can significantly improve the accuracy and stability of clock synchronization.

Continuous-Variable Quantum Key Distribution Without Synchronized Clocks

It is well known that accurate clock synchronization is the backbone of quantum information processing tasks. Continuous-variable quantum key distribution (CV QKD), when proposed, benefited from its natural synchronization signals, i.e., local oscillator (LO), which provides a precise and automatic clock synchronization without a special clock board. The application of LO, however, incurs security loopholes, exposing the system to the risk of being attacked. We resolve this unsafe synchronization by proposing a virtual clock synchronization method for the CV QKD protocol without sending a real LO. The proposed method, which is based on the interpolation algorithm, extracts the clock information from the measured quadrature of the quantum signal rather than the classical LO. By formulating the measured quadrature as the synchronization signal, Bob recovers the clock information without both security loopholes and a specific clock board. Numerical results test the robustness of our method and show its potential in a real CV QKD implementation.

Mechanisms for Precise Virtual Time Advancement in Network Emulation

Network emulators enable rapid prototyping and testing of applications. In a typical emulation, the execution order and process execution burst lengths are managed by the host platform’s operating system, largely independent of the emulator. Timerbased mechanisms are typically used, but the imprecision of timer firings introduces imprecision in the advancement of time. This leads to statistical variation in behavior that is not due to the model. This article describes an open-source tool called Kronos, which provides a set of mechanisms for precise instruction-level tracking of process execution and control over execution order of containers, thus improving the mapping of executed behavior to advancement in time. This, and control of execution and placement of emulated processes in virtual time make the behavior of the emulation independent of the CPU resources of the platform that hosts the emulation. Under Kronos each process has its own virtual clock that is advanced based on a count of the number of \( \times \) 86 assembly instructions executed by its children. Two types of instruction counting techniques are discussed: (1) hardware-assisted mechanisms that are transparent to the executing application and (2) binary instrumentation-assisted mechanisms that modify the executing binary. We analyze the overheads associated with each approach and experimentally demonstrate the impact of Kronos’ time advancement precision by comparing it against emulations that, like Kronos, are embedded in virtual time, but unlike Kronos rely on Linux timers to control virtual machines and measure their progress in virtual time. We present two useful applications where Kronos aids in generating high-fidelity emulation results at low hardware costs: (1) analyzing protocol performance and (2) enabling analysis of cyber physical control systems. We also discuss limitations associated with simple linear conversions between instruction counts and ascribed virtual time and develop and evaluate more accurate virtual time conversion models.

Clock Synchronization in Virtualized Distributed Real-Time Systems using IEEE 802.1AS and ACRN

Virtualization of distributed real-time systems enables the consolidation of mixed-criticality functions on a shared hardware platform thus easing system integration. Time-triggered communication and computation can act as an enabler of safe hard real-time systems. A time-triggered hypervisor that activates virtual CPUs according to a global schedule can provide the means to allow for a resource efficient implementation of the time-triggered paradigm in virtualized distributed real-time systems. A prerequisite of time-triggered virtualization for hard real-time systems is providing access to a global time base to VMs as well as to the hypervisor. A global time base is the result of clock synchronization with an upper bound on the clock synchronization precision. We present a formalization of the notion of time in virtualized real-time systems. We use this formalization to propose a virtual clock condition that enables us to test the suitability of a virtual clock for the design of virtualized time-triggered real-time systems. We discuss and model how virtualization, in particular resource consolidation versus resource partitioning, degrades clock synchronization precision. Finally, we apply our insights to model the IEEE~802.1AS clock synchronization protocol and derive an upper bound on the clock synchronization precision of IEEE 802.1AS. We present our implementation of a dependent clock for ACRN that can be synchronized to a grandmaster clock. The results of our experiments illustrate that a type-1 hypervisor implementing a dependent clock yields native clock synchronization precision. Furthermore, we show that the upper bound derived from our model holds for a series of experiments featuring native as well as virtualized setups.

Distributed Virtual Time-Based Synchronization for Simulation of Cyber-Physical Systems

Our world today increasingly relies on the orchestration of digital and physical systems to ensure the successful operations of many complex and critical infrastructures. Simulation-based testbeds are useful tools for engineering those cyber-physical systems and evaluating their efficiency, security, and resilience. In this article, we present a cyber-physical system testing platform combining distributed physical computing and networking hardware and simulation models. A core component is the distributed virtual time system that enables the efficient synchronization of virtual clocks among distributed embedded Linux devices. Virtual clocks also enable high-fidelity experimentation by interrupting real and emulated cyber-physical applications to inject offline simulation data. We design and implement two modes of the distributed virtual time: periodic mode for scheduling repetitive events like sensor device measurements, and dynamic mode for on-demand interrupt-based synchronization. We also analyze the performance of both approaches to synchronization including overhead, accuracy, and error introduced from each approach. By interconnecting the embedded devices’ general purpose IO pins, they can coordinate and synchronize with low overhead, under 50 microseconds for eight processes across four embedded Linux devices. Finally, we demonstrate the usability of our testbed and the differences between both approaches in a power grid control application.

Clock Synchronization in Virtualized Distributed Real-Time Systems Using IEEE 802.1AS and ACRN

Virtualization of distributed real-time systems enables the consolidation of mixed-criticality functions on a shared hardware platform, easing system integration. Time-triggered communication and computation can act as an enabler of safe hard real-time systems. A time-triggered hypervisor that activates virtual CPUs according to a global schedule can provide the means to allow for a resource-efficient implementation of the time-triggered paradigm in virtualized distributed real-time systems. A prerequisite of time-triggered virtualization for hard real-time systems is providing access to a global time base to VMs and the hypervisor. A global time base results from clock synchronization with an upper bound on the clock synchronization precision . We present a formalization of the notion of time in virtualized distributed real-time systems. We use this formalization to propose a virtual clock condition that enables us to test the suitability of a virtual clock for the design of virtualized time-triggered real-time systems focusing on clock synchronization. We discuss and model how virtualization, particularly resource consolidation versus resource partitioning, degrades clock synchronization precision. Finally, we apply our insights to model the IEEE 802.1AS clock synchronization protocol and derive an upper bound on the clock synchronization precision of IEEE 802.1AS in a virtualized distributed real-time system. We present our implementation of a dependent clock for ACRN that can be synchronized to a grandmaster clock. The results of our experiments illustrate that a type-1 hypervisor like ACRN implementing the dependent clock paradigm yields native clock synchronization precision. Furthermore, we show that the upper bound of clock synchronization precision derived from our model holds for a series of experiments featuring native and virtualized setups.

Digital-Twin-Enabled Intelligent Distributed Clock Synchronization in Industrial IoT Systems

Tight cooperation among distributively connected equipment and infrastructures of an Industrial-Internet-of-Things (IIoT) system hinges on low latency data exchange and accurate time synchronization within sophisticated networks. However, the temperature-induced clock drift in connected industry facilities constitutes a fundamental challenge for conventional synchronization techniques due to dynamic industrial environments. Furthermore, the variation of packet delivery latency in IIoT networks hinders the reliability of time information exchange, leading to deteriorated clock synchronization performance in terms of synchronization accuracy and network resource consumption. In this article, a digital-twin-enabled model-based scheme is proposed to achieve an intelligent clock synchronization for reducing resource consumption associated with distributed synchronization in fast-changing IIoT environments. By leveraging the digital-twin-enabled clock models at remote locations, required interactions among distributed IIoT facilities to achieve synchronization is dramatically reduced. The virtual clock modeling in advance of the clock calibrations helps to characterize each clock so that its behavior under dynamic operating environments is predictable, which is beneficial to avoiding excessive synchronization-related timestamp exchange. An edge-cloud collaborative architecture is also developed to enhance the overall system efficiency during the development of remote digital-twin models. Simulation results demonstrate that the proposed scheme can create an accurate virtual model remotely for each local clock according to the information gathered. Meanwhile, a significant enhancement on the clock accuracy is accomplished with dramatically reduced communication resource consumption in networks with different packet delay variations.

Effect of Downscaling the Frequency Offset of Clock Ensemble on the Stability of the Time Scale

Improving the stability of national time scale (TS) is a main target for all time keepers. The stability of TS can be improved by either increasing the number of atomic clocks in the ensemble or by adding clocks of higher stability. In both cases, a large financial budget is needed which may be unaffordable by some developing economics. In this paper, we propose a new method for improving the stability of national TS by a factor approaching 50% with zero expenses by replacing the real clocks in the ensemble by virtual clocks (VCs). The VCs are obtained by downscaling (DS) the frequency offset of the real clocks. The DS process improves the frequency stability of the clocks and hence that of the resultant average TS. Since the downscaled clocks are correlated to the original ones, they replace the real clocks and not added to the ensemble. The performance of the proposed method is verified by applying it on the daily clocks comparison data of the Observatory of Paris (OP) published on the time department server of the Bureau International des Poids et Measures. The performance of the proposed method is compared with that of Kalman filter (KF) method presented in the literature. It is found that the proposed method is simpler and acting as a wider bandwidth de-noising filter than KF method for achieving the same performance.

Strongly Non-Zeno Event-Triggered Wireless Clock Synchronization

Agreeing on a common time is essential to many coordinated tasks in wireless networks, but this is difficult to accomplish when each agent only has access to a local hardware clock. Therefore, clock synchronization is essential in order to carry out many of these coordinated tasks. While there are numerous existing algorithms for clock synchronization, many result in disruptive discontinuous virtual clocks, and most rely on regular communication, which does not scale with large systems. Instead, this paper presents a novel clock synchronization algorithm, which allows for a continuous virtual clock, with a dynamic event-triggered communication strategy which is strongly non-Zeno because it guarantees a designable positive time between communication instances.

Nonconservative Lifted Convex Conditions for Stability of Discrete-Time Switched Systems Under Minimum Dwell-Time Constraint

In this note, a novel conception called virtual clock, which is defined by an artificial timer over a finite cycle, is introduced for stability analysis of discrete-time switched linear systems under minimum dwell-time constraint. Two necessary and sufficient conditions associated with a virtual clock with a sufficient length are proposed to ensure the global uniform asymptotic stability of discrete-time switched linear systems. For the two nonconservative stability criteria, the lifted version maintains the convexity in system matrices. Based on the lifted convex conditions, the extensions to $\ell _2$ -gain computation and $\mathcal {H}_\infty$ control problems are presented in the sequel. In particular, a novel virtual-clock-dependent controller is designed, which outperforms the traditional mode-dependent and common gain controllers. Several numerical examples are provided to illustrate our theoretic results.

Punching the clock: a Foucauldian analysis of teacher time clock use

ABSTRACT This article features a Foucauldian analysis of interview data from a qualitative study of four North Carolina public school teachers who are required to clock in and out of school each day via a virtual time clock. In this article, Michel Foucault’s theories of discourse, discipline, power, and surveillance are brought into dialogue with teachers’ interview responses, and three associated analytic questions drive this article’s analytical exploration: 1.) What discourses are made visible by teachers’ time clock use? 2.) How does time clock use produce forms of subjectivity? 3.) What are these subjectivities? The resulting analysis suggests that the practice of teacher time clock use sustains problematic discourses, produces troubling subject positions, and contributes to the deprofessionalization and subjugation of public school teachers.

Exploration of multilayer field-coupled nanomagnetic circuits

Unlike MOSFET technology, Field-Coupled Nanocomputing (FCN) structures are based upon a completely new computational paradigm. The basic computational element propagates the information through near-field interaction with neighboring elements. The potential of this principle is really promising because of the absence of current flow, leading to low power consumption. Here, we explore the in-plane NanoMagnetic Logic implementation. The analysis of complex circuits highlights the limitations due to their planar structure: mixing logic and interconnections on a single layer leads to an explosion of the circuit area. In this paper, we evaluate whether a 3D implementation of the structure can abruptly reduce the major limitation of the technology. We propose a solution by using a particular clock delivery method, named Virtual Clock. The analysis is carried out through micromagnetic and functional simulations on medium complexity architectures. The results obtained clearly highlight a large improvement in circuit area and power consumption.

Efficient dynamic malware analysis using virtual time control mechanics

Efficient detection of stealthy malware attacks in suspicious files is very challenging as dynamic malware analysis is time consuming. This paper proposes a virtual time control mechanics-based method to overcome the challenge. The proposed method utilizes a modified Xen hypervisor, in which a virtual clock source is generated according to a predefined speed ratio, such that sandbox systems running on the modified hypervisor can be accelerated. Thus, it does not modify operating system kernels nor intercept system function calls, and is therefore compatible with various operating systems. Further, it utilizes an entropy-based measure that adjusts its execution time according to various malware inputs as an early termination criterion. The results of experiments conducted to verify the efficacy of the proposed method indicate that it speeds up the system timer and significantly increases the logged record size by up to 42% or obtains the same log size within a shorter period compared with conventional sandboxes. Thus, the proposed virtual time control mechanics-based method efficiently detects nontrivial anomalous codes that may be neglected by conventional sandboxing techniques.

An Efficient Distributed Traffic Events Generator for Smart Highways

This paper deals with a spatiotemporal traffic events generator for real highway networks. The goal is to use the event generator to test real-time and batch traffic analysis applications. In this context, we represent a highway network as an oriented graph based on the geographic data of the different sensors locations. The traffic is generated based on a socio-cultural calendar using a virtual clock to speed up the simulation process. In order to enable our generator to support the global worldwide highway networks, we propose a dynamic sized distributed architecture based on multi-agent systems. In this platform, we distinguish the physical model based on sensors from the logical model based on an oriented graph. The architecture of the simulator and the results of some of its implementations applied to the Moroccan highway network are presented.