Abstract
Unlike MOSFET technology, Field-Coupled Nanocomputing (FCN) structures are based upon a completely new computational paradigm. The basic computational element propagates the information through near-field interaction with neighboring elements. The potential of this principle is really promising because of the absence of current flow, leading to low power consumption. Here, we explore the in-plane NanoMagnetic Logic implementation. The analysis of complex circuits highlights the limitations due to their planar structure: mixing logic and interconnections on a single layer leads to an explosion of the circuit area. In this paper, we evaluate whether a 3D implementation of the structure can abruptly reduce the major limitation of the technology. We propose a solution by using a particular clock delivery method, named Virtual Clock. The analysis is carried out through micromagnetic and functional simulations on medium complexity architectures. The results obtained clearly highlight a large improvement in circuit area and power consumption.
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