Multilevel inverters are a versatile and powerful technology for applications such as motor drives, high voltage direct current transmission (HVDC), renewable energy systems, and grid-connected applications. As the demand for high-quality, clean energy and low distortion continues to grow, multilevel inverters are preferred over traditional square wave inverters. This paper proposes a generalized 13-level symmetrical topology to meet the power quality requirements. It consists of six DC sources and twelve semiconductor devices. Further, the topology has cascaded to increase the number of levels, but the cost and circuit complexity increase with the number of units. The gate pulses for switches are produced by the nearest-level modulation technique. The performance comparison of the topology with recent literature provides comprehensive information about the novelty of the configuration. The MLI performance parameters are number of switches, number of gates driving circuits, total harmonic distortion (THD), cost function per level (CCPL), total standing voltage (TSV), and efficiency (η). MATLAB/Simulink investigates the proposed topology, and further, to validate its simulation output, the hardware prototype model has been implemented in the laboratory.
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