Variable-length Packets Research Articles

Packet mode and QoS algorithms for buffered crossbar switches with FIFO queuing

The buffered crossbar switch architecture has recently gained considerable research attention. In such a switch, besides normal input and output queues, a small buffer is associated with each crosspoint. Due to the introduction of crossbar buffers, output and input dependency is eliminated, and the scheduling process is greatly simplified. We analyze the performance of switch policies by means of competitive analysis, where a uniform guarantee is provided for all traffic patterns. We assume that each packet has an intrinsic value designating its priority and the goal of the switch policy is to maximize the weighted throughput of the switch. We consider FIFO queueing buffering policies, which are deployed by the majority of today’s Internet routers. In packet-mode scheduling, a packet is divided into a number of unit length cells and the scheduling policy is constrained to schedule all the cells contiguously, which removes reassembly overhead and improves Quality-of-Service. For the case of variable length packets with uniform value density (Best Effort model), where the packet value is proportional to its size, we present a packet-mode greedy switch policy that is 7-competitive. For the case of unit size packets with variable values (Differentiated Services model), we propose a β-preemptive (β is a preemption factor) greedy switch policy that achieves a competitive ratio of 6 + 4β + β 2 + 3/(β − 1). In particular, its competitive ratio is at most 19.95 for the preemption factor of β = 1.67. As far as we know, this is the first constant-competitive FIFO policy for this architecture in the case of variable value packets. In addition, we evaluate performance of β-preemptive greedy switch policy by simulations and show that it outperforms other natural switch policies. The presented policies are simple and thus can be efficiently implemented at high speeds. Moreover, our results hold for any value of the internal switch fabric speedup.

4x4 optical packet switching of asynchronous burst optical packets with a prototype, 4x4 label processing and switching sub-system

We report a prototype, 4x4 (4 input/4 output) label processing and switching sub-system for 10-Gb/s asynchronous burst variable-length optical packets. With the prototype, we perform a 4x4 optical packet switching demonstration, achieving error-free (BER<10(-12)) label processing and switching operation for all possible input/output combinations (16 switching paths) simultaneously. Power consumption and latency of the entire, self-contained sub-system is 83 W (includes fan power) and 300 ns, respectively.

Shared-per-wavelength asynchronous optical packet switching: A comparative analysis

This paper compares four different architectures for sharing wavelength converters in asynchronous optical packet switches with variable-length packets. The first two architectures are the well-known shared-per-node (SPN) and shared-per-link (SPL) architectures, while the other two are the shared-per-input-wavelength (SPIW) architecture, recently proposed as an optical switch architecture in synchronous context only, which is extended here to the asynchronous scenario, and an original scheme called shared-per-output-wavelength (SPOW) architecture that we propose in the current article. We introduce novel analytical models to evaluate packet loss probabilities for SPIW and SPOW architectures in asynchronous context based on Markov chains and fixed-point iterations for the particular scenario of Poisson input traffic and exponentially distributed packet lengths. The models also account for unbalanced traffic whose impact is thoroughly studied. These models are validated by comparison with simulations which demonstrate that they are remarkably accurate. In terms of performance, the SPOW scheme provides blocking performance very close to the SPN scheme while maintaining almost the same complexity of the space switch, and employing less expensive wavelength converters. On the other hand, the SPIW scheme allows less complexity in terms of number of optical gates required, while it substantially outperforms the widely accepted SPL scheme. The authors therefore believe that the SPIW and SPOW schemes are promising alternatives to the conventional SPN and SPL schemes for the implementation of next-generation optical packet switching systems.

First-Fit Scheduling for Multi-Stage Packet Switching Networks

We first propose a First-Fit Scheduling algorithm for a single stage interconnection network. We then classify multi-stage interconnection network in space, such as the 3-stage Clos network, when each spatial stage may allow time domain switching. We examine how scheduling could be performed for these stages for various combinations of space-time switching. The First-Fit algorithm is then extended to a three stage Clos network with scheduling in the first and third stage. Similar to other scheduling algorithms, full loading is achievable, while randomization of input selection is replaced by the use of arrival timing. This distributed algorithm applies to both cases of fixed length versus variable length packets. We simulated the performance for both cases. A case is made that for multi-gigabit per second link speed, variable length packets should be used to simplify scheduling and avoid fragmentation, with acceptable increase in delay.

Exact Optimization Method for an FDL Buffer With Variable Packet Length

This letter proposes an exact and simple method to optimize the fiber lengths of fiber delay line buffers in an asynchronous network with variable packet length. Existing algorithms required considerable calculation, which can be avoided by using the closed-form loss probability expressions we obtained, valid for general traffic conditions.

Advanced Information Technology of Slot-Switching Network Schemes for on All-Optical Variable-Length Packet

Problem statement: The purpose of this paper was to investigate all op tical packet switching, because it was the key to the success of the future Internet. It can meet the stringent bandwidth requirement of future Internet applicatio ns, such as real-time video streaming. Due to the lack of optical Random Access Memory (RAM), however, the all-optical schemes studied in the literature were either not flexible enough to accom modate Internet packets, which were variable-length in nature, or fail to schedule packets at switches to achieve low loss rate. Approach: The aim of this paper was thus to tackle the flexibility and utiliz ation issues in all-optical packet switches, even a t the absence of optical RAM. We approached this paper by first studied a new slotted model for all-optical variable-length packet switching, which was called Variable-length-Packet Fixed-Length Slot (VPFS) switching. Results: We proved by mathematical analysis the theoretical maximum utilizations that can be achieved by the model in two variant schemes. Then we proposed a new scheduling algorithm for shared-fiber-delay-line switches in order to achiev e low loss rate when the utilization approaches the maximum. We justified our design by simulation. In our finding, through mathematical analysis and computer simulation, our proposed switching model and scheduling algorithm can be coupled well to achieve good performance for all-optical packet swi tches. We also found that the selection of the slot size in the network was very critical as it determi ned the transmission overhead and hence the utilization of the all-optical network. Our resear ch limitation depended on slot size. Although a sma ll slot size was critical for high utilization with ou r model, it was not always preferable. It was becau se a small slot size increased the switching and schedul ing complexity at the switch. Thus the selection of an optimum slot size for the network was a compromise between utilization and complexity. Conclusion/Recommendations: A fast scheduling algorithm has been studied in ord er to reduce the scheduling complexity so as to increase the utiliza tion without much penalty. In regard to the practic al implications, the VPFS was a promising model to ful ly utilize the huge capacity of all-optical network s and to accommodate variable-length packets for futu re Internet traffic. With VPFS, the selection of th e slot size was critical, and it was a compromise bet ween the network utilization and scheduling complexity.

On the Maximum Stable Throughput of Tree Algorithms With Free Access

A simple numerical procedure is presented to determine the maximum stable throughput (MST) of various tree algorithms with free access by defining an associated multitype branching process such that the criticality of the branching process corresponds to the stability of the tree algorithm. More precisely, a bisection algorithm is proposed that only requires the computation of the dominant eigenvalue of the expectation matrix of the branching process, the size of which is typically below 20, at each step. Using this novel approach, many existing results on free-access tree algorithms are reproduced without much effort (e.g., channels with/without noise, variable length packets, interference cancellation, etc.). Furthermore, in an almost plug-and-play manner, the MST of the free access equivalent of many existing results on tree algorithms with blocked access is established (e.g., channels with capture, control signals, multireception capabilities, etc.). The method can be applied to the class of independent and identically distributed (i.i.d.) arrival processes, which includes the Poisson process as a special case. Apart from determining the MST, the probability that a size <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">i</i> collision is resolved in a finite amount of time when the arrival rate exceeds the MST can also be computed. Some limitations of the proposed methodology are discussed as well.

Strong Performance Guarantees for Asynchronous Buffered Crossbar Schedulers

Crossbar-based switches are commonly used to implement routers with throughputs up to about 1 Tb/s. The advent of crossbar scheduling algorithms that provide strong performance guarantees now makes it possible to engineer systems that perform well, even under extreme traffic conditions. Until recently, such performance guarantees have only been developed for crossbars that switch cells rather than variable length packets. Cell-based crossbars incur a worst-case bandwidth penalty of up to a factor of two, since they must fragment variable length packets into fixed length cells. In addition, schedulers for cell-based crossbars may fail to deliver the expected performance guarantees when used in routers that forward packets. We show how to obtain performance guarantees for asynchronous crossbars that are directly comparable to those previously developed for synchronous, cell-based crossbars. In particular we define derivatives of the Group by Virtual Output Queue (GVOQ) scheduler of Chuang et al. and the Least Occupied Output First Scheduler of Krishna et al. and show that both can provide strong performance guarantees in systems with speedup 2. Specifically, we show that these schedulers are work-conserving and that they can emulate an output-queued switch using any queueing discipline in the class of restricted Push-In, First-Out queueing disciplines. We also show that there are schedulers for segment-based crossbars, (introduced recently by Katevenis and Passas) that can deliver strong performance guarantees with small buffer requirements and no bandwidth fragmentation.

Optical Packet Switching Networks With Binary Multiwavelength Labels

We propose a network structure for routing optical packets based on binary multiwavelength labels. We resolve the main drawbacks of previously proposed optical label switching scenarios: high splitting loss and complex, expensive hardware. In our scheme, the label is mapped bit-by-bit to a selection of wavelength bins. Variable-length packets are self-forwarded via a multistage switch. This structure is scalable, high-speed, simple, practical, and low-cost, exploiting the workhorses of today's optical communications systems: arrayed waveguide gratings, distributed feedback lasers, LiNbO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> switches, and low-speed photodiodes and electronics (~ 100 MHz). We also propose a solution to alleviate the sophisticated label swapping processing required in generalized multiprotocol label switching (GMPLS) networks. We time-multiplex the binary multiwavelength labels for the entire optical label switching path. We examine the performance of both schemes experimentally by verifying successful routing and error-free transmission.

Energy efficiency analysis of DCF-based MAC protocol in Ad Hoc network

IEEE 802.11 Medium Access Control (MAC) protocol provides a competition-based distributed channel access mechanism for mobile stations to share the wireless medium in wireless Ad Hoc networks. Under the precondition of variable packet length, an energy analytical method was proposed, which calculated the energy efficiency of the basic, the RTS/CTS (Request To Send/Clear To Send) and the hybrid access mechanisms of the IEEE 802.11 Distributed Coordination Function (DCF). Furthermore, the effects of the network size, the average packet length, maximum backoff time, and the initial contention window on the energy efficiency of IEEE 802.11 DCF were explored in detail. Correctness and effectiveness of the proposed analytical method were verified through detailed simulation results.

Localized Independent Packet Scheduling for Buffered Crossbar Switches

Buffered crossbar switches are a special type of crossbar switches. In such a switch, besides normal input queues and output queues, a small buffer is associated with each crosspoint. Due to the introduction of crosspoint buffers, output and input contention is eliminated, and the scheduling process for buffered crossbar switches is greatly simplified. Moreover, since different input ports and output ports work independently, the switch can easily schedule and transmit variable length packets. Compared with fixed length packet scheduling, variable length packet scheduling has some unique advantages: higher throughput, shorter packet latency, and lower hardware cost. In this paper, we present a fast and practical scheduling scheme for buffered crossbar switches called Localized Independent Packet Scheduling (LIPS). With LIPS, an input port or output port makes scheduling decisions solely based on the state information of its local crosspoint buffers, i.e., the crosspoint buffers where the input port sends packets to or the output port retrieves packets from. The localization feature makes LIPS suitable for a distributed implementation and thus highly scalable. Since no comparison operation is required in LIPS, scheduling arbiters can be efficiently implemented using priority encoders, which can make arbitration decisions quickly in hardware. Another advantage of LIPS is that each crosspoint needs only L (the maximum packet length) buffer space, which minimizes the hardware cost of the switches. We theoretically analyze the performance of LIPS and, in particular, prove that LIPS achieves 100 percent throughput for any admissible traffic with speedup of two. We also discuss in detail the implementation architecture of LIPS and analyze the packet transmission timing in different scenarios. Finally, simulations are conducted to verify the analytical results and measure the performance of LIPS.

Novel MAC protocol with idle detection for all-optical WDM ring networks

A novel media access control (MAC) protocol named carrier sense multiple access with idle detection (CSMA/ID) is proposed to handle variable-length packets over an all-optical ring network. To evaluate optimal utilization of channel bandwidth, we study packet scheduling based on three transmitting queue discipline (TQD) architectures and four idle space allocation (ISA) algorithms with regard to their impact on performance. For numerical evaluation of performance, an analytical model is developed by a preclassification queue with weighted round-robin (PCQWRR) architecture and a random algorithm. Moreover, three related MAC protocols are examined and compared, namely, multitoken, carrier sense multiple access/collision avoidance (CSMA/CA) and carrier sense multiple access/collision preemption (CSMA/CP). Simulation results indicate that, of the TQDs, better performance is obtained by PCQWRR compared with first-in-first-out and preclassification queues. The first fit space (FFS) algorithm has the best performance of the ISAs. The 12 combinations of TQDs-ISAs are then considered. It is found that the combination of PCQWRR with FFS provides the greatest efficiency and has the lowest packet latency, providing better throughput than three different MAC protocols under either symmetric or asymmetric traffic load on all-optical ring networks.

Ordered Round-Robin: An Efficient Sequence Preserving Packet Scheduler

With the advent of powerful network processors (NPs) in the market, many computation-intensive tasks such as routing table look-up, classification, IPSec, and multimedia transcoding can now be accomplished more easily in a router. An NP consists of a number of on-chip processors to carry out packet level parallel processing operations. Ensuring good load balancing among the processors increases throughput. However, such multiprocessing also gives rise to increased out-of-order departure of processed packets. In this paper, we first propose an Ordered Round Robin (ORR) scheme to schedule packets in a heterogeneous network processor assuming that the workload is perfectly divisible. The processed loads from the processors are ordered perfectly. We analyze the throughput and derive expressions for the batch size, scheduling time and maximum number of schedulable processors. To effectively schedule variable length packets in an NP, we propose a Packetized Ordered Round Robin (P-ORR) scheme by applying a combination of deficit round robin (DRR) and surplus round robin (SRR) schemes. We extend the algorithm to handle multiple flows based on a fair scheduling of flows depending on their reservations. Extensive sensitivity results are provided through analysis and simulation to show that the proposed algorithms satisfy both the load balancing and in-order requirements for parallel packet processing.

40-Gb/s All-Optical Serial-to-Parallel Conversion Based on a Single SOA

An all-optical serial-to-parallel converter (AOSPC) was experimentally demonstrated. It could potentially be used to process variable-length optical packets. This scheme mainly consists of wavelength interleaved pulse generation and the sequential multiwavelength conversion (SMWC). The SMWC is based on a single semiconductor optical amplifier. In this research, a 40-Gb/s serial optical signal was converted into four-channel 10-Gb/s parallel optical signals. This scheme has the advantages of a simple system configuration, integration potential, and polarization independency. In addition, the AOSPC is suitable for an input signal with a low optical signal-to-noise ratio and at the same time can regenerate degraded serial signals.

Fair link striping with FIFO delivery on heterogeneous channels

Link aggregation techniques are often used to achieve higher communication bandwidth by striping network traffic across multiple transmission channels. Due to the variations in bandwidth, latency and loss rate on different channels, link striping suffers from packet reordering thereby adversely affecting the performance of any QoS concerned applications. Hardware-based solutions often prolong transmission latency which is undesirable for delay sensitive applications and are restricted with the available buffer space on the device. Thus, an effective striping protocol that ensures both load balancing and minimal packet reordering is important when striping traffic onto multiple channels. In this paper, we first propose an sequence preserving scheduling (SPS) scheme to schedule packets among multiple heterogeneous communication channels assuming that the workload is perfectly divisible. Packets assigned onto different links for transmission are ordered perfectly by applying divisible load theory (DLT). We analyze the throughput and derive expressions for the batch size, scheduling time and the maximum number of channels that can be supported by the sender and receiver. Further, to effectively schedule variable length packets for link striping, we propose a packetized sequence preserving scheduling (P-SPS) scheme by applying a combined packetized technique of deficit round robin (DRR) and surplus round robin (SRR). Extensive sensitivity results are provided through analysis and simulation to show that the proposed algorithms satisfy both the load balancing and in-order requirements for efficient packet transmission.

Asynchronous Variable-Length Optical Packet Switch with Delay-Line Loop Buffers

We propose an asynchronous variable-length optical packet switch that is based on a packet compression scheme and delay-line loop buffers, and evaluate the packet loss probability of the proposed switch through simulation and analysis. Simulation results well the analytical results and show the accuracy of our analysis. When the packet compression ratio is low, optical packet interval regulators are useful to improve the packet loss probability characteristics.

An Enhanced SOA-Based Double-Loop Optical Buffer for Storage of Variable-Length Packet

To extend the buffer depth of a fiber loop optical buffer, we have experimentally demonstrated an enhanced semiconductor optical amplifier (SOA)-based dual-loop optical buffer (DLOB) for storing variable-length optical packets. We have theoretically derived constraints governing the buffer depth of the DLOB, in which the SOA not only provides a nonlinear phase shift in the loop to implement the buffer function but also compensates for the fiber loop attenuation during long-time storage. It is found that the maximum allowable length of a stored packet to avoid the counter-propagation packet collision inside the SOA depends on the SOA bias position as well as the length of the fiber loop. To demonstrate the effectiveness of the proposed enhanced configuration, we have successfully demonstrated the storage of 2.5-Gbps variable-length packets even when the length of the input packet exceeds the corresponding length of the fiber loop. Another unique advantage of the proposed enhanced DLOB configuration is that it can also overcome the problem of power leakage of the stored packet due to a directional gain difference of single SOA and gain saturation. Index

Ultrafast Forwarding Architecture Using a Single Optical Processor for Multiple SAC-Label Recognition Based on FWM

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> We propose and demonstrate a novel ultrafast label processor that can recognize multiple spectral amplitude coded (SAC) labels using four wave mixing (FWM) sideband allocation and selective optical filtering. Our proposed solution favors hardware simplicity over bandwidth efficiency in order to achieve ultrafast label recognition at reasonable cost. Our implementation, unlike all other optical label processing techniques, does not require time gating, envelope detectors, or serial-to-parallel converters. Labels are transmitted simultaneously with the payload, improving temporal efficiency at the expense of spectral efficiency. Note that bandwidth efficiency can be improved through a frequency management scheme that uses irregular spacing of wavelengths for payload and label, a complexity overhead in management similar to that in long-haul networks employing irregular spacing of carriers to avoid FWM products. We present two experiments of the single processor for ultrafast forwarding using first optoelectronic and then all-optical switches. In the first experiment, we use 10 SAC labels with minimum bin separation of 25 GHz, 10 Gb/s variable-length data packets, and forward packets over 200 km using electrooptical switches. In the second experiment, all-optical switching at 40 Gb/s is demonstrated using a SAC family for up to 36 labels. We present details on the families of spectral codes for label recognition, using unequally spaced frequency bins. A code family with weight 2 and length 9 uniquely identifies 36 labels. Hardware complexity is moderate compared with short-pulse code labels (mode-locked laser) techniques. Two stable tunable lasers are required for label generation of this code family; all other hardware is commercial, off-the-shelf components such as semiconductor optical amplifiers, array waveguide gratings, optoelectronic switches, and photodetectors. </para>

A New Fair Queueing Algorithm with Dynamic Service Probability Adjustment

This letter proposes a new weighted fair queueing algorithm, which adjusts dynamically each flow's service probability according to its weight and average packet length and then uses the service probability parameters to implement fair queueing. This solves the main drawback of traditional weighted fair queueing algorithms — the packet-based tracing of weight parameters. In addition, this letter proposes a novel service probability calculation method which solves the unfairness problem induced by the variable packet length.

Efficient Variable Length Block Switching Mechanism

Most popular and widely used packet switch architecture is the crossbar. Its attractive characteristics are simplicity, non-blocking and support for simultaneous multiple packet transmission across the switch. The special version of crossbar switch is Combined Input Crossbar Queue (CICQ) switch. It overcomes the limitations of un-buffered crossbar by employing buffers at each crosspoint in addition to buffering at each input port. Adoption of Crosspoint Buffer (CB) simplifies the scheduling complexity and adapts the distributed nature of scheduling. As a result, matching operation is not needed. Moreover, it supports variable length packets transmission without segmentation. Native switching of variable length packet transmission results in unfairness. To overcome this unfairness, Fixed Length Block Transfer mechanism has been proposed. It has the following drawbacks: (a) Fragmented packets are reassembled at the Crosspoint Buffer (CB). Hence, minimum buffer requirement at each crosspoint is twice the maximum size of the block. When number of ports are more, existence of such a switch is infeasible, due to the restricted memory available in switch core. (b) Reassembly circuit at each crosspoint adds the cost of the switch. (c) Packet is eligible to transfer from CB to output only when the entire packet arrives at the CB, which increases the latency of the fragmented packet in the switch. To overcome these drawbacks, this paper presents Variable Length Block Transfer mechanism. It does not require internal speedup, segmentation and reassembly circuits. Using simulation it is shown that proposed mechanism is superior to Fixed Length Block Transfer mechanism in terms of delay and throughput.