Use Cases For Application Research Articles

Commodity Packet Capture Engines: Tutorial, Cookbook and Applicability

Users' demands have dramatically increased due to widespread availability of broadband access and new Internet avenues for accessing, sharing and working with information. In response, operators have upgraded their infrastructures to survive in a market as mature as the current Internet. This has meant that most network processing tasks (e.g., routing, anomaly detection, monitoring) must deal with challenging rates, challenges traditionally accomplished by specialized hardware-e.g., FPGA. However, such approaches lack either flexibility or extensibility-or both. As an alternative, the research community has proposed the utilization of commodity hardware providing flexible and extensible cost-aware solutions, thus entailing lower operational and capital expenditure investments. In this scenario, we explain how the arrival of commodity packet engines has revolutionized the development of traffic processing tasks. Thanks to the optimization of both NIC drivers and standard network stacks and by exploiting concepts such as parallelism and memory affinity, impressive packet capture rates can be achieved in hardware valued at a few thousand dollars. This tutorial explains the foundation of this new paradigm, i.e., the knowledge required to capture packets at multi-Gb/s rates on commodity hardware. Furthermore, we thoroughly explain and empirically compare current proposals, and importantly explain how apply such proposals with a number of code examples. Finally, we review successful use cases of applications developed over these novel engines.

Clinical Data Element Ontology for Unified Indexing and Retrieval of Data Elements across Multiple Metadata Registries.

ObjectivesClassification of data elements (DEs), which is used in clinical documents is challenging, even in across ISO/IEC 11179 compliant clinical metadata registries (MDRs) due to no existence of reliable standard for identifying DEs. We suggest the Clinical Data Element Ontology (CDEO) for unified indexing and retrieval of DEs across MDRs.MethodsThe CDEO was developed through harmonization of existing clinical document models and empirical analysis of MDRs. For specific classification as using data element concept (DEC), The Simple Knowledge Organization System was chosen to represent and organize the DECs. Six basic requirements also were set that the CDEO must meet, including indexing target to be a DEC, organizing DECs using their semantic relationships. For evaluation of the CDEO, three indexers mapped 400 DECs to more than 1 CDEO term in order to determine whether the CDEO produces a consistent index to a given DEC. The level of agreement among the indexers was determined by calculating the intraclass correlation coefficient (ICC).ResultsWe developed CDEO with 578 concepts. Through two application use-case scenarios, usability of the CDEO is evaluated and it fully met all of the considered requirements. The ICC among the three indexers was estimated to be 0.59 (95% confidence interval, 0.52-0.66).ConclusionsThe CDEO organizes DECs originating from different MDRs into a single unified conceptual structure. It enables highly selective search and retrieval of relevant DEs from multiple MDRs for clinical documentation and clinical research data aggregation.

Efficient Modelling of Traffic and Quality of Scalable Video Coding (SVC) Encoded Streams

In this letter, a new model for generating SVC-like traffic and estimating its quality is introduced. Comprising two independent components - i.e., the traffic generator and the quality estimator - the model can significantly speed up the development of SVC applications in various use-cases by relying on approximated properties of streams instead of real traces. The model is verified based on a set of video streams and the performance of its components is assessed.

실내공간 표준안 IndoorGML의 개념 및 활용

실내공간은 공간정보 서비스의 새로운 대상이다. 최근 실내공간 측위 기술의 발달과 스마트폰 등 이동기기의 보편화로 실내공간도 위치기반 서비스와 같은 서비스가 가능하여지고 있다. 따라서 실내공간 정보의 교환 및 공유를 위한 표준화도 중요한 요구사항으로 떠오르고 있다. 이러한 배경에서 국제공간정보 표준화기구인 OGC에서는 실내공간정보 표준인 IndoorGML 표준화 작업반을 2012년에 조직하고 2013년 9월 표준화를 목적으로 현재 작업 중이다. IndoorGML은 특히 실내공간의 위치기반 서비스를 제공하기 위하여 가장 기초가 되는 네트워크 위상을 표현하는 것을 목적으로 한다. 본 논문에서는 첫 번째로 현재 표준화되고 있는 IndoorGML의 기본 개념을 설명한다. 두 번째로 IndoorGML의 모델의 구체적 사항을 살펴보고, 세 번째 간단한 응용 사례를 제시한다. Indoor space is a new horizon of spatial information services. With recent progress of indoor positioning technologies and mobile devices such as smart phones, indoor spatial information services become available and an emerging market. Accordingly, exchanging and sharing indoor spatial information between independent services become an important issue. For this reason, a standardization working group, called IndoorGML has been launched last year in OGC with the aim of publishing IndoorGML standard by September, 2013. Its primary goal is to provide a framework for representing network topology in indoor space, which is a fundamental element of indoor LBS. In this paper, we will explain the basic concepts of indoorGML and discuss the modeling issues. And several application use-cases of IndoorGML will be also presented in this paper.

Multiprocessor Systems Auto-Design for Multiple Use-Case Applications on FPGA

Multiprocessor system is becoming a promising solution to meet the high performances of applications for embedded systems, but it also brings more challenges on the design methodology. We present a design methodology to generate multiprocessor systems in a systematic model and full automated way for multiple use-cases, an auto-design chain to integrate multiple applications into one basic design platform for the lower cost of design, and also analyze the proper architecture for multiple use-case applications.

Auto Design and Synthesis Flow of MPSoC Systems for Multiple Use-Cases of Applications on FPGA Device

Auto Design and Synthesis Flow of MPSoC Systems for Multiple Use-Cases of Applications on FPGA Device

Prototype Design and Synthesis of Cluster MPSoC Architecture for Multiple Applications

Modern embedded devices require high performances such as computing, throughput and power consumption. Multiprocessor System-on-Chip (MPSoC) is a promising solution to meet the requirements. And the Network-on-Chip (NoC) is used as the interconnection of MPSoC. Whereas it brings more challenge on application programming and fast design exploration of software and hardware implements automatically. In this paper we propose a cluster MPSoC architecture, which adopts hybrid interconnection of processor clusters and NoC. And we present a design automation and synthesis methodology to generate MPSoCs in a system-level way for multiple application use-cases. And it merges them onto a minimal hardware architecture of resources. The desired MPSoC design is generated with short design time, making it suited for fast design exploration for MPSoC development. The proposed design flow is implemented into a tool for Xilinx FPGAs. The experiments results illuminate that our design methodology is a convenient approach to generate the MPSoC design for multiple use-cases.

Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA

Future applications for embedded systems demand chip multiprocessor designs to meet real-time deadlines. The large number of applications in these systems generates an exponential number of use-cases. The key design automation challenges are designing systems for these use-cases and fast exploration of software and hardware implementation alternatives with accurate performance evaluation of these use-cases. These challenges cannot be overcome by current design methodologies which are semiautomated, time consuming, and error prone. In this article, we present a design methodology to generate multiprocessor systems in a systematic and fully automated way for multiple use-cases . Techniques are presented to merge multiple use-cases into one hardware design to minimize cost and design time, making it well suited for fast design-space exploration (DSE) in MPSoC systems. Heuristics to partition use-cases are also presented such that each partition can fit in an FPGA, and all use-cases can be catered for. The proposed methodology is implemented into a tool for Xilinx FPGAs for evaluation. The tool is also made available online for the benefit of the research community and is used to carry out a DSE case study with multiple use-cases of real-life applications: H263 and JPEG decoders. The generation of the entire design takes about 100 ms, and the whole DSE was completed in 45 minutes, including FPGA mapping and synthesis. The heuristics used for use-case partitioning reduce the design-exploration time elevenfold in a case study with mobile-phone applications.

SECURE SOFTWARE DEVELOPMENT USING USE CASES AND MISUSE CASES

There is a need to inculcate in students the idea of secure system development. This paper investigates the application of use cases to the identification of security threats and security requirements; these can then be incorporated into the software design and implementation and used as a basis for testing. The method is easy to teach and easy to use. It provides a highly organized way of thinking about security early in the software life cycle. It can be a tool to inculcate secure software development among students.

The application of use cases in systems analysis and design specification

This paper begins by reviewing the application of use cases in the analysis and design phases of software development. At present, a use case derived in analysis is generally mapped into design through the synthesis of object behaviour for all scenarios associated with the use case. Hence the use case level of abstraction is not directly used in this process and a semantic gap exists between analysis and design. With informal textually based use case definitions this is to be expected, however, if the use cases themselves are given a more concrete structure, for example in the form of a statechart, then their direct use becomes more feasible. In this paper we therefore investigate the application of use case structures in the initial design phases of software development. A novel approach is proposed that applies a state based use case model directly to each object in the design architecture. This requires the derivation of a set of repeatable refinement procedures, which remove redundancy and allow the assignment of behaviour to objects with respect to their responsibilities. It is then shown how such procedures may be used in design, filling the semantic gap between analysis and design. By applying the procedures to a case study we identify and evaluate the characteristics of the mapping from use case model to object behaviour and review our approach with respect to other methods. It is concluded that state based use case structures not only represent a succinct analysis format, but may also be used to map analysis models directly into the design process.

Managing Complexity in Object-Oriented Development

The current approaches in Object-Oriented Analysis have limitations on modeling complex real world systems because they require priori knowledge about objects and their interactions before applying them. This may be practical in small systems and systems with clear domain knowledge, but not in large real world systems with unclear domain knowledge. Our approach uses a stepwise refinement technique in a top-down manner to the Object-Oriented Analysis stage with the application of use cases. This approach is especially good for new areas where we do not know all the information in advance. We present the approach with an example of its application to the B-ISDN service modeling and distributed systems.