Arsenic (As) has been shown to be an effective p-type dopant for CdTe, although high performance in As-doped devices remains difficult to achieve. Arsenic is prone to self-compensation in CdTe, as evidenced by the accumulation of dopant atoms in CdTe/Cd(Se,Te) near the interface with MgxZn1-xO (MZO). In this study, we use SCAPS 1D modeling software to investigate the effect of near-interface compensation, helping elucidate loss pathways in present-day As-doped devices and informing future growth directions. We consider three possible results of As accumulation: shallow donors, deep recombination centers, and a thin layer of excess acceptor accumulation. The reduction in near-interface carrier concentration caused by shallow donors is shown to improve open-circuit voltages (Voc), whereas deep levels are detrimental to all performance parameters. The thin charge layer affects capacitance-voltage (CV) measurements by reducing the depletion width while maintaining the same carrier concentration, replicating CV behavior that has been observed in actual devices. These results illustrate the importance of monitoring dopant accumulation within 100 nm of the interface, and suggest that reducing or eliminating the As concentration in this region would be beneficial. An undoped Cd(Se,Te) layer at the interface is suggested as a possible device structure to boost performance.