Underfilled Flip Chip Package Research Articles

Thermal cycling reliability of SnAgCu and SnPb solder joints: A comparison for several IC-packages

This paper deals with a comparison study between SnPb and SnAgCu solder joint reliability. The comparison is based on non-linear finite element modelling. Three packages have been selected: silicon CSP, underfilled flip chip and QFN package. Also the effect of thermal cycling conditions has been investigated. Comparing the induced inelastic strains in the solder joint, the lead-free SnAgCu generally scores better thanks to the lower creep strain rate. On the other hand for the CSP and flip chip package, SnAgCu scores worse for the more extreme loading conditions when the inelastic dissipated energy density is selected as damage parameter. The main reason is that due to the lower creep strain rate, the stresses become higher for SnAgCu resulting in higher hysteresis loops with more dissipated energy per cycle. For the QFN package, SnAgCu scores much better.

Surface property of passivation layer on integrated circuit chip and solder mask layer on printed circuit board

Adhesion of underfill to passivation layer on integrated circuit chip and solder mask layer on printed circuit board is critical to the reliability of an underfilled flip chip package. In this study, the surface properties of solder mask and four passivation materials: benzocyclobutene (BCB), polyimide (PI), silicon dioxide (SiO/sub 2/), and silicon nitride (SiN) were investigated. A combination of both wet and dry cleaning processes was very effective to remove contaminants from the surface. The element oxygen, introduced during O/sub 2/ plasma treatment or UV/O/sub 3/ treatment, led to the increase of the base component of surface tension. X-ray photoelectron spectroscopy (XPS) experiments confirmed the increase of oxygen concentration at the surface after UV/O/sub 3/ treatment. Wetting of underfill on passivation and solder mask was slightly improved at higher temperatures. Although UV/O/sub 3/ cleaning and O/sub 2/ plasma treatment significantly improved the wetting of underfill on passivation materials, they did not improve adhesion strength of epoxy underfill to passivation. Therefore, the wetting was not the controlling factor in adhesion of the system studied.

On the degradation of the solder joints of underfilled flip chip packages: a case study

The lifetime of flip chip solder joints can be greatly increased by applying underfill encapsulation. This paper presents a case study where the thermal cycle lifetime was increased by more than 20 times, that is from ∼100 cycles to more than 2,000 cycles for a chip size of 5.6mm × 6.3mm. By combining electrical, acoustic and metallographic investigation, the degradation of the solder joints was monitored, some important factors relevant to solder joint reliability were analysed and discussed. Delamination was found not to be the dominant failure mode.

An Optical Method for Measuring the Two-Dimensional Surface Curvatures of Electronic Packages During Thermal Cycling

An optical method was developed to measure the two-dimensional (2D) surface curvatures of electronic packages by employing four laser beams. Each laser beam measures the slopes of the surface at the incident point along two perpendicular directions. By combining four pairs of slopes, the 2D surface curvatures of the package can be calculated. The surface warpage of an underfilled flip-chip package during thermal cycling was measured by this method and the result was verified by finite element analysis (FEA). Both experimental and FEA results show that the surface warpage is almost a linear function of temperature between 25°C and 150°C for the measured package.

Solder bump reliability-issues on bump layout

The reliability of solder bumps in a typical under-filled flip chip package is calculated three-dimensionally (3-D) using the finite element method and a viscoplastic material model for the solder. Simulations are performed with varying bump placement, underfill coverage and board size. The average plastic work in a bump is used to compare the loading and bump reliability of different geometries. The results show possible improvements over the traditional bump placement by changing the geometry of the interconnects on the flip chip package. Three changes that improve reliability are discussed in detail: the redistribution of bump rows, the reduction of board size and the inclusion of heat transfer bumps.

Coffin-Manson fatigue model of underfilled flip-chips

The fatigue life of an underfilled flip-chip package has been evaluated using the Coffin-Manson relation and finite element modeling (FEM)-computed solder shear strain for typical flip-chip structures. In the course of this effort, numerical simulations were performed for underfill materials of varying thermo-structural properties, two chip sizes, and two solder bump heights. The results were used to examine the parametric sensitivity of the thermal strain in the solder joints and the axial, as well as shear stress in the underfill material. The predicted improvement in the number of cycles-to-failure of the underfilled flip-chip was found to agree with empirical observation. However, the maximum improvement achievable by underfilling was found to be limited by the adhesion strength of the underfill material.