Ultra-thin Silicon Substrates Research Articles

超薄硅衬底氮化铝Lamb波压电谐振器

超薄硅衬底氮化铝Lamb波压电谐振器

Surface evolution and stability transition of silicon wafer subjected to nano-diamond grinding

In order to obtain excellent physical properties and ultrathin devices, thinning technique plays an important role in semiconductor industry with the rapid development of wearable electronic devices. This study presents a physical nano-diamond grinding technique without any chemistry to obtain ultrathin silicon substrate. The nano-diamond with spherical shape repeats nano-cutting and penetrating surface to physically etch silicon wafer during grinding process. Nano-diamond grinding induces an ultrathin “amorphous layer” on silicon wafer and thus the mismatch strain between the amorphous layer and substrate leads to stability transition from the spherical to non-spherical deformation of the wafer. Theoretical model is proposed to predict and analyze the deformation of amorphous layer/silicon substrate system. Furthermore, the deformation bifurcation behavior of amorphous layer/silicon substrate system is analyzed. As the mismatch strain increases or thickness decreases, the amorphous layer/silicon substrate system may transit to non-spherical deformation, which is consistent to the experimental results. The amorphous layer stresses are also obtained to predict the damage of silicon wafer.

A Low Noise 2.7 THz Waveguide-Based Superconducting Mixer

We report on a low noise waveguide-based heterodyne mixer utilizing a superconductiang NbN hot electron bolometer (HEB) operating near 2.7 THz. The mixer is an NbN nano-bridge integrated with a gold bowtie planar antenna on an ultra-thin silicon substrate of ~ 2-3 μm thickness. To produce the waveguide embedding circuit for use at such a high frequency, we adopted a novel approach combining UV-lithography and micro-plating techniques. The mixer response agreed precisely with model predictions, and we measured a minimum uncorrected DSB receiver noise temperature of 965 K at an LO frequency of 2.74 THz.

Dual-side and three-dimensional microelectrode arrays fabricated from ultra-thin silicon substrates

A method for fabricating planar implantable microelectrode arrays was demonstrated using a process that relied on ultra-thin silicon substrates, which ranged in thickness from 25 to 50 µm. The challenge of handling these fragile materials was met via a temporary substrate support mechanism. In order to compensate for putative electrical shielding of extracellular neuronal fields, separately addressable electrode arrays were defined on each side of the silicon device. Deep reactive ion etching was employed to create sharp implantable shafts with lengths of up to 5 mm. The devices were flip-chip bonded onto printed circuit boards (PCBs) by means of an anisotropic conductive adhesive film. This scalable assembly technique enabled three-dimensional (3D) integration through formation of stacks of multiple silicon and PCB layers. Simulations and measurements of microelectrode noise appear to suggest that low impedance surfaces, which could be formed by electrodeposition of gold or other materials, are required to ensure an optimal signal-to-noise ratio as well a low level of interchannel crosstalk.

Ultrathin Silicon Micropackaging for RF MEMS Devices

In this paper we report a technology for lightweight, small radio-frequency (rf) microelectromechanical system packaging with a short electrical path length. We used an ultrathin silicon substrate as the packaging substrate. Via holes for vertical feed-through were fabricated on the thin silicon wafer. Then, bottom-up gold electroplating was applied to fill via holes. For hermetic sealing, gold-gold direct metal bonding was used in the sealing line. The packaged rf device has a reflection loss below -22 dB and an insertion loss of -0.05 to -0.08 dB. Therefore, with the ultrathin silicon wafer, a lightweight, small device package can be constructed.

Ultra Thin 실리콘 웨이퍼를 이용한 RF-MEMS 소자의 웨이퍼 레벨 패키징

In this paper, we report a novel RF-MEMS packaging technology with lightweight, small size, and short electric path length. To achieve this goal, we used the ultra thin silicon substrate as a packaging substrate. The via holes lot vortical feed-through were fabricated on the thin silicon wafer by wet chemical processing. Then, via holes were filled and micro-bumps were fabricated by electroplating. The packaged RF device has a reflection loss under 22 〔㏈〕 and a insertion loss of -0.04∼-0.08 〔㏈〕. These measurements show that we could package the RF device without loss and interference by using the vertical feed-through. Specially, with the ultra thin silicon wafer we can realize of a device package that has low-cost, lightweight and small size. Also, we can extend a 3-D packaging structure by stacking assembled thin packages.

Optical Characterization of Ultrathin Silicon Substrates

AbstractIn this paper we present results for the absorption coefficient and refractive index spectra of p-and n-type silicon membranes doped with phosphorous or boron at different levels. These results cover the wide energy range from 0.5 eV up to 2.5 eV, thus including effects of subgap defect and impurity absorption, and the range of possible transitions to higher conduction band minima. The results have been obtained by utilizing both a conventional transmission and reflection measurement technique at small values of transmittance, and a recently developed optical interference spectroscopy characterization technique. The results in the visible and near infrared regions from the two techniques have been compared, and the range of transmission where the conventional technique is applicable have been determined. The preliminary analysis of these data indicate that a new information regarding the Si electronic band structure can be extracted.