Ultrathin Silicon Oxide Research Articles

Nanoscale in situ investigation of ultrathin silicon oxide thermal decomposition by hightemperature scanning tunneling microscopy

A surface chemical reaction—the thermal decomposition of ultrathin silicon oxide(∼1 nm) by ultrahigh vacuum (UHV) thermal annealing at600–800 °C—is in situ investigated on a nanometer scale by high temperature scanning tunnelingmicroscopy (STM). The reaction is initiated by the creation of circular voids which exposethe underlying silicon substrate. Growth kinetics of the voids is scrutinized via time-lapseSTM movies. It is verified that the void perimeters grow linearly with time beforecoalescence and the reaction occurs peripherally around the void perimeters. It is alsodemonstrated that the decomposition rate varies concomitantly with the local environmentnear the reaction fronts. The observed low–high–low rate evolution is qualitativelyexplained. Increased reaction activation energy is found in the final decomposition stageand the origin of the increase is proposed to be due to the local morphological evolution.

Mechanisms for generation of oxide trapped charges in ultrathin silicon dioxide films during electrical stress

Charge trapping characteristics of ultrathin silicon dioxide (SiO2) films during constant voltage stress (CVS) in direct tunneling regime have been presented. Both bulk and border traps have been segregated from oxide trapped charges. Our measurement results indicate that electron trapping in as fabricated traps in ultrathin samples was suppressed and/or absent during prolonged stress. In addition, the generation kinetics of “border” and “bulk” trapped positive oxide charges have been studied. From the bulk oxide charge relaxation experiments, nature of as-fabricated intrinsic hole traps in SiO2 has been determined. Our results show that both bulk and border trapped positive oxide charges are mostly contributed by proton related species possibly the [Si2OH]+ centers. Based on experimental observations, a physical model of stress-induced bulk positive charge generation/trapping has been proposed.

Rapid Oxidation of Silicon Using UV-Light Irradiation in Low-Pressure, Highly Concentrated Ozone Gas below 300 °C

A low-temperature, damage-free process for growing ultrathin (<6 nm) silicon dioxide (SiO2) films was successfully developed. The excitation of low-pressure, highly concentrated O3 gas using photons with energies less than 5.6 eV led to rapid growth rates of 2 and 3 nm within 1 and 5 min, respectively, even when the process temperature was as low as 200 °C. The enhanced oxidation rate was due to an increased supply of O(1D) atoms at the Si surface. Transmission electron microscope images revealed that the SiO2 film formed with a uniform thickness and a smooth, distinct SiO2/Si interface. Capacitance–voltage and current–voltage measurements showed that 200 and 300 °C as-grown films had a satisfactorily low density of mobile ions and trap charges as well as ideal insulating properties.

Physical Origin of Stress-Induced Leakage Currents in Ultra-Thin Silicon Dioxide Films

The physical origin of stress-induced leakage currents (SILC) in ultra-thin SiO 2 films is described. Assuming a two-step trapassisted tunneling process accompanied with an energy relaxation process of trapped electrons, conditions of trap sites which are origin of SICL are quantitatively found. It is proposed that the trap site location and the trap state energy can be explained by a mean-free-path of hole in SiO 2 films and an atomic structure of the trap site by the O vacancy model.

Local study of thickness-dependent electronic properties of ultrathin silicon oxide near SiO2/Si interface

We have used scanning tunnelling microscopy and spectroscopy (STM/STS) to investigate the electronic properties of ultrathin silicon oxide films on silicon, e.g. surface band gap and band offset versus silicon oxide thickness near the interface. The length of the interfacial electronically transitional region is measured to be about 0.9 nm, in which the silicon oxide surface band gap increases gradually with thickness and its evolution is meticulously observed. Both the conduction and valence band offsets between silicon oxide and silicon increase by about 1.0 eV with only a ∼0.3 nm steric difference in this region. Furthermore, in an oxide thinner than ∼0.6 nm, oxide gap states can be discerned from STS which is attributed to the electronic states extending from the silicon substrate over the Si oxide. On the basis of local layer-resolved electronic properties, we corroborate that a usable oxide thickness should be no less than ∼0.9 nm on the Si(1 1 1) substrate, which corresponds to only three initial oxide layers.

Photodetective Characteristics of Metal–Oxide–Semiconductor Tunneling Structure with Aluminum Grid Gate

The photodetective characteristics of aluminum grid gate–ultrathin silicon dioxide–silicon structures have been studied. The on–off ratio calculated from the photo and dark current densities rapidly changes at the threshold optical-power density. The threshold optical-power density is controlled by the silicon dioxide film thickness and increases with decreasing silicon dioxide film thickness. The difference between the surface potential with and without light irradiation rapidly changes at the same optical-power density. Holes do not significantly accumulate under optical-power densities lower than the threshold.

Optimisation of ac anodisation parameters for the improvement of electrical properties of thermally grown ultrathin gate oxide

In this paper the effect of selective anodisation under ac bias on ultrathin (1.5–2.75 nm) silicon dioxide grown at two different temperatures, viz. 700 °C and 800 °C have been studied. It is shown that ac anodisation is much more effective in improving the electrical properties of the ultrathin oxide compared to selective anodisation carried out under dc condition. Unlike dc anodisation, which only repairs the pinholes but does not improve the interfacial properties, ac anodisation is found to reduce the density of interface states. The parameters during ac anodisation, e.g. signal frequency and dc offset are found to have a major role in the degree of the improvement and have been optimised carefully. Best results have been obtained when ac anodisation has been carried out using a 260 mV peak-to-peak signal of frequency 5 kHz and dc offset of 70 mV.

1.5 - nm -thick silicon oxide gate films grown at 150°C using modified reactive ion beam deposition with pyrolytic-gas passivation

Low-temperature ultrathin silicon oxide gate film growth using modified reactive ion beam deposition (RIBD) with an in situ pyrolytic-gas passivation (PGP) method is described. RIBD uses low-energy-controlled reactive and ionized species and potentializes low-temperature film growth. By combining RIBD with PGP using N2O and NF3, 1.5-nm-thick silicon oxide gate films with high-potential barrier height energy, 3.51eV, and low-leakage current, less than about 10−5A∕cm2 at 2MV∕cm, can be obtained at a growth temperature of 150°C. From an evaluation of number densities of N, F, and O atoms near the 1.5–5.0-nm-thick RIBD-with-PGP silicon oxide films/Si(100) interfaces, it is believed that interfacial N and F atoms contribute to improve the electrical characteristics and F effectively compensates the residual inconsistent-state bonding sites after the N passivation.

On interface properties of ultra-thin and very-thin oxide/a-Si:H structures prepared by oxygen based plasmas and chemical oxidation

Amorphous hydrogenated silicon (a-Si:H) belongs still to most promising types of semiconductors for its utilization in fabrication of TFTs and thin film solar cell technology due to corresponding cheap a-Si:H-based device production in comparison with, e.g. crystalline silicon (c-Si) technologies. The contribution deals with both two important modes of preparation of very-thin and ultra-thin silicon dioxide films in the surface region of a-Si:H semiconductor (oxygen plasma sources and liquid chemical methods) and electrical, optical and structural properties of produced oxide/semiconductor structures, respectively. Dominant aim is focused on investigation of oxide/semiconductor interface properties and their comparison and evaluation from view of utilization of used technological modes in the nanotechnological industry. Following three basic types of oxygen plasma sources were used for the first time in our laboratories for treatments of surfaces of a-Si:H substrates: (i) inductively coupled plasma in connection with its applying at plasma anodic oxidation; (ii) rf plasma as the source of positive oxygen ions for plasma immersion ion implantation process; (iii) dielectric barrier discharge ignited at high pressures.The liquid chemical manner of formation SiO2/a-Si:H structures uses 68wt% nitric acid aqueous solutions (i.e., azeotropic mixture with water). Their application in crystalline Si technologies has been presented with excellent results in the formation of ultra-thin SiO2/c-Si structures [H. Kobayashi, M. Asuha, H.I. Takahashi, J. Appl. Phys. 94 (2003) 7328].Passivation of surface and interface states by liquid cyanide treatment is additional original technique applied after (or before) formation of almost all formed thin film/a-Si:H structures. Passivation process should be used if high-quality electronical parameters of devices can be reached.

Excess Si and passivating N and F atoms near the pyrolytic-gas-passivated ultrathin silicon oxide film/Si(100) interface

Number densities of Si, O, N, and F atoms near the 3.5–6.5-nm-thick silicon oxide film/Si(100) interface produced by a recently proposed in-situ passivation method [pyrolitic-gas passivation (PGP)] that uses a little pyrolytic N2O and NF3 gases were determined. It was found that the generation of excess Si atoms relative to the stoichiometric SiO2 composition near the interface is effectively inhibited by the localized passivating N and F atoms. Moreover, the number of excess Si decreases while those of N and F increase with decreasing humidity. These PGP effects can be confirmed only at a humidity of less than 1ppb. It is therefore believed that N and F passivations effectively contribute to compensate the residual inconsistent-state bonding sites near the interface that still remain through an extreme dehydration.

Integrated Tunneling Device for High Sensitive Sensor Applications

This paper describes an integrated tunneling sensor for applications of an electronic nose and a scanning probe microscope. Ultra-thin silicon dioxide having a thickness of ~2 nm is used as a material of the tunneling sensor. It provides much higher sensitivity in comparison with others sensing methods. The tunneling sensor is placed on a fixed edge where the maximum strain arises. As additional masses or forces are added to the surface of the cantilever, the thickness of the thin silicon dioxide layer is slightly decreased. By using exponential nature of electron tunneling dominated by the thickness of the silicon dioxide it can be used as an ultra-high sensitive sensor. The thin dioxide is fabricated by dry oxidation using a vertical furnace. The cantilever structures are defined by conventional MEMS technologies. Current density of the tunneling sensor is evaluated as a function of voltage and is compared with numerical analysis based on direct tunneling phenomena.

Comparison of saturation current characteristics for ultrathin silicon oxides grown on n- and p-type silicon substrates simultaneously

Rapid thermal oxidations were simultaneously performed on n- and p-type silicon substrates to investigate the saturation currents of metal-oxide-semiconductor (MOS) capacitors. For MOS capacitors on n-type Si substrates, the curves of capacitance versus gate voltage (C-V) show almost no fixed charge, no lateral nonuniformity, and little interface trap density (Dit). The mechanism of the generation of the saturation current is recombination, and was investigated by electroluminescence. Also, the saturation current decreases as the oxide becomes thicker. However, the oxidation temperature must be sufficiently high to form high-quality oxide on p-type Si substrate. Controlled by minority carrier generation, the saturation current of the MOS (p) capacitor also depends on Dit, suboxide, and bulk trap density. The saturation current increases with the thickness of the oxide. The generation mechanism of the saturation currents of MOS (p) capacitors was also investigated by observing their dependencies on temperature. The mechanisms of the generation saturation currents of MOS capacitors grown on n- and p-type Si substrates are basically different.

Nanometric thinning of bonded silicon wafers using sacrificial anodic oxidation and investigated by X-ray reflectivity

X-ray reflectivity and atomic force microscopy are used to investigate silicon oxide ultra-thin films. Quantitative results are shown using a reflectivity simulation model based on kinematical X-ray theory. Changes in film thickness are discussed in relation to current density, voltage, charge and anodization time. The density and resistivity of silicon oxide are calculated and compared to that of thermal oxide. The electrical field existing in the layer during anodization is estimated. Surface roughness is also measured locally and averaged over the entire surface, producing a low value that meets microelectronic requirements. Thickness is carefully controlled. We show that ultra-thin silicon oxide films are of very high quality. Similar investigations are made on a twisted bonded silicon substrate obtained by the molecular bonding of two silicon wafers. It is shown that the silicon oxide is also of very good quality and can be used as a sacrificial silicon oxide in thinning down the upper silicon film. Controlled, accurate thinning is achieved down to a thickness of 10 nm, the level which is required for etching the dislocation network present at the bonding interface.

Photoinduced self-limited low-temperature growth of ultra-thin silicon-oxide films with water vapor

The growth of ultra-thin (<2 nm) silicon-oxide films was investigated on Si(100):H, Si(111):H, and a-Si:H surfaces in a pure water atmosphere (0.1–10 Pa) at low temperatures of 30–250 °C. Oxidation was induced photochemically by pulsed F2-laser radiation at 157 nm. The thickness and composition of the growing oxide films were monitored in real time by spectroscopic ellipsometry in the photon energy range of 1.15–4.75 eV. The mechanism of laser-induced silicon oxidation in a H2O atmosphere is shown to differ fundamentally from the classical Deal–Grove mechanism of thermal oxidation at 900–1200 °C, as well as from the photoinduced low-temperature oxidation in an O2 atmosphere. In particular, the film thickness essentially does not depend on temperature below 250 °C. A kinetic model is developed for low-temperature silicon oxidation in a H2O atmosphere. According to this model, the growth is limited at small thicknesses by the oxidation reaction and at larger thicknesses by reactions of the diffusing oxidizing species in the oxide layer. Very good agreement is established between this kinetic model and the ellipsometric measurements and the temperature and pressure dependence of the water oxidation process.

Improvement in the Interfacial Properties and Electrical Characteristics of Ultrathin SiO2 by Selective AC Anodisation

In this paper we have studied the effect of selective anodisation under ac bias on ultrathin (2–2.75 nm) silicon dioxide grown at 800°C. It is shown that ac anodisation is more effective in improving the electrical properties of the ultrathin oxide compared to selective anodisation carried out under dc condition. Unlike dc anodisation, which only repairs the pinholes but does not improve the interfacial properties, ac anodisation is found to reduce the density of interface states. The efficacy of ac anodisation is found to depend on the ac signal frequency and best results have been obtained at a frequency of 5 kHz.

Experimental evidence of two conduction mechanisms for direct tunnelling stress-induced leakage current through ultrathin silicon dioxide gate dielectrics

A comprehensive analysis of the stress-induced leakage current (SILC) through thermally grown ultrathin silicon dioxide (SiO2) films has been presented based on experimental observations. Stressing and sensing measurements are done in tantalum nitride (TaN) gate metal-oxide-silicon (MOS) capacitors at negative gate bias in the direct tunnelling (DT) regime. Both transient and steady-state DT SILCs have been studied in oxides with thicknesses between 1.7 and 2.3 nm. On the premise of charge carrier generation/trapping characteristics, our experimental results give a better physical insight into the conduction mechanism of SILC through ultrathin SiO2 films stressed in the DT regime. We propose a physical model of SILC conduction on the basis of experimental evidence of two distinctly different conduction paths for DT SILC. Monitoring SILC behaviour, the monoenergetic nature of stress-induced neutral traps and hydrogen-induced defects in the oxide is established. Furthermore, our analysis shows that constant voltage stress degrades the device performance more severely than constant current stress.

FABRICATION OF SILICON NANOCRYSTALS AND ITS ROOM TEMPERATURE LUMINESCENCE EFFECTS

Silicon ( Si ) nanocrystals have been considered a good candidate for flash memory device and nanophotonic applications. The fabrication of nanocrystal memory is to form uniform, small size and high density quantum dots. In this study, nanometer-scale silicon quantum dots have been fabricated on ultrathin silicon oxide layer using amorphous silicon (a- Si ) deposition followed by various annealing treatments. The a- Si layers were crystallized using furnace annealing, laser annealing and rapid thermal annealing (RTA). After annealing to form nanometer-sized crystallites, silicon wet etch was carried out to isolate the nanocrystals. The size, uniformity and density of the nanocrystals were successfully controlled by different annealing treatments. The mean dot height and mean dot diameter is 1–5 nm and 2–5 nm, respectively. Lateral growth of the silicon dots was further controlled by systemic variations of the annealing conditions. It is found that the annealed a- Si films exhibit room temperature visible photoluminescence (PL) resulting from the formation of nanometer-sized crystallites. Selective wet etch and Secco-etch treatment increased the PL efficiency that is useful for nanophotonics applications. The feasibility of quantum dot formation using ultra thin amorphous Si films is demonstrated in this work.

Reliability study of ultrathin oxide films subject to irradiation-then-stress treatment using conductive atomic force microscopy

In this work, we investigated the reliability of ultrathin silicon dioxide films subject to an irradiation-then-stress treatment using for the first time a conductive atomic force microscopy (AFM). We found that the conductive AFM gives accurate and reliable characterization of the pre- and post-treatment of oxide films. Based on the conductive AFM measured I– V curves, we concluded that the increased number of defects generated in the oxide bulk is the main mechanism contributing to the oxide degradation after the irradiation-then-stress treatment.

Growth of a stacked silicon nitride/silicon oxide dielectric on Si(100)

We have recently developed processes to grow ultrathin amorphous silicon oxide and amorphous silicon nitride layers on clean Si(111) and Si(100) surfaces exploring the self-limiting nature of the direct oxidation of Si with O2, and the self-limiting nature of the direct nitridation of Si with atomic N produced by microwave dissociation of N2, at processing temperatures around 500°C. In some of today’s microprocessor devices mixed dielectric systems are used as complementary metal oxide semiconductor gate dielectrics. We demonstrate the use of our processes to produce such systems in various structures, and with maximum control, by exposing oxide to N, or nitride to O2 at 500°C. In addition we produce a stacked layer, consisting of 7–8Å of SiO2 on top of Si(100), with a layer of varying thickness of Si3N4 grown on top of this structure. The growth of Si3N4 occurs at room temperature in this process. Such structures or thermally postprocessed structures thereof should be further examined as potential stacked gate dielectrics in the next generation of Si-based microelectronics.

Conductive atomic force microscopy studies of thin SiO2 layer degradation

The dielectric degradation of ultrathin (∼2nm) silicon dioxide (SiO2) layers has been investigated by constant and ramped voltage stresses with the conductive atomic force microscopy (CAFM). CAFM imaging shows clearly the lateral degradation propagation and its saturation. Current-voltage characteristics, performed at nanometer scale, show the trap creation rate in function of the stress condition. The critical trap density has been found.