Types Of Transistors Research Articles

Two-in-One Device with Versatile Compatible Electrical Switching or Data Storage Functions Controlled by the Ferroelectricity of P(VDF-TrFE) via Photocrosslinking

Organic electronics demand new platforms that can make integrated circuits and undergo mass production while maintaining diverse functions with high performance. The field-effect transistor has great potential to be a multifunctional device capable of sensing, data processing, data storage, and display. Currently, transistor-based devices cannot be considered intrinsic multifunctional devices because all installed functions are mutually coupled. Such incompatibilities are a crucial barrier to developing an all-in-one multifunctional device capable of driving each function individually. In this study, we focus on the decoupling of electric switching and data storage functions in an organic ferroelectric memory transistor. To overcome the incompatibility of each function, the high permittivity needed for electrical switching and the ferroelectricity needed for data storage become compatible by restricting the motion of poly(vinylidene fluoride-trifluoroethylene) via photocrosslinking with bis-perfluorobenzoazide. The two-in-one device consisting of a photocrosslinked ferroelectric layer exhibits reversible and individual dual-functional operation as a typical transistor with nonvolatile memory. Moreover, a p-MOS depletion load inverter composed of the two transistors with different threshold voltages is also demonstrated by simply changing only one of the threshold voltages by polarization switching. We believe that the two-in-one device will be considered a potential component of integrated organic logic circuits, including memory, in the future.

Time Resolution and Dynamic Range of Field-Effect Transistor–Based Terahertz Detectors

We studied time resolution and response power dependence of three terahertz detectors based on significantly different types of field effect transistors. We analyzed the photoresponse of custom-made Si junctionless FETs, Si MOSFETs and GaAs-based high electron mobility transistors detectors. Applying monochromatic radiation of high power, pulsed, line-tunable molecular THz laser, which operated at frequencies in the range from 0.6-3.3 THz, we demonstrated that all these detectors have at least nanosecond response time. We showed that detectors yield a linear response in a wide range of radiation power. At high powers the response saturates varying with radiation power P as $U = R_0 P/(1+P/P_s)$, where $R_0$ is the low power responsivity, $P_s$ is the saturation power. We demonstrated that the linear part response decreases with radiation frequency increase as $R_0 \propto f^{-3}$, whereas the power at which signal saturates increases as $P_s \propto f^3$. We discussed the observed dependences in the framework of the Dyakonov-Shur mechanism and detector-antenna impedance matching. Our study showed that FET transistors can be used as ultrafast room temperature detectors of THz radiation and that their dynamic range extends over many orders of magnitude of power of incoming THz radiation. Therefore, when embedded with current driven read out electronics they are very well adopted for operation with high power pulsed sources.

Point Interactions With Bias Potentials

We develop an approach on how to define single-point interactions under the application of external fields. The essential feature relies on an asymptotic method based on the one-point approximation of multi-layered heterostructures that are subject to bias potentials. In this approach , the zero-thickness limit of the transmission matrices of specific structures is analyzed and shown to result in matrices connecting the two-sided boundary conditions of the wave function at the origin. The reflection and transmission amplitudes are computed in terms of these matrix elements as well as biased data. Several one-point interaction models of two- and three-terminal devices are elaborated. The typical transistor in the semiconductor physics is modeled in the "squeezed limit'' as a $\delta$- and a $\delta'$-potentialand referred to as a "point" transistor. The basic property of these one-point interaction models is the existence of several extremely sharp peaks as an applied voltage tunes, at which the transmission amplitude is non-zero, while beyond these resonance values, the heterostructure behaves as a fully reflecting wall. The location of these peaks referred to as a "resonance set" is shown to depend on both system parameters and applied voltages. An interesting effect of resonant transmission through a $\delta$-like barrier under the presence of an adjacent well is observed. This transmission occurs at a countable set of the well depth values.

High photosensitivity AlGaN/GaInN/GaN heterojunction field-effect transistor type visible photosensors

We realized the high-performance AlGaN/GaInN/GaN-based heterostructure field-effect transistor type visible photosensors with high photosensitivity and high rejection ratio. We designed the photosensors including two-dimentional electron gas layer at AlGaN/GaInN/GaN hetero-interface to detect visible light with high photosensitivity. Also, carrier depletion using p-type GaN gate was applied for reduction of the dark current. Furthermore, we realized photosensor with externally low dark current density by applying a C-doped GaN layer as an underlying layer. We found that inserting an unintentionally doped GaN interlayer between the GaInN active layer and the C-doped GaN underlying layer is important for realizing a high-performance photosensors. By employing these device designs, a high photosensitivity of 104 A W−1 at wavelength of 430 nm and high rejection ratio of more than 106 were realized under the irradiation of 100 μW cm−2. The absorption edge wavelength was approximately 480 nm corresponding to the bandgap energy of GaInN active layer. Therefore, this device structure is useful as the visible photosensor with high sensitivity and high rejection ratio.

Analysis of displacement damage effects on bipolar transistors irradiated by spallation neutrons

Displacement damage induced by neutron irradiation in China Spallation Neutron Source (CSNS) is studied on bipolar transistors with lateral PNP, substrate PNP, and vertical NPN configurations, respectively. Comparison of the effects on different type transistors is conducted based on displacement damage factor, and the differences are analyzed through minority carrier lifetime calculation and structure analysis. The influence of CSNS neutrons irradiation on the lateral PNP transistors is analyzed by the gate-controlled method, including the oxide charge accumulation, surface recombine velocity, and minority carrier lifetime. The results indicate that the total ionizing dose in CSNS neutron radiation environment is negligible in this study. The displacement damage factors based on 1-MeV equivalent neutron flux of different transistors are consistent between Xi’an pulse reactor (XAPR) and CSNS.

A Prototype Implementation of Visible Light Communication Based Electrocardiography Data Transmission

VLC-based data transfer technology is one of the concepts of energy efficiency by utilizing existing light sources as media transfers. VLC is proposed to be part of the 5G technology so that its development and application is predicted to be very wide. The application of VLC is one of them in medical instrumentation. In this research, we proposed the prototype of VLC as an electrocardiograph (ECG) signal transfer media. This system consists of a transmitter and receiver using half-duplex mode. Transmitters use LEDs as light sources arranged in arrays and equipped with P-N-P type transistors as LED drivers. The receiver uses a light sensor in the form of a phototransistor. We carry out transmission testing in rooms with several lighting levels (0, 15, 30, 100, and 200 lux). From the test results, analog ECG signals able to sent with a maximum transmission distance of 450 cm.

Negative Capacitance Black Phosphorus Transistors With Low SS

Negative capacitance (NC) shows great potential to enable transistors with the steeper slope, which is very useful for voltage/power applications. Black phosphorus (BP) is theoretically predicted as good channel materials for NC-FETs. However, the experimental demonstration of BP has so far remained elusive. Here, for the first time, NC transistors based on BP have been demonstrated. By connecting to a 20-nm HfZrO ferroelectric capacitor, both two types of BP transistors show lower subthreshold slope (SS). For 5-nm AlOx BP transistor, the SS decreases from 200 to 104 mV/dec. The experimental results are analyzed with the BP-NCFET model, and the calculated transfer curve can fit well with the experimental curve, which proves the validation of the model. Our work sheds light on using NC BP FETs for low-power flexible electronics applications.

Lead Whisker Formation in the Gold-Lead System

Metallic whiskers of pure lead (Pb) have been observed in the solder of several types of transistors. The conditions that lead to these whiskers were evaluated, including characterization of the whisker lengths and whisker density as a function of time and temperature. The potential cause and impact they would have on the reliability of electronics has been investigated. Based on these results, it is hypothesized that these whiskers may be caused by the relief of residual stresses that are created during the evolution of Au-In and/or Au-Pb intermetallic compounds or, possibly, by a decomposition of the AuPb3 phase. Due to their small size, the Pb whiskers that were observed were considered to not be a reliability concern, but similar or larger Pb whiskers could cause electrical failure in some applications.

Investigating structural features of Ba and Zr co-substituted strontium bismuth tantalate thin films

Structural (crystal and microstructure), chemical and electronic states, and ferroelectric and electrical features of Ba and Zr co-substituted strontium bismuth tantalate (SBT) were probed in this study. Distinctly, Ba and Zr were substituted for Ta and Sr sites of \(\hbox {Sr}_{0.8}\hbox {Bi}_{2.2}\hbox {Ta}_{2}\hbox {O}_{9 }\) in the form of \(\hbox {Sr}_{0.8-x}\hbox {Ba}_{x}\hbox {Bi}_{2.2}\hbox {Ta}_{2-y}\hbox {Zr}_{y}\hbox {O}_{9}\). To investigate the impact of the co-substitution on the crystal structure, microstructure, ferroelectric and electrical properties, \(\hbox {Sr}_{0.8-x}\hbox {Ba}_{x}\hbox {Bi}_{2.2}\hbox {Ta}_{2-y}\hbox {Zr}_{y}\hbox {O}_{9}\) thin films were deposited on \(\hbox {Pt/Ti/}\hbox {SiO}_{2}/\hbox {Si}(100)\) wafers by sol–gel spin by coating method. Crystal structure, microstructure, chemical and electronic states, ferroelectric, capacitance and leakage current characteristics of the films were studied to investigate potential for one transistor type ferroelectric random access memories (1T-type FeRAMs). Successful substitutions up to 10 mol% lead to reduction of double remanent polarization \((2P_{\mathrm{r}})\) to \(10.26\,\upmu \hbox {C\,cm}^{-2}\), and dielectric constant \((\varepsilon _{\mathrm{r}})\) to 135. These values demonstrate that successful co-substitution of limited Ba and Zr in SBT with stable crystal structure has the ability to decrease \(P_{\mathrm{r}}\) and \(\varepsilon _{\mathrm{r}}\) values of the ferroelectric material which can be a candidate gate to be utilized in ferroelectric field-effect transistors (FeFETs) for 1T-type FeRAM applications.

Wet Chemical Method for Black Phosphorus Thinning and Passivation.

Layered black phosphorus (BP) has been expected to be a promising material for future electronic and optoelectronic applications since its discovery. However, the difficulty in mass fabricating layered air-stable BP severely obstructs its potential industry applications. Here, we report a new BP chemical modification method to implement all-solution-based mass production of layered air-stable BP. This method uses the combination of two electron-deficient reagents 2,2,6,6-tetramethylpiperidinyl- N-oxyl (TEMPO) and triphenylcarbenium tetrafluorobor ([Ph3C]BF4) to accomplish thinning and/or passivation of BP in organic solvent. The field-effect transistor and photodetection devices constructed from the chemically modified BP flakes exhibit enhanced performances with environmental stability up to 4 months. A proof-of-concept BP thin-film transistor fabricated through the all-solution-based exfoliation and modification displays an air-stable and a typical p-type transistor behavior. This all-solution-based method improves the prospects of BP for industry applications.

Ferroelectric Field Effect Transistors Based on PZT and IGZO

Ferroelectric field effect transistors (FeFETs) based on lead zirconate titanate (PZT) ferroelectric material and amorphous-indium-gallium-zinc oxide (a-IGZO) were developed and characterized. The PZT material was processed by a sol-gel method and then used as ferroelectric gate. The a-IGZO thin films, having the role of channel semiconductor, were deposited by radio-frequency magnetron sputtering, at a temperature of ~50°C. Characteristics of a typical field effect transistor with SiO2 gate insulator, grown on highly doped silicon, and of the PZT-based FeFET were compared. It was proven that the FeFETs had promising performances in terms of Ion/Ioff ratio (i.e., 106) and IDS retention behavior.

Unipolar to ambipolar semiconductivity switching in charge transfer cocrystals of 2,7-di-tert-butylpyrene

Charge transfer cocrystals of 2,7-di-tert-butylpyrene donor and tetracyanoquinodimethane, tetracyanobenzene and 1,3-dinitrobenzene acceptor exhibited switchable semi-conductivity.

Opportunities and Challenges in Designing and Utilizing Vertical Nanowire FET (V-NWFET) Standard Cells for Beyond 5 nm

Nanowire field-effect transistors (NWFETs) are known to become the emerging transistor type for better performance and low power for future technology nodes beyond 7 nm. Their unique structures allow the transistors to be designed horizontally or vertically, leading to a smaller form factor. However, it is not well studied on how much improvements NWFETs can achieve, especially when vertical FETs (V-NWFETs) are invoked in designs. In this paper, we investigate the advantages that NWFETs provide to standard cell designs. We propose an interconnect structure and a design methodology that optimize design metrics such as area, wirelength, and capacitance of V-NWFET standard cells. Then, we perform comparisons on these design metrics to standard cells between FinFET, horizontal NWFET (H-NWFET), and V-NWFET. This study shows that H-NWFETs achieve significant capacitance reduction compared to the conventional FinFETs (-30.1%). In addition, V-NWFETs achieve even more capacitance reduction (-50.0%), and significant reduction in area (-22.5%) and wirelength (-14.4%) compared to FinFETs. This is possible because (1) fin-to-metal coupling consists of a significant portion in total capacitance and NWFETs contribute to the large reduction of this capacitance and (2) standard cells using V-NWFETs reduce significant area and wirelength compared to conventional FinFET standard cells. However, careful design and proper interconnect structure are required to fully exploit the design advantages.

A New Type of Transistor

SOLUTION FOR NEXT GENERATION NANOCHIPS COMES OUT OF THIN AIR.

Suppressing Ambipolar Characteristics of WSe2 Field Effect Transistors Using Graphene Oxide

AbstractMonolayer (1L) tungsten diselenide (WSe2) is of interest for next generation ultrathin flexible electronic devices. However, typical WSe2 field effect transistors (FETs) show ambipolar characteristics that are not desirable for complementary field‐effect‐transistors and circuits. Here, significant suppression of the ambipolar characteristics of a 1L‐WSe2 FET is demonstrated by using an electron withdrawing functional group of graphene oxide (GO). The pristine 1L‐WSe2 FET shows n‐type dominant ambipolar characteristics, whereas the GO coated 1L‐WSe2 FET shows unipolar p‐type behavior with a huge decrease (1/106) of current level of the n‐channel. Also, the current level of the p‐channel increases up to ten times that of the pristine 1L‐WSe2 FET. These results are applicable for the realization of flexible nanoscale digital logic devices by using transition metal dichalcogenides.

A Broadband Phototransistor Based on Three-Dimensional Reduced Graphene Oxide Foam

Three-dimensional (3D) cross-linked polymer-like reduced graphene oxide foams (rGOFs) with a seamlessly continuous graphene network, exhibit high photoresponsive and conductivity and have received much attention regarding solar cells and supercapacitors. However, little attention has been paid to photodetection applications of 3D rGOFs. Here we report a novel broadband phototransistor based on metal-3D GFs-metal, which exhibits a high light absorption and a wide spectra response ranging at least from 400 to 1600 nm wavelength with a maximum photoresponsivity of 10 mA/W at 400 nm. In particular, stable and reproducible photocurrent cycles are achieved under different light blue light (405 nm), green light (532 nm), and NIR (808 nm) irradiations. Moreover, the device displays a typical transistor characteristic with a rapid response time of 18 ms at under 532 nm irradiation. The excellent performances indicate 3D rGOF as a promising candidate for future photodetection application.

A 0.12–0.4 V, Versatile 3-Transistor CMOS Voltage Reference for Ultra-Low Power Systems

In this paper, we propose an ultra-low power compact 3-transistor voltage reference capable of operating at ultra-low supply voltages. The proposed circuit is based on the self-cascode MOSFET (SCM), which provides a reference voltage proportional to the threshold voltage ( $V_{T}$ ) difference of the two NMOS transistors that compose it. Reverse short-channel and narrow-width effects are explored to obtain such $V_{T}$ difference while using the same type of transistor. Ultra-low power operation and low line sensitivity is achieved by biasing the SCM with a zero- $V_{T}$ (native) transistor, also leading to an area efficient design. To show its versatility, three versions of the proposed circuit were fabricated in a standard 0.13- $\mu \text{m}$ CMOS process. Measurement performed over five samples showed an average temperature coefficient of 150–1500 ppm/°C. Minimum supply voltages of 0.12–0.4 V was observed while providing reference voltages around tens of mV. The proposed circuits consume 0.33–50 pW at room temperature and minimum supply voltage. The occupied area for any version is less than 0.0012 mm2.

Експериментальне дослідження вольт-амперних характеристик аналога лямбда-діода на уніполярних транзисторах

The quality of the electrical equipment protection pad depends first and foremost on the type of primary converters used to control the diagnostic parameters. Therefore, the question of designing and studying the parameters and capabilities of modern transducers, such as the lambda diode, is relevant. The purpose of the study is to analyze the volt-ampere characteristics of the complementary pairs of transistors and to determine the parameters and limits of its use as a converter. The scientific work is devoted to research the primary converter characteristics and capabilities, based on lambda-diode analogue which is used to monitoring diagnostic parameters in electrical equipment protection devices. The advantage of the lambda-diode is possibility to obtain volt-amps diagram with a negative-resistance section, and the disadvantage is impossibility to regulate or increase the width of its natural volt-amps diagram, so their analogs based on different circuitry principles are used. In this research were consider a lambda-diode analogue based on FET-transistor, which makes it possible to vary the width of the volt-amps diagram with negative resistance. This property can be used in protection circuits. The task is to research volt-amps diagram the different complementary transistors pairs of analogue have and to determine their parameters and limits to use as a primary converter. Electrical circuit and a test procedure were compiled as well. Based on researching results of different transistors types it is determined the type of transistor practically does not affect the parameters of the VA-diagram. The volt-amps diagram of analogue does not change when combining the drains or sources of FET-transistors. There was defined a relationship between resistance of voltage divider, the applied voltage and their influence on width the negative resistance section of VA-diagram.

Multiphysics Modeling and Simulation of Carrier Dynamics and Thermal Transport in Monolayer MoS2/WSe2 Heterojunction

Computational study of atomically thin monolayer MoS2/WSe2 heterojunction with focus on carrier dynamics and thermal transport is performed by using finite-difference method to solve carrier transport equations and heat conduction equation. Carrier transport in the horizontal direction is in the micrometer scale, while in the vertical direction it is on the subnanometer scale. Carrier transport is modeled as diffusive transport in the horizontal direction with tunneling-assisted carrier recombination between two monolayers in the vertical direction as in the previous study. Band profile, quasi-Fermi level splitting, carrier distribution, and heat generation are investigated in detail. The heterojunction with high-doping concentration has larger current compared to that with low-doping concentration. Heat generation has two components which are due to the Joule heating and inelastic carrier recombination, respectively. The former is provided by the applied voltage, while the latter is from surrounding environment which acts as thermal reservoir. Since the heterojunction works very differently from the conventional p-n diode, it is compared to typical field-effect transistors due to similar device structures. The heat generation of the heterojunction is eight orders lower than that of typical nanoscale field-effect transistors because of its low-current density. Temperature increase in the heterojunction is also several orders of magnitude lower compared to typical nanoscale field-effect transistors.

Gate Leakage Tunneling Impact on the InAs/GaSb Heterojunction Electron–Hole Bilayer Tunneling Field-Effect Transistor

Among the different types of bilayer tunneling field-effect transistors exploiting interband tunneling phenomena with tunneling directions aligned with gate-induced electric fields, the utilization of InAs/GaSb channels proves to be an appealing means to enhance ON-current levels. Ultrathin channel thicknesses make quantum confinement be the agent that closes the broken gap of the InAs/GaSb heterojunction leading to a staggered gap which blocks the tunneling current in the OFF state. In this paper, the gate leakage tunneling current is analyzed as one of the main critical processes degrading the performance of the proposed structure. Appropriate gate stacks of HfO2/Al2O3 combined with gate-to-drain underlaps are shown to effectively suppress this leakage tunneling, while at the same time, preserve an adequate electrostatic control over the channel. Simulation results for the most optimized configurations feature ON-state levels of up to $400\mu \text{A}/\mu \text{m}$ and subthreshold swings of $\approx 3$ mV/dec over more than 7 decades of current.