On-wafer probes are used to obtain vector network analyzer (VNA) measurements for the close packed PCB channels in the system applications. The S-parameter model of the probes is de-embedded from channel data in a two-tier calibration, which is an efficient option to perform the calibration. The one port method with short-open-load (SOL) standards derives the probe models. Its accuracy relies on the accurate knowledge of the electrical property of the SOL standards used in the calibration. In this paper, the modeling methodology of SOL standards on the calibration substrate is presented. The models for SOL standards are determined empirically by using the measured zero-length thru data as a reference. An optimization algorithm is applied to aid the search of the best models for SOL standards. The standards are also simulated with a 3D full wave field solver to capture the physical aspect of the layout of the standards directly, though it is limited as an approximation.
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