Two-port Adaptor Research Articles

Memory Extraction From Dynamic Scattering Junctions in Wave Digital Structures

In this letter, we show that a computable tree-like interconnection of parallel/series wave digital (WD) adaptors with memory (i.e., characterized by reflection filters instead of reflection coefficients) is equivalent to a like interconnection of standard (memoryless) adaptors whose peripheral ports are connected to mutators (two-port adaptors with memory). In proving all this, we provide a methodology for "extracting the memory" from a macro-adaptor, which can be fruitfully employed to simplify the implementation of WD structures

Algorithm for mapping all-pole system parameters to wave-digital filter multiplier coefficients

Based on the technique of wave-chain matrices and the digital equivalent of canonic polynomials, a recursive algorithm is derived to map the parameters of an all-pole system to the multiplier coefficients of a wave-digital filter consisting of two-port adaptor cascades. The algorithm will be useful in all-pole system modeling which adopts such a filter as a final form of realization.

Realisation of lattice wave digital filters using three-port adaptors

The second-order allpass section is the main building block of the lattice wave digital filter (LTWDF). This is conventionally realised using two-port adaptors. The authors present a comparison between the two-port realisation of the second-order allpass section and another based on the three-port series adaptor. It is shown that the sample rate of LTWDFs can be increased by up to 90% with the three-port realisation.

Two port adaptor for wave digital filters based on nonredundant radix-4 arithmetic

Wave digital filters synthesised from two port adaptors are highly recursive structures and hence for high speed implementations it is essential to reduce the latency of the adaptor. This is directly related to the number of addition levels used. Nonredundant radix-4 arithmetic has already been shown to nearly halve the number of levels compared with an uncoded multiplication with much less hardware overhead than the modified Booth algorithm. In the Letter, nonredundant radix-4 arithmetic is applied to the two-port adaptor. The results compare favourably with previous approaches for most coefficient wordlengths of practical interest.

On the design of a broad class of 2-D recursive digital filters with fan, diamond and elliptically-symmetric responses

This paper deals with the design of a broad class of 2-D recursive digital filters including general fan, diamond and elliptically-symmetric filters. At first, the explicit design of quadrant and /spl plusmn/45/spl deg/ fan filters is reviewed. A full-plane diamond filter (both axes are nearly of length 2 /spl pi/) can easily be obtained through an appropriate transformation of a /spl plusmn/45/spl deg/ fan filter. Using this diamond filter as a prototype, a very simple spectral transformation is then proposed to design full-plane circularly-symmetric filters (radius /spl ap//spl pi/). These filters share the same lattice wave digital structure and employ only first or second order all-pass sections which can be realized by two-port adaptors. They provide very desirable properties such as low sensitivity, high dynamic range and good stability even under finite arithmetic conditions. Using the above mentioned filters as prototypes, a multirate approach is then introduced to deal with the design of fan filters with arbitrary angle and orientation, diamond and elliptically-symmetric filters with arbitrary length of axes. Finally, some design examples are given. >

High performance VLSI architecture for Wave Digital Filtering

The application of fine grain pipelining techniques in the design of high performance Wave Digital Filters (WDFs) is described. It is shown that significant increases in the sampling rate of bit parallel circuits can be achieved using most significant bit (msb) first arithmetic. A novel VLSI architecture for implementing two-port adaptor circuits is described which embodies these ideas. The circuit in question is highly regular, uses msb first arithmetic and is implemented using simple carry-save adders.

The design of wave digital filters using fully pipelined bit-level systolic arrays

Wave digital filters (WDF) based on analogue lattice and unit element cascade networks possess important properties that make them suitable for VLSI integration. These include low round-off noise even with short coefficient wordlength and a building block (two-port adaptor) with a very simple structure. Exploiting these properties leads to area efficient designs. Systolic architectures for these WDF networks give the additional advantage of very high sampling rates with potential application in sonar and video signal processing. The bit-level systolic array design of two WDFs is considered in detail, beginning at the filter specification and ending at the VLSI hardware architecture, with discussion of the expected values of the integrated circuit parameters.

Signal processor implementation of digital all-pass filters

The implementation of digital filter structures of all-pass subfilters using modern high-speed signal processors is investigated. The focus is on digital all-pass filters realized as a cascade of first- and second-order all-pass sections. Wave digital all-pass sections are considered, with special emphasis on developing two-port adaptor structures that are suitable for signal processor implementation. Explicit formulas are developed for scaling and round-off noise analysis of these all-pass sections. Other well-known first- and second-order all-pass filter sections are considered. The performance of the various all-pass filter structures are compared with respect to roundoff noise, parasitic oscillations, and speed of signal processor implementation. >

Alternative method to magnitude truncation in wave digital filters

It will be shown how dissipation can be introduced in a class of wave digital filters involving two-port adaptors without necessarily increasing the number of adders and multipliers. The dissipation introduced this way represent an alternative method to magnitude truncation.

A Pseudopassive Two-port Adaptor for Floating-point WDFs

A Pseudopassive Two-port Adaptor for Floating-point WDFs