Abstract
In this letter, we show that a computable tree-like interconnection of parallel/series wave digital (WD) adaptors with memory (i.e., characterized by reflection filters instead of reflection coefficients) is equivalent to a like interconnection of standard (memoryless) adaptors whose peripheral ports are connected to mutators (two-port adaptors with memory). In proving all this, we provide a methodology for "extracting the memory" from a macro-adaptor, which can be fruitfully employed to simplify the implementation of WD structures
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