Two-level Pulse Width Modulation Research Articles

An Optimal Current Control Strategy for Asymmetrical Hybrid Multilevel Inverters

An optimal current control strategy for asymmetrical hybrid multilevel inverters (MLIs) is proposed in this paper enabling their use on motor drives, static synchronous compensators, and photovoltaic and wind generators, where a fast and precise current regulation is required. A key feature of these highly efficient converters is that an ac machine (motor or transformer) operates according to an open-end winding configuration, connected on one side to a main MLI and, on the other side, to an auxiliary two-level inverter (TLI). The first efficiently controls the main power stream operating at a low switching frequency, while the TLI acts as an active power filter, exploiting a conventional high-frequency two-level pulsewidth modulation (PWM) technique. The proposed control scheme optimally exploits the key features of the two inverters by suitably sharing the control task. In fact, a predictive current control is assigned to the MLI, which can be accomplished by low switching frequency operations, while the high switching frequency of the PWM-operated TLI is exploited to accomplish a fast and precise closed-loop current control, processing only a part of the power stream flowing through the system, thus producing low power losses. Simulations and experimental results confirm the consistency of the proposed approach.

Analysis and Design of a Family of Two-Level PWM Plus Phase-Shift-Modulated DC–DC Converters

A comprehensive analysis for a family of two-level pulsewidth modulation plus phase-shift (PPS)-modulated-isolated-bidirectional dc–dc converters is presented in this paper. Compared with the traditional phase-shift control, the PPS control features reduced current stresses, reduced conduction losses, guaranteed zero-voltage switching (ZVS) operation, and wide conversion-ratio variation range. In this paper, all eight operation modes are revealed, and then the unified solution of the power transmission capability for each mode is proposed, applicable for any two-level PPS converters. Based on the unified solution, component stresses and ZVS operation are analyzed to assist component selection. Most importantly, the control maps for three different combinations of the two-level PPS converters are proposed, to assist converter operation and design in the low-circulating-current region. In the control map, a circuit parameter k is proposed and its upper limit is found, providing a design limit to select switching frequency, leakage inductance, turns ratio, and power level. A 29–67 V/380 V prototype—the combination of group C plus group A—rated at 100–1000 W was built. The analysis is verified by both simulation and experimental results.

Performance analysis of zero common‐mode voltage pulse‐width modulation techniques for three‐level neutral point clamped inverters

This study surveyed three zero common-mode voltage (CMV) pulse-width modulation (PWM) methods for three-phase three-level neutral point clamped voltage source inverters, investigates their performance characteristics, and provides a comparison with the standard three-level and two-level space vector PWM methods. DC-link voltage utilisation, harmonic distortion factor, DC-link current ripple factor and power losses of each PWM method are thoroughly investigated by analysis, simulations and experiments. The research results illustrate the advantages and disadvantages of the compared methods and provide the basis for the selection and application of appropriate PWM methods in low CMV requirement fields.

Design and Development of an Efficient Multilevel DC/AC Traction Inverter for Railway Transportation Electrification

This paper presents a new trend in the transportation industry to adopt the multilevel inverter-based propulsion systems and gives the design procedure of a new DC/AC three-phase six-level inverter for powering the rail metro cars. The proposed inverter is based on the multilevel converter as it possesses much lower component voltage stress compared with the pulsewidth-modulated (PWM) topologies. Space vector pulsewidth modulation (SVPWM) with back-to-back clamped diode voltage modulation operation is used to achieve voltage regulation and high efficiency at any loading condition. Zero-current-switching operation is achieved without using an auxiliary circuit, which leads to minimum switching losses. The novelty of the proposed inverter lies within the proposed control methodology, which uses a new switching pattern that guarantees a modified SVPWM to eliminate the unwanted harmonics from the output voltage. The new algorithm is developed using numerical iterative solution using the Newton-Raphson technique that was downloaded to the processor using digital signal processing developed code. The mathematical model is simple but proven to be effective. As a result, a higher operating efficiency at full load of 98.5% is achieved as compared to previous efficiency of 97%. Analytical, simulation, and experimental results of a 1500 Vdc/700 Vac 400-kW converter are presented to offer the proof of concept. The converter provides real estate savings for the train under floor layout, higher operating efficiency as well as better cost price than the conventional two-level PWM hard-switched converters.

A 5 Gb/s Energy-Efficient Voltage-Mode Transmitter Using Time-Based De-Emphasis

In this paper, we present a time-based equalization scheme to implement transmit de-emphasis in voltage-mode drivers. Using two-level pulse-width modulation, this work decouples the tradeoff between impedance matching, output swing, and de-emphasis resolution in conventional voltage-mode drivers using voltage-based de-emphasis. A prototype PWM-based 5 Gb/s voltage-mode transmitter was implemented in a 90 nm CMOS process and characterized across different channels and output swings. The horizontal/vertical eye opening (BER=10 -12 ) at the end of 60 and 96 in stripline channels is 78 mv/0.6 UI and 8 mV/0.3 UI, respectively. Duty cycle distortion of the clock severely reduced the margins, so the overall performance can be improved by applying duty-cycle correction to clock signals. The transmitter consumes a total power 15.6 mW of which 2.5 mW is consumed in the digital PLL and 7.8 mW in the pre-/output drivers and regulators. This translates to a power efficiency of 3.1 mW/Gb/s, which compares favorably with the state of the art.

Improving Switching Frequency Variation of Hysteresis Current Controlled VSI Fed Induction Motor Drive

Switching frequency variation over the entire operating speed range of an induction motor (IM) drive is the major problem associated with conventional two-level threephase hysteresis controller as well as the space phasor based pulse width modulation (PWM) hysteresis controller. This paper presents a new variable band hysteresis current controller for controlling the switching frequency variation in the two-level PWM inverter fed IM drives for various operating speeds. A novel concept of online variation of the band based on both the instantaneous load current and current change for eachsampling period is presented to determine the hysteresis band. A performance comparison of the proposed with conventional hysteresis current controller for IMdrive is provided in simulation. The proposed drive system is also implemented in real-time using DSP board DS1104 for a laboratory 1.5 hp motor. Comparative simulation andreal-time results verify the feasibility of the proposed scheme and demonstrate that the proposed method has obtained constant switching frequency and improved the performance of the drive system.

THE MULTILEVEL TECHNIQUE FOR IMPROVING FILTERLESS CLASS-D AUDIO AMPLIFIERS

Class-D amplifier features very high efficiency on power delivery because its switching operation consumes tiny static power on very low on-resistance. In this work, a multilevel technique is presented to improve total-harmonic-distortion (THD) and signal-to-noise-ratio (SNR) of pulse-width-modulation (PWM) filterless class-D amplifiers. The proposed method consists of a multilevel converter and a time division adder (TDA) followed by PWM modulator. The PWM-modulated signal is arranged into several time divisions and then integrated and encoded to a set of parallel control signals for multilevel converter. Instead of the two-level PWM signal, the output signal of a multilevel converter is as stairway with less transient variation. The performance of THD and SNR are therefore improved because the instantaneous variation of signal is greatly reduced. To demonstrate the proposed method, a filterless audio amplifier was implemented by TSMC 5 V–0.35 μm CMOS technology. With 8 Ω speaker and 550 mW maximum power, experiment results show that the THD, SNR and power efficiency can be achieved over 0.02%, 85 dB and 85%, respectively.

New management structure of active and reactive power of a large wind farm based on multilevel converter

This paper proposes a system of supervision and operation of a new structure wherein a large wind farm is connected to an electrical grid. The farm is managed in such a manner that it can produce the power needed by the grid system. The supervision algorithm is used to distribute the active and reactive power references to the wind turbines proportionally. Based on the aerodynamic power and wind speed of each turbine, the active and reactive power references are produced individually. By using the vector field oriented control, each doubly fed induction generator is controlled through the rotor, which is connected to the two-level pulse width modulation converter. The close loop control is used to provide a constant DC voltage using a five-level neutral point clamped converter. The five-level neutral point clamped converter allows also the adaptation of the voltage level to the electrical grid with better resolution waveform. The analysis of the simulation results shows the effectiveness of the proposed system.

Analysis and Comparison of Peak-to-Peak Current Ripple in Two-Level and Multilevel PWM Inverters

Three-phase multilevel (ML) inverters are used in many medium- and high-power applications such as motor drives and grid-connected systems. Despite the fact that numerous pulsewidth modulation (PWM) techniques for ML inverters have been developed, the impact of these modulation schemes on the peak-to-peak output current ripple amplitude has not been addressed yet. In this paper, analysis and comparison of current ripple for two-level (2L) and three-level (3L) voltage source inverters are given. Reference is made to optimal and popular modulation, so-called centered PWM, easily obtained by both carrier-based modulation (phase disposition, with proper common-mode voltage injection) and space vector modulation (nearest three vectors). It is shown that the peak-to-peak current ripple amplitude in 3L inverters can be determined on the basis of the ripple in 2L inverters, obtaining the same results as by directly analyzing the output voltage waveforms of the 3L inverters. This procedure can be readily extended to higher level numbers. The proposed analytical developments are verified by both numerical simulations and experimental tests.

Experimental Verification of a Modular Multilevel Cascade Inverter Based on Double-Star Bridge Cells

A modular multilevel cascade inverter based on double-star bridge cells (MMCI-DSBC) is expected to be one of the next-generation medium-voltage pulsewidth modulation (PWM) inverters intended for grid connections. This inverter is formed by six modular arms, each of which consists of a cascaded stack of multiple full-bridge converters. The DSBC is different from the traditional two-level PWM inverter in that the ac voltages are independent of the dc link voltage. Hence, the DSBC is suitable for a grid-connected inverter with a time-varying dc link voltage. This paper describes the DSBC with a focus on its operating principles and performance. The validity of the inverter is confirmed by experiments using a three-phase, 200-V, and 10-kW downscaled system.

Comparison of Multilevel Inverters for the Reduction of Common Mode Voltage

This paper presents a comparison between NPC (neutral point clamped) and H-cascaded multilevel inverters by considering the increas or decrease of harmonics in the output line to line voltages, phase voltages and common mode voltage. Multilevel voltage source converters are getting increased importance for applications in the medium and high voltage range. A conventional two-level PWM (pulse width modulated) inverter generates high frequency common mode voltage with high dv/dt. In the same way, commonly used multilevel inverter modulation schemes generate common mode voltage. Common mode voltage may cause motor shaft voltages, bearing currents and EMI (electromagnetic interference). Common mode voltage depends not only on switching method but also on earth mass. The use of earth mass on a proper pl. DOI: http://dx.doi.org/10.11591/ijpeds.v3i2.3605

Analysis and Verification of Two-Level Random Aperiodic PWM Schemes for DC–DC Converters

A typical two-level pulsewidth modulation scheme for a dc-dc converter generates a signal that has two values: 0 and 1. For a random aperiodic scheme, the switching period can be modulated in a random fashion with a known probability density function (pdf). In this paper, analytical expressions for both discrete and continuous spectra are provided for the case where different pdfs are used to modulate the switching signal of a dc-dc converter. Experimental results for a random aperiodic scheme that is used to optimize the output ripple of a buck dc-dc converter are provided to support the theoretical claims.

A General Analytical Method for Calculating Inverter DC-Link Current Harmonics

Accurate identification of a DC-link ripple current is an important part of switched power-converter design, since the spectral content of this current impacts on DC bus-capacitor lifetime, the stability of the converter control, and the electromagnetic-interference (EMI) performance of the system. Conventionally, the RMS magnitude of the ripple current is used to evaluate this impact, but this approach does not readily differentiate between pulsewidth-modulation (PWM) strategies, and can be challenging to evaluate for more complex converter topologies. This paper presents a new generalized approach that analytically determines the harmonic spectrum of the DC-link and DC-bus capacitor currents for any voltage-source switched converter topology. The principle of the strategy is that the product of a phase-leg-switching function and its load current in the time domain, which defines the switched current flowing through the phase leg, can be evaluated in the frequency domain by convolving the spectra of these two time-varying functions. Since PWM has a discrete line-frequency spectrum, this convolution evaluates as an infinite summation in the frequency domain, which reduces to a simple frequency shift of the PWM spectrum when the load current is assumed to be a fundamental single-frequency sinusoid. Hence, the switched currents flowing through the phase legs of an inverter can be evaluated as a summation of harmonics for any PWM strategy or inverter topology and can then be readily combined using superposition to determine the DC-link and DC bus-capacitor currents. The analytical approach has been verified against experimental results for an extensive range of two-level and multilevel converter topologies and PWM strategies.

Switching losses and harmonic investigations in multilevel inverters

Use of conventional two-level pulse width modulation (PWM) inverters provide less distorted current and voltage but at the cost of higher switching losses due to high switching frequencies. Multilevel inverters are emerging as a viable alternative for high power, medium voltage applications. This paper compares total harmonic distortion and switching losses in conventional two-level inverters with multilevel inverters (three-level and five-level) at different switching frequencies. An optimized switching frequency has been obtained for a lower level of total harmonic distortion and switching losses. Diode-clamped, three-phase topology is considered for study. A sinusoidal PWM technique is used to control the switches of the inverter. Simulation study confirms the reduction in harmonic distortion and switching losses as the number of the levels increases.

Multifunctional Grid-Connected Multimodule Power Converters Capable of Operating in Single-Pulse and PWM Switching Modes

Pulsewidth-modulated (PWM) techniques equip power converters with unique features such as input-output linearity and control flexibility. Nevertheless, frequent switching of semiconductor switching devices causes considerable switching loss, and therefore makes traditional two-level PWM converters inappropriate for high-power applications. Two alternatives for building modular structures, namely multipulse and multimodule PWM converters were introduced to provide not only voltage and current sharing among the semiconductor switching devices, but also a high-quality output voltage at a much lower switching frequency. While multipulse converters offer minimal switching losses, low-order harmonic neutralization, and the best utilization of the inverter, multimodule PWM converters give control flexibility and power structure simplicity. This paper combines these two, and preserves the advantages of both multipulse and multimodule PWM converters. This not only provides an additional degree of freedom for voltage control, but also enables the converter to operate in PWM mode during transient and in single-pulse mode during the steady state. For the PWM switching mode, a special space vector strategy of 3 p.u. switching frequency is presented to maximize the voltage utilization and maintain a linear transfer characteristic. The power structure and control methods are analyzed, and validated by simulation and experimentally.

The influence of different voltage waveforms and grain sizes in electrical steels losses

Square and two-level pulse width modulation (PWM) magnetic induction waveforms are investigated and their effect on electrical steels losses as a function of the grain size is determined. The increase of hysteresis losses—as compared to that resulting from sinusoidal voltages—occurs only for two-level PWM waveforms. Total losses are lower for square waveform, and the difference between losses under square and sinusoidal waveform increase with increasing grain size, result explained with the loss separation model.

Low-Power High-Voltage Power Modulator for Motor Insulation Testing

Variable-speed pulsewidth-modulated (PWM) drives allow for precise speed control of induction motors, as well as a high power factor and fast response characteristics, compared with nonelectronic speed controllers. However, due to the high switching frequencies and the high dV/dt, there are increased dielectric stresses in the insulation system of the motor, leading to premature failure, in high power and medium- and high-voltage motors. Studying the degradation mechanism of these insulation systems on an actual motor is both extremely costly and impractical. In addition, to replicate the aging process, the same waveform that the motor is subjected to should be applied to the test samples. As a result, a low-power two-level high-voltage PWM inverter has been built to replicate the voltage waveforms for aging processes. This generator allows for testing the insulation systems considering a real PWM waveform in which both the fast pulses and the fundamental low frequency are included. The results show that the effects of PWM waveforms cannot be entirely replicated by a unipolar pulse generator.

Novel Current Error Space Phasor Based Hysteresis Controller Using Parabolic Bands for Control of Switching Frequency Variations

A current error space phasor based simple hysteresis controller is proposed in this paper to control the switching frequency variation in two-level pulsewidth-modulation (PWM) inverter-fed induction motor (IM) drives. A parabolic boundary for the current error space phasor is suggested for the first time to obtain the switching frequency spectrum for output voltage with hysteresis controller similar to the constant switching frequency voltage-controlled space vector PWM-based IM drive. A novel concept of online variation of this parabolic boundary, which depends on the operating speed of motor, is presented. A generalized technique that determines the set of unique parabolic boundaries for a two-level inverter feeding any given induction motor is described. The sector change logic is self-adaptive and is capable of taking the drive up to the six-step mode if needed. Steady-state and transient performance of proposed controller is experimentally verified on a 3.7-kW IM drive in the entire speed range. Close resemblance of the simulation and experimental results is shown

A Three-Level MOSFET Inverter for Low-Power Drives

This paper proposes operating a three-level neutral-point-clamped (NPC) inverter using a two-level pulsewidth-modulation method. This allows for the clamping diodes to be rated at a fraction of the main switches due to their low average current requirement. The use of a bootstrap charge pump as a low-cost method to obtain the isolated gate drive power supplies is extended for use with the NPC topology. Using this control method and circuits, an inverter based on high-volume, low-cost, low-voltage power MOSFETs is experimentally demonstrated as a possible economic alternative to an insulated-gate-bipolar-transistor-based drive for 120-Vrms-supplied systems.

Control technique for high power factor multilevel rectifier

Three control techniques for a high power factor multilevel pulsewidth modulation (PWM) rectifier are proposed. The proposed rectifier is based on series connection of full-bridge cell to achieve a high power factor, low current distortion, low voltage stress of power semiconductors and two balanced output voltages. The look-up table is used in the proposed control schemes to reduce the hardware circuit. A capacitor voltage compensator is used to balance two dc capacitor voltages in order to obtain high quality PWM voltage pattern. Based on the proposed control schemes, two-level or three-level PWM pattern can be generated on the ac side of the adopted rectifier. The proposed techniques for a high power factor multilevel rectifier illustrate its validity and effectiveness through the respective simulations and experiments. According to the measured results, the current harmonics drawn from the mains meet the International Electrotechnical Commission (IEC) 1000-3-2 limits.