Two-level Mapping Research Articles

Vision Transformer-based overlay processor for Edge Computing

Accelerating Visual Neural Networks in Edge Computing environments is crucial for processing image and video data. Visual Neural Networks, including Convolutional Neural Networks and Vision Transformers, are central to image recognition, video analysis, and object detection tasks. Deploying these networks on edge devices and accelerating them can significantly enhance data processing speed and efficiency. The large number of parameters, complex computational flows, and various structural variants of Transformer models present both opportunities and challenges. We propose Vis-TOP (Vision Transformer Overlay Processor), an overlay processor designed for all types of Vision Transformer models. Vis-TOP, distinct from coarse-grained general-purpose accelerators like GPUs and fine-grained custom designs, encapsulates Vision Transformer characteristics into a three-layer, two-level mapping structure, enabling flexible model switching without hardware architecture modifications. Concurrently, we designed a corresponding instruction bundle and hardware architecture within this mapping structure. We implemented the overlay processor design on the ZCU102 after quantizing the Swin Transformer model to 8-bit fixed points (fix_8). Experimentally, our throughput surpasses GPU implementation by 1.5 times. Our throughput per DSP is 2.2 to 11.7 times higher than that of existing Transformer-like accelerators. Overall, our approach satisfies real-time AI requirements in resource consumption and inference speed. Vis-TOP offers a cost-effective image processing solution for Edge Computing on reconfigurable devices, enhancing computational resource utilization, saving data transfer time and costs, and reducing latency.

Intelligent path planning by an improved RRT algorithm with dual grid map

This research addresses the limitations of existing autonomous vehicle path planning algorithms, notably their slow processing speeds and suboptimal route efficiency. We introduce an innovative path planning algorithm that synergizes the A* algorithm with the Rapidly-exploring Random Tree (RRT) approach. This hybrid model significantly enhances route timeliness and reliability, particularly in obstacle avoidance scenarios for driverless vehicles. Our methodology employs a 'two-level map' approach, where a lower-resolution grid map is derived from a high-resolution map. Utilizing the A* algorithm on this framework, we ascertain a preliminary 'coarse path' for the navigation target. The RRT algorithm, modified to reduce the traditional redundancy associated with random uniform sampling, is then applied for probabilistic sampling within this defined area. ovel aspect of our approach is the simultaneous generation of two trees, originating from both the start and end points, guided by a target-biased strategy and dual-direction theory. This method probabilistically expands towards the node of the opposite tree, thereby enhancing both the generation speed and trajectory viability. Further refinements are made through a pruning process, optimizing the path, and employing Bezier curves for smoothing, ensuring compliance with the dynamic constraints of Ackerman chassis vehicles. Comparative analysis in complex environments demonstrates the superiority of our proposed algorithm. It outperforms traditional methods with a 400 % increase in planning speed relative to the RRT-Connect algorithm, and a 30 % reduction in average path length. Additionally, the mean curvature of routes generated by our algorithm is 19 % lower than traditional routes, underscoring significant advancements in both the timeliness and viability of the planned routes.

An automatic text generation algorithm of technical disclosure for catenary construction based on knowledge element model

Preparing technical disclosure documents has always been a labor-intensive task in the site management practice of current OCS (Overhead Contact System) project construction, and the overall information level of construction management is not high. As a result, the technical disclosure documents are of poor quality, which significantly affects the effective play of technical documents in guiding construction activities. In view of the above limitations, this paper proposes a text-generation method for OCS engineering technical disclosure based on a knowledge element model. By investigating the characteristics of OCS engineering technical knowledge, a representation model is established to model the technical knowledge from multiple sources, such as case data, standard specifications, and design data. As OCS engineering is highly standardized, we propose a case-rule hybrid reasoning model for the reuse of OCS engineering case knowledge. The mining and utilization of earlier engineering technical knowledge are made possible by similar retrieval of precedent situations and adaptive rules modification. Finally, we suggest an automatic text-generating technique based on a configuration template for new building projects. The knowledge element model is converted into a technical disclosure document expressed in natural language using a two-level mapping process. The cantilever installation project is used as an illustration for empirical research, and relevant practitioners are invited to carry out a manual review by questionnaire from the perspectives of topic relevance, topic integrity, topic word implication, sentence smoothness, sentence continuity, and information volume. At the same time, standard assessment metrics such as BLEU and ROUGE are employed to compare with the neural network-based text generation approach. The outcomes demonstrate that the strategy suggested in this paper can generate technical disclosure text that performs well. Overall, its text integrity and readability may satisfy on-site management's demands and help on-site management lessen the workload of technical management staff.

End-to-end delay guaranteed Service Function Chain deployment: A multi-level mapping approach

Network Function Virtualization (NFV) enables service providers to maximize the business profit via resource-efficient QoS provisioning for customer requested Service Function Chains (SFCs). In recent applications, end-to-end delay is one of the crucial QoS requirements that need to be guaranteed in SFC deployment. Whereas it has been considered in the literature, accurate and comprehensive modeling of the delay in the problem of maximizing the service provider’s profit has not yet been addressed. In this paper, at first, the problem is formulated as a mixed-integer convex programming model. Then, by decomposing the model, a two-level mapping algorithm is developed, that at the first level, maps the functions of the SFCs to virtual network function instances; and in the second level, deploys the instances in the physical network. Simulation results show that the proposed approach achieves a near-optimal solution in comparison to the performance bound obtained by the optimization model, and also superiors the existing solutions.

Thwarting Cache Side Channel Attacks with Encryption Address-Based Set Balance Cache

The deterministic memory-to-cache mapping used by cache side channel attack causes the leakage of sensitive information such as secret keys, which seriously threatens user security and highlights the need to defend against this kind of attack. Recent table-based secure cache design requires more space to store the entry while a purely encryption-based design needs complex encryption units to ensure robustness. What is more, the newer attack algorithm enabling faster eviction set discovery may still break such defenses. Even though increasing the association of cache can be a potential solution, it introduces too much redundancy cache access and storage overhead. In this paper, we eliminate this problem. We present Encryption address-based Set Balance Cache (ESBC), a novel cache design to mitigate cache-based side channel attack. ESBC encrypts an address into two-level sets and displaces the data from a primary set into the secondary set when the primary set is full. The two-level mapping structure increases the complexity for attackers to build eviction sets, which is a vital step for the conflict-based attack. Furthermore, we adopt two different optimized variants from a temporal perspective, ESBC with remapping (ESBCR), which serves dynamic-remapping, and spatial perspective, ESBC with multi-mapping (ESBCM), which performs multi-mapping to improve the robustness. Our security analysis reveals that these designs can confuse the exploitation of conflicting addresses. Simulation-based evaluation on SPEC2017 shows 0.24% instruction per cycle (IPC) degradation for ESBCR with 1% remap rate. While the reduction of ESBCM that has five potential secondary sets is 0.69%. What is exciting is that both miss per kilo instructions (MPKI) and miss rates are even reduced because of the efficient cache usage. The storage overhead of these two variants is only 0.87%. By comparing the two schemes, we can observe that though ESBCR brings less performance overhead, the ESBCM has better scalability.

A polygonal XFEM with new numerical integration for linear elastic fracture mechanics

The extended finite element method (XFEM) has become a powerful and effective technique for modeling fracture problems without remeshing. In this paper, we introduce a novel and effective computational approach that is based on polygonal XFEM (named as PolyXFEM) for the analysis of two-dimensional (2D) linear elastic fracture mechanics problems. The PolyXFEM is equipped with a new numerical integration technique that uses the concept of Cartesian transformation method (CTM) over polygonal domains. The underlying idea of the CTM is to transform a domain integral into a boundary integral and a one-dimensional integral. This is computationally more efficient compared to the two-level mapping integration commonly used on polygons. Furthermore, the PolyXFEM is effective in modeling crack problems due to the local enrichment based on the partition of unity method. Our numerical results show that improvements in accuracy are reached thanks to the higher-order of the polygonal shape functions of the PolyXFEM. In addition, efficiency in computational time is achieved because of the usage of the CTM integration scheme, which appears to be quite suitable for polygonal domains. To demonstrate the accuracy and performance of the developed PolyXFEM approach, several numerical examples for 2D linear elastic fracture problems are considered, in which static stress intensity factors and crack propagation are investigated and compared with reference solutions. The convergence and mesh independence of the PolyXFEM for crack analysis is also analyzed.

Multiple Subpage Writing FTL in MLC by Exploiting Dual Mode Operations

The page size of NAND flash continuously grows as the manufacturing process advances. While larger pages can reduce the cost per bit and improve the throughput of NAND flash, it may waste the storage space and data transfer time, causing more frequent garbage collections when serving small write requests. The main methods solving the mismatch problem between the request size and the write unit are write buffer cache and flash page reprogramming. However, multi-level cell (MLC) chips impose additional constraints on page programming so reprogramming MLC pages is prohibited. We proposed a multiple subpage writing flash translation layer (MSPW-FTL) for MLC by exploiting single-level cell (SLC)/MLC dual mode and flash page reprogramming feature. By converting MLC mode blocks to SLC mode blocks, we store small data in subpages of the SLC mode block. Moreover, we proposed three management methods to improve system efficiency: 1) two-level mapping to serve requests of different sizes; 2) an allocation strategy determines how the subpages of different logical pages are mapped to physical pages; and 3) a data management module to deal with the data fragmentation caused by the subpage granularity allocation. We compared MSPW-FTL with some related state-of-the-art FTLs under different types of workloads. Experimental results show that in average, MSPW-FTL reduces the I/O response time by 57.2%, the write amplification by 52.1%, and the number of erasures by 34.1%.

An ontology-based spatial data harmonisation for urban analytics

Data heterogeneity is one of the most challenging problems in urban data analytics. When obtained from various providers or custodians, datasets for the same domain themes may dramatically differ in formats due to many reasons such as historical legacies, changing definitions or standards across jurisdictions etc. It hinders urban analysts and researchers from understanding and using these data and makes results comparison and interpretation obscure. Ontology, usually created by domain experts, offers a comprehensive representation of knowledge including concepts, relations and properties in a domain. It defines the real world in abstract and offers a universal and stable schema for data harmonisation. This paper proposes a fast, extensible solution for eliminating data heterogeneity by using ontology. Starting from conceptualising domain knowledge to domain ontology, we discuss a two-level mapping mechanism which bonds the nexus between data and ontology using mapping rules. A semantic translation engine is also introduced to automate the data harmonisation process. A real case - urban density indicators computation - also demonstrates the usability of the proposed framework and the results show strong potentials for applying this method to broader urban analytics application scenarios.

An object-based approach for two-level gully feature mapping using high-resolution DEM and imagery: a case study on hilly loess plateau region, China

Gully feature mapping is an indispensable prerequisite for the motioning and control of gully erosion which is a widespread natural hazard. The increasing availability of high-resolution Digital Elevation Model (DEM) and remote sensing imagery, combined with developed object-based methods enables automatic gully feature mapping. But still few studies have specifically focused on gully feature mapping on different scales. In this study, an object-based approach to two-level gully feature mapping, including gully-affected areas and bank gullies, was developed and tested on 1-m DEM and Worldview-3 imagery of a catchment in the Chinese Loess Plateau. The methodology includes a sequence of data preparation, image segmentation, metric calculation, and random forest based classification. The results of the two-level mapping were based on a random forest model after investigating the effects of feature selection and class-imbalance problem. Results show that the segmentation strategy adopted in this paper which considers the topographic information and optimal parameter combination can improve the segmentation results. The distribution of the gully-affected area is closely related to topographic information, however, the spectral features are more dominant for bank gully mapping. The highest overall accuracy of the gully-affected area mapping was 93.06% with four topographic features. The highest overall accuracy of bank gully mapping is 78.5% when all features are adopted. The proposed approach is a creditable option for hierarchical mapping of gully feature information, which is suitable for the application in hily Loess Plateau region.

Durable Address Translation in PCM-based Flash Storage Systems

Phase change memory (PCM) is a promising DRAM alternative because of its non-volatility, high density, low standby power and close-to-DRAM performance. These features make PCM an attractive solution to optimize the management of NAND flash memory in embedded systems. However, PCM's limited write endurance hinders its application in embedded systems. Therefore, how to manage flash memory with PCM-particularly guarantee PCM a reasonable lifetime-becomes a challenging issue. In this paper, we propose to partially replace DRAM using PCM to optimize the management of flash memory metadata for better system reliability in the presence of power failure and system crash. To prolong PCM's lifetime, we present a write-activity-aware PCM-assisted flash memory management scheme, called PCM-FTL. By differentiating sequential and random I/O behaviors, a novel two-level mapping mechanism and a customized wear-leveling scheme are developed to reduce writes to PCM and extend its lifetime. We evaluate PCM-FTL with a variety of general-purpose and mobile I/O workloads. Experimental results show that PCM-FTL can significantly reduce write activities and achieve an even distribution of writes in PCM with very low overhead.

Accelerated simulation‐driven design optimisation of compact couplers by means of two‐level space mapping

In this study, the authors discuss a robust and efficient technique for rapid design of compact couplers. The approach exploits two-level space mapping (SM) correction of an equivalent circuit model of the coupler structure under design. The first SM layer (local correction) is utilised to ensure good matching between the equivalent circuit and the electromagnetic model at the component level. Subsequent global correction allows for accounting the electromagnetic couplings between the components. The important advantage of two-level model correction is that small number of parameter is utilised at each stage, which substantially simplifies and speeds up the parameters extraction procedure. Another advantage is that the local-global SM results in considerably better generalisation capability of the surrogate model (as compared to conventional SM). This leads to improved reliability of the optimisation process and its reduced computational cost. The proposed technique is validated using an example of two compact microstrip rat-race couplers and compared with other surrogate-based optimisation techniques.

A Novel QoS Mapping Mechanism in Integrated UMTS/WLANs

Due to the problem of different QoS granularity in integrated UMTS/WLANs, how we construct effective QoS mapping mechanism for user satisfaction is essential during the changes of access networks, so called, handoffs. So in this paper, a novel dynamical QoS mapping mechanism based on Application Service Map (ASM) is proposed in order to support end to end QoS and minimize the service quality degradations. Based on the access network corresponding classification methods, all services can be categorized by priority and subdivides each grade of service into three sub-levels based on ASM. The proposed mechanism contains a two-way QoS mapping adjustment mechanism and it can dynamically adjust the QoS mapping relationship to optimize the allocation of resource according to present load condition of network. And a two-level QoS mapping selection algorithm based on the sub-level and priority of QoS service is used in the two-way QoS mapping adjustment mechanism to adaptively select more refined QoS. As an experimental result, the proposed mechanism can greatly improve the utilization of network resource and the user's satisfaction.

HYPERSPECTRAL DATA CLASSIFICATION USING FACTOR GRAPHS

Abstract. Accurate classification of hyperspectral data is still a competitive task and new classification methods are developed to achieve desired tasks of hyperspectral data use. The objective of this paper is to develop a new method for hyperspectral data classification ensuring the classification model properties like transferability, generalization, probabilistic interpretation, etc. While factor graphs (undirected graphical models) are unfortunately not widely employed in remote sensing tasks, these models possess important properties such as representation of complex systems to model estimation/decision making tasks. In this paper we present a new method for hyperspectral data classification using factor graphs. Factor graph (a bipartite graph consisting of variables and factor vertices) allows factorization of a more complex function leading to definition of variables (employed to store input data), latent variables (allow to bridge abstract class to data), and factors (defining prior probabilities for spectral features and abstract classes; input data mapping to spectral features mixture and further bridging of the mixture to an abstract class). Latent variables play an important role by defining two-level mapping of the input spectral features to a class. Configuration (learning) on training data of the model allows calculating a parameter set for the model to bridge the input data to a class. The classification algorithm is as follows. Spectral bands are separately pre-processed (unsupervised clustering is used) to be defined on a finite domain (alphabet) leading to a representation of the data on multinomial distribution. The represented hyperspectral data is used as input evidence (evidence vector is selected pixelwise) in a configured factor graph and an inference is run resulting in the posterior probability. Variational inference (Mean field) allows to obtain plausible results with a low calculation time. Calculating the posterior probability for each class and comparison of the probabilities leads to classification. Since the factor graphs operate on input data represented on an alphabet (the represented data transferred into multinomial distribution) the number of training samples can be relatively low. Classification assessment on Salinas hyperspectral data benchmark allowed to obtain a competitive accuracy of classification. Employment of training data consisting of 20 randomly selected points for a class allowed to obtain the overall classification accuracy equal to 85.32% and Kappa equal to 0.8358. Representation of input data on a finite domain discards the curse of dimensionality problem allowing to use large hyperspectral data with a moderately high number of bands.

The competition model: From language processing to pedagogical implications

The competition model is a psycholinguistic model which was first introduced to account for language processing, yet over time, the model was generalized to deal with the areas of first and second language acquisition. As a functionalist model, the ‘competition model’ suggests that language forms are at the service of communicative functions. It also draws on connectionism, and thus emphasizes the importance of frequency and the information value of linguistic input. Furthermore, it is based on the hypothesis that human beings do not need to have any innate brain module for language learning. However, it does not reject the innate and psychological mechanisms underlying language acquisition. The present article attempts to discuss the principles of the ‘competition model’ and the possible pedagogical implications of it. Key words: Competition model, functionalism, cues, two-level mapping, unified competition model, chunking, buffering, resonance.

Convergence analysis of two-level response and parameter mapping-based methods

Space mapping-based methodologies for optimization and inverse problems in low- and high- frequency electromagnetic applications are well-established. This methodology uses one or multiple low-fidelity models and a high-fidelity model. The objective is to shift the optimization or inverse problem that is carried out within the high-fidelity forward model to a space mapped coarse model, which acts as surrogate model. Convergence problems however may occur since convergence rates depend on the fidelity of the coarse model(s) compared to the fine model. The recently proposed two-level response and parameter mapping (RPM) method, which employs input and output mapping, shows some improved convergence properties. This article proposes a mathematical framework for determining the robustness of this RPM methodology. We express accuracy and speed up of the RPM-based procedures through the use of four different quality measures.

Simultaneous Localization and Mapping in a Hybrid Robot and Camera Network System

To obtain accurate grid maps of large environments equipped with camera networks in real time, a two-level mapping method is presented in this paper. The local map level is composed of a set of local maps. Once a mobile robot enters a new camera visual field, a new local map corresponding to the camera is built by a Rao-Blackwellized particle filter (RBPF) method using the data from the robot’s laser sensor and odometry. During the local mapping process, a camera-calibration problem is also solved by using a marker attached to the robot which moves as a curve fashion in the camera visual field. The global level is an adjacency graph whose arcs are labeled with the relative transformations between local maps. Among these relative transformations, of particular important are the revisiting constraints. When the robot returns a previous local map, it can be detected and relocated by a calibrated camera corresponding to the local map. Then a revisiting constraint can be attained and added into global constraints. To have an accurate and consistent global map, a stochastic gradient descent (SGD) algorithm based on a simple state space is employed to optimize the existed graph after adding and updating each global constraint. Experimental results carried out with a real mobile robot in a large-scale indoor environment illustrate the advantages of our methods over two current state-of-the-art approaches.

A Novel Cache Architecture and Placement Framework for Packet Forwarding Engines

Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. With the requirement to process packets at line rates, high-performance routers need to forward millions of packets every second with each packet needing up to seven memory accesses. Earlier work shows that a single cache for the nodes of a trie can reduce the number of external memory accesses. It is observed that the locality characteristics of the level-one nodes of a trie are significantly different from those of lower level nodes. Hence, we propose a heterogeneously segmented cache architecture (HSCA) which uses separate caches for level-one and lower level nodes, each with carefully chosen sizes. Besides reducing misses, segmenting the cache allows us to focus on optimizing the more frequently accessed level-one node segment. We find that due to the nonuniform distribution of nodes among cache sets, the level-one nodes cache is susceptible to high conflict misses. We reduce conflict misses by introducing a novel two-level mapping-based cache placement framework. We also propose an elegant way to fit the modified placement function into the cache organization with minimal increase in access time. Further, we propose an attribute preserving trace generation methodology which emulates real traces and can generate traces with varying locality. Performance results reveal that our HSCA scheme results in a 32 percent speedup in average memory access time over a unified nodes cache. Also, HSCA outperforms IHARC, a cache for lookup results, with as high as a 10-fold speedup in average memory access time. Two-level mapping further enhances the performance of the base HSCA by up to 13 percent leading to an overall improvement of up to 40 percent over the unified scheme.

Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines

SRAM (static random access memory)-based pipelined algorithmic solutions have become competitive alternatives to TCAMs (ternary content addressable memories) for high-throughput IP lookup. Multiple pipelines can be utilized in parallel to improve the throughput further. However, several challenges must be addressed to make such solutions feasible. First, the memory distribution over different pipelines, as well as across different stages of each pipeline, must be balanced. Second, the traffic among these pipelines should be balanced. Third, the intra-flow packet order (i.e. the sequence) must be preserved. In this paper, we propose a parallel SRAM-based multi-pipeline architecture for IP lookup. A two-level mapping scheme is developed to balance the memory requirement among the pipelines as well as across the stages in each pipeline. To balance the traffic, we propose an early caching scheme to exploit the data locality inherent in the architecture. Our technique uses neither a large reorder buffer nor complex reorder logic. Instead, a flow-aware queuing scheme exploiting the flow information is used to maintain the intra-flow sequence. Extensive simulation using real-life traffic traces shows that the proposed architecture with 8 pipelines can achieve a throughput of up to 10 billion packets per second, i.e. 3.2 Tbps for minimum size (40 bytes) packets, while preserving intra-flow packet order.

전광 그레이코드 이진코드 변환기

An all-optical 4-bit Gray code to binary coded decimal (BCD) converter by means of commercially available numerical analysis tool (VPI) was demonstrated, for the first time to our knowledge. Circuit design approach was modified appropriately in order to fit the electrical method on an all-optical logic circuit based on a cross gain modulation (XGM) process so that signal degradation due to the non-ideal optical logic gates can be minimized. Without regenerations, Q-factor of around 4 was obtained for the most severely degraded output bit (least significant bit-LSB) with 2.5 Gbps clean input signals having 20 dB extinction ratio. While modifying the two-level simplification method and Karnaugh map method to design a Gray code to BCD converter, a general design concept was also founded (one-level simplification) in this research, not only for the Gray code to BCD converter but also for any general applications.

Unexpressed object alternations of Bulgarian verbs in HPSG

This paper proposes a projectionist account of the unexpressed object alternations in HPSG. The approach is based on the two-level mapping mechanism, developed in Manning and Sag (1998) and Sag et al (2003). The proposed analysis keeps identical argument structure values in the lexeme description of both valence alternatives, while different surface valence values are related by a lexical rule. The HPSG model is applied cross-linguistically to English and Bulgarian. Some Bulgarian-specific traits, such as the limited alternation range and the grammaticalized aspect, related to the formal characteristics of the unexpressed object alternations, are discussed and interpreted within HPSG.