It is often assumed that Parylene-C encapsulation films are void-free & conformal by nature of their vapour deposition. We present a case study in an optrode device where voiding occurs; we argue the voids originate from the geometry of the substrate and from the use of surface mount components. The segment under study consists of a commercial LED bonded with Au/Au thermosonic bonding onto a custom silicon substrate. We demonstrate via micro-sectioning that there is polymer voiding behaviour (1) in sub-LED surfaces; and (2) within through-hole vias in the silicon substrate (channels designed to allow polymer vapour ingress during deposition). By making a comparison to the solutions found in the IC industry around tungsten vapour filling of blind vias, we present geometric solutions for failure mitigation.