True Random Bit Research Articles

Cellular Automata with Synthetic Image A Secure Image Communication with Transform Domain

Image encryption has attained a great attention due to the necessity to safeguard confidential images. Digital documents, site images, battlefield photographs, etc. need a secure approach for sharing in an open channel. Hardware – software co-design is a better option for exploiting unique features to cipher the confidential images. Cellular automata (CA) and synthetic image influenced transform domain approach for image encryption is proposed in this paper. The digital image is initially divided into four subsections by applying integer wavelet transform. Confusion is accomplished on low – low section of the transformed image using CA rules 90 and 150. The first level of diffusion with consecutive XORing operation of image pixels is initiated by CA rule 42. A synthetic random key image is developed by extracting true random bits generated by Cyclone V field programmable gate array 5CSEMA5F31C6. This random image plays an important role in second level of diffusion. The proposed confusion and two level diffusion assisted image encryption approach has been validated through the entropy, correlation, histogram, number of pixels change rate, unified average change intensity, contrast and encryption quality analyses.

Clock glitch fault injection attack on an FPGA-based non-autonomous chaotic oscillator

Chaos-based true random bit generators have been demonstrated in many studies to be feasible and secure for crypto-system applications. In this work, we demonstrate that an FPGA-based non-autonomous chaotic oscillator, used as a true random number generator, can be compromised via cryptanalysis attacks. First, we realize non-autonomous chaotic oscillator (previously implemented only in analog form) on a modular FPGA platform. The oscillator architecture is simplified to eliminate the Sin function and is described in details in VHDL. Then, we propose chaotic oscillator attacking system including clock glitch generator to compromise the oscillator by injecting glitches on function clock. The parameters and positions of those glitches are carefully determined to achieve a successful attack. The experimental results show that the system is attacked, and the generated glitched bit-streams are distorted, unlike the bit-streams generated without glitching. The randomness of the generated bit-streams is checked using the NIST test tool.

A true random bit generator based on a memristive chaotic circuit: Analysis, design and FPGA implementation

The aim of this paper is to present a true random bit generator (TRBG) based on a memristive chaotic circuit and its implementation on Field Programmable Gate Array (FPGA) board. The proposed TRBG architecture makes use of a memristive canonical Chua's oscillator and a logistic map as entropy sources, while the XOR function is used for post-processing. The optimal parameter set for the chaotic systems has been chosen by carrying out numerical simulations of the system and adopting the scale index parameter to determine the degree of non-periodicity of the obtained bit streams. The proposed TRBG system has been then modeled and co-simulated on the Xilinx System Generator (XSG) platform and implemented on the Xilinx Kintex-7 KC705 FPGA Evaluation Board, obtaining experimental results in agreement with the expectations. Finally, the system has been validated with statistical analysis by using the NIST 800.22 statistical test suite.

Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators

One of the important applications of chaotic oscillators is their employment as sources of entropy for True Random Bit Generators (TRBGs). In this work, we introduce high-speed TRBGs realized on a modular Field Programmable Gate Array (FPGA) hardware platform using two different switching-type chaotic oscillators. While both oscillators are autonomous, one is 3-D and the other is 4-D. This enables us to investigate and compare the advantages/disadvantages of higher dimensional chaotic oscillators on the throughput, hardware requirements and security of the generated bit-streams. For that purpose, two different implementations are described for each TRBG; a throughput-optimized architecture and a resource-optimized architecture that utilizes fewer FPGA blocks. In both cases, high speed is achieved by concatenating all state-space variables of each chaos generator into one variable. Furthermore, a new postprocessing method that enables the generated bit-streams to pass all NIST 800.22 statistical tests is introduced. Experimental results show that the throughput-optimized TRBG architecture, based on the 4-D system, can exceed 1882 Mbit/s. However, the resource-optimized TRBG architecture, based on the 3-D system, is the best in terms of FPGA resources and overall Figure of Merit.

A 0.18-μm CMOS high-data-rate true random bit generator through ΔΣ modulation of chaotic jerk circuit signals.

A full-custom design of chaos-based True Random-Bit Generator (TRBG) implemented on a 0.18-μm CMOS technology is presented with unique composition of three major components, i.e., (i) chaotic jerk oscillator, (ii) ΔΣ modulator, and (iii) simple pre/post-processing. A chaotic jerk oscillator is a deterministic source of randomness that potentially offers robust and highly random chaotic signals and exhibits a distinctive property of smoothly balanced-to-unbalanced alternation of double-scroll attractors. The continuous-time 2nd-order ΔΣ modulator is introduced as a mixed-signal interface in order to increase a resolution of random bit sequences while no extra clock is required. The ΔΣ modulator is constructed mainly by a folded-cascode amplifier with sufficient gain and phase margin of 64 dB and 83°, respectively, and a high-speed comparator with a time constant of 2.7 ns. An uncomplicated structure of shift-registers is realized as a post-processing process. The bit sequence of the proposed TRBG successfully passes all statistical tests of NIST SP800-22 test suite, and the ultimate output bit rate is 50 Mbps. The physical layout of a chip area is 212.8 × 177.11 μm and the DC power dissipation is 1.32mW using a 1.8-V single supply voltage. This paper therefore offers a potential alternative to a fully embedded cryptographic module in ASIC applications.

True random bit generators based on current time series of contact glow discharge electrolysis

Random bit generators (RBGs) in today's digital information and communication systems employ a high rate physical entropy sources such as electronic, photonic, or thermal time series signals. However, the proper functioning of such physical systems is bound by specific constrains that make them in some cases weak and susceptible to external attacks. In this study, we show that the electrical current time series of contact glow discharge electrolysis, which is a dc voltage-powered micro-plasma in liquids, can be used for generating random bit sequences in a wide range of high dc voltages. The current signal is quantized into a binary stream by first using a simple moving average function which makes the distribution centered around zero, and then applying logical operations which enables the binarized data to pass all tests in industry-standard randomness test suite by the National Institute of Standard Technology. Furthermore, the robustness of this RBG against power supply attacks has been examined and verified.

Robustification of a One-Dimensional Generic Sigmoidal Chaotic Map with Application of True Random Bit Generation.

The search for generation approaches to robust chaos has received considerable attention due to potential applications in cryptography or secure communications. This paper is of interest regarding a 1-D sigmoidal chaotic map, which has never been distinctly investigated. This paper introduces a generic form of the sigmoidal chaotic map with three terms, i.e., xn+1 = ∓AfNL(Bxn) ± Cxn ± D, where A, B, C, and D are real constants. The unification of modified sigmoid and hyperbolic tangent (tanh) functions reveals the existence of a “unified sigmoidal chaotic map” generically fulfilling the three terms, with robust chaos partially appearing in some parameter ranges. A simplified generic form, i.e., xn+1 = ∓fNL(Bxn) ± Cxn, through various S-shaped functions, has recently led to the possibility of linearization using (i) hardtanh and (ii) signum functions. This study finds a linearized sigmoidal chaotic map that potentially offers robust chaos over an entire range of parameters. Chaos dynamics are described in terms of chaotic waveforms, histogram, cobweb plots, fixed point, Jacobian, and a bifurcation structure diagram based on Lyapunov exponents. As a practical example, a true random bit generator using the linearized sigmoidal chaotic map is demonstrated. The resulting output is evaluated using the NIST SP800-22 test suite and TestU01.

Quantum random number generator based on quantum nature of vacuum fluctuations

Quantum random number generator (QRNG) allows obtaining true random bit sequences. In QRNG based on quantum nature of vacuum, optical beam splitter with two inputs and two outputs is normally used. We compare mathematical descriptions of spatial beam splitter and fiber Y-splitter in the quantum model for QRNG, based on homodyne detection. These descriptions were identical, that allows to use fiber Y-splitters in practical QRNG schemes, simplifying the setup. Also we receive relations between the input radiation and the resulting differential current in homodyne detector. We experimentally demonstrate possibility of true random bits generation by using QRNG based on homodyne detection with Y-splitter.

Source-Device-Independent Ultrafast Quantum Random Number Generation.

Secure random numbers are a fundamental element of many applications in science, statistics, cryptography and more in general in security protocols. We present a method that enables the generation of high-speed unpredictable random numbers from the quadratures of an electromagnetic field without any assumption on the input state. The method allows us to eliminate the numbers that can be predicted due to the presence of classical and quantum side information. In particular, we introduce a procedure to estimate a bound on the conditional min-entropy based on the entropic uncertainty principle for position and momentum observables of infinite dimensional quantum systems. By the above method, we experimentally demonstrated the generation of secure true random bits at a rate greater than 1.7 Gbit/s.

Arithmetic coding and blinding countermeasures for lattice signatures

We describe new arithmetic coding techniques and side-channel blinding countermeasures for lattice-based cryptography. Using these techniques, we develop a practical, compact, and more quantum-resistant variant of the BLISS Ideal Lattice Signature Scheme. We first show how the BLISS parameters and hash-based random oracle can be modified to be more secure against quantum pre-image attacks while optimizing signature size. Arithmetic Coding offers an information theoretically optimal compression for stationary and memoryless sources, such as the discrete Gaussian distributions often present in lattice-based cryptography. We show that this technique gives better signature sizes than the previously proposed advanced Huffman-based signature compressors. We further demonstrate that arithmetic decoding from an uniform source to target distribution is also an optimal non-uniform sampling method in the sense that a minimal amount of true random bits is required. Performance of this new Binary Arithmetic Coding sampler is comparable to other practical samplers. The same code, tables, or circuitry can be utilized for both tasks, eliminating the need for separate sampling and compression components. We then describe simple randomized blinding techniques that can be applied to anti-cyclic polynomial multiplication to mask timing- and power consumption side-channels in ring arithmetic. We further show that the Gaussian sampling process can also be blinded by a split-and-permute techniques as an effective countermeasure against side-channel attacks.

Generalized Elias schemes for efficient harvesting of truly random bits

The problem of generating a sequence of true random bits (suitable for cryptographic applications) from random discrete or analog sources is considered. A generalized version, including vector quantization, of the classical approach by Elias for the generation of truly random bits is introduced, and its performance is analyzed, both in the finite case and asymptotically. The theory allows us to provide an alternative proof of the optimality of the original Elias’ scheme. We also consider the problem of deriving random bits from measurements of a Poisson process and from vectors of iid Gaussian variables. The comparison with the scheme of Elias, applied to geometric-like non-binary vectors, originally based on the iso-probability property of permutations of iid variables, confirms the potential of the generalized scheme proposed in our work.

True Random Source from Integratable Chaotic Circuits

In this talk, we describe a chaotic electronic circuit designed to realize a physical random number generator that is easily integrated. The small footprint of the circuit enables massive parallel realization to achieve high-speed, true-random bit sequences. The analog circuit can be fully characterized, and conjugacy to a symbolic shift proves the presence of chaos. The symbolic representation also provides a rigorous means to extract the maximum entropy from the chaotic device. Analysis of the circuit dynamics reveals critical tunings that yield special Markov properties, which are essential for removing correlations in the random sequences. Practically important is the presence of a sensitive circuit statistic that enables efficient feedback control to the Markov tuning. Numerical simulation and breadboard experimental results demonstrate the effectiveness of the proposed physical random number generator device.

Gb/s One-Time-Pad Data Encryption With Synchronized Chaos-Based True Random Bit Generators

Ultrafast physical random bit generators based on broadband optical signals have been presented lately at astounding speeds. Some of the most popular mechanisms to obtain such random sequences are through signals that emerge from the coherence collapse operation of semiconductor lasers or from the photodetection signal beating of amplified spontaneous emission optical noise. Especially in the first case, the potential of chaotic signals to synchronize offers a great potential for secure communications. In this paper, we combine two unique properties of semiconductor lasers that operate at a chaotic regime: Their potential to become highly synchronized when optically coupled through appropriate configurations and their ability to seed ultrafast true random bit generators. The concurrent fulfillment of both conditions is shown in this paper and is used to demonstrate experimentally the one-time-pad encryption communication protocol. We report an error-free operation of such an encryption system, exceeding for the first time the Gb/s rate. Forward-error-correction coding is applied on the encryption scheme, in order to drastically reduce the errors of the synchronized true random bit sequences and optimize the decoding performance of the system, while securing the distribution of the random seed.

Advancement of True Random Number Generators Based on Sound Cards Through Utilization of a New Post-processing Method

Quality of true random number generators (TRNGs) based on a sound card depends of two components: an "unpredictable" source with high entropy, and a post processing function which, when used on a digitalized form of a random signal source, produces a result that is statistically very close to the uniform distribution. This paper presents a method of obtaining true random bits using hardware of a computer sound card, on whose audio input through the use of a microphone a random environmental noise signal is brought and for post-processing a new procedure of distributing bits is used or so called "Mixing Bits in Steps and XORing of Adjacent Bits" (MiBiS&XOR). With the presented distillation procedure, in a simple and efficient way, adjacent input bits, who are in a certain correlation, are separated and divided one from another, by which reduces the total autocorrelation and then in this new sequence, adjacent bits are XORed which increases the entropy and reduces bias of output bit sequence. Experimental statistical randomness tests performed on sequences of bits obtained as a result of the proposed method, confirm the excellent quality of the TRNGs output.

When Can Limited Randomness Be Used in Repeated Games?

The central result of classical game theory states that every finite normal form game has a Nash equilibrium, provided that players are allowed to use randomized (mixed) strategies. However, in practice, humans are known to be bad at generating sequences, and true random bits may be unavailable. Even if the players have access to enough random bits for a single instance of the game their randomness might be insufficient if the game is played many times. In this work, we ask whether randomness is necessary for equilibria to exist in finitely repeated games. We show that for a large class of games containing arbitrary two-player zero-sum games, approximate Nash equilibria of the n-stage repeated version of the game exist if and only if both players have Ω(n) random bits. In contrast, we show that there exists a class of games for which no equilibrium exists in pure strategies, yet the n-stage repeated version of the game has an exact Nash equilibrium in which each player uses only a constant number of random bits. When the players are assumed to be computationally bounded, if cryptographic pseudorandom generators (or, equivalently, one-way functions) exist, then the players can base their strategies on random-like sequences derived from only a small number of truly random bits. We show that, in contrast, in repeated two-player zero-sum games, if pseudorandom generators do not exist, then Ω(n) random bits remain necessary for equilibria to exist.

Low-cost portable TRNG, implementation and evaluation

This paper will show one of many possible hardware implementations of random sequence generators and give a short survey on existing work related to techniques used for producing true random bits. By using cheap electronic components found in every specialized store such as 8-bit RISC microcontroler, double analogue comparator chip and USB to RS232 interface integrated circuit, we were able to produce a low cost, higly portable device that outputs random sequences with excellent statistical characteristics and high entropy. The source of randomness is a mix of techniques such as electronic noise, phase noise and oscillator jitter. The device in question has a built-in debiasing algorithm similar to [1] and a security mechanism that protects the end user by constantly monitoring the quality of digitized noise signal. Finaly, we will show the results of comparative analysis of data acquired from our device and ?random.org? online service.

PUFKEY: a high-security and high-throughput hardware true random number generator for sensor networks.

Random number generators (RNG) play an important role in many sensor network systems and applications, such as those requiring secure and robust communications. In this paper, we develop a high-security and high-throughput hardware true random number generator, called PUFKEY, which consists of two kinds of physical unclonable function (PUF) elements. Combined with a conditioning algorithm, true random seeds are extracted from the noise on the start-up pattern of SRAM memories. These true random seeds contain full entropy. Then, the true random seeds are used as the input for a non-deterministic hardware RNG to generate a stream of true random bits with a throughput as high as 803 Mbps. The experimental results show that the bitstream generated by the proposed PUFKEY can pass all standard national institute of standards and technology (NIST) randomness tests and is resilient to a wide range of security attacks.

Asynchronous delay doubler and binary low‐pass filter for a time‐delay chaotic circuit

SummaryIn this paper, an asynchronous digital circuit is introduced for increasing the amount of delay in binary delay lines in an area efficient way. The circuit that uses its slave delay line twice per delay event is called asynchronous delay doubler (ADD). The delay increases exponentially, while the number of components increases linearly in the recursive utilization of ADD. An assumption on the event interval of the input 2signal helps to design the ADD in a very simple form. Therefore, the ADD can be implemented with a small amount of logical resource (gates or look‐up tables). For proper operation, interval between the events (positive edge or negative edge) on the binary input signal should be larger than the delay provided by the recursive ADD block. In order to satisfy this assumption, an auxiliary asynchronous circuit, which is called binary low‐pass filter (BLPF), is also proposed. The BLPF filters out the pulses narrower than the delay generated by its recursive ADD block. The proposed ADD design is suitable especially for the applications, like random number generation, in which the deviation in amount of delay is useful as an entropy source. In order to prove the concept, a chain of recursive ADD block is implemented with BLPFs on a field‐programmable gate array and utilized in a true random bit generator. Copyright © 2015 John Wiley & Sons, Ltd.

An Improvement on Sensitivity Test for Micro-Power Wireless Communication

This paper mainly introduces the assessment methods of bit error performance which can effect the sensitivity of the receiver in micro power wireless communication system,use simple Poisson distribution and binomial distribution to analyzes the quota such as FBR, BER and average bit error rate impact of the bit error performance. In order to enhance the accuracy and reliability of sensitivity test,we give a true random bit stream generator to improve the emission signal which is used to detect the error performance.

SOURCES OF RANDOMNESS FOR USE IN RANDOM NUMBER GENERATION

Efficient generation of random numbers plays significant role in cryptographic applications. Such a generator has to produce unpredictable and un-correlated random bits. Random number generators are classified as pseudo-random number generators (PRNGs) and true random number generators (TRNGs). The first ones have the disadvantage that they can be proven predictable, while the latter ones can produce true random bits but it is not easy to re-produce specific sequences or implement them in constrained environments and there may exist correlations and biases of produced sequences. A third class of random number generators has been introduced, called hybrid-random number generators (h-RNGs), where there is a combination of a cryptographically strong PRNGs or TRNGs which are seeded, and possibly re-seeded, through a source of randomness with high entropy. In this paper, we present an overview of various sources of randomness that can be used either as direct random number generators or as seed sources in h-RNGs, for application in embedded systems.