Triple Constraints Research Articles

Analysing success criteria for ICT projects

Since the 1960s many authors have accepted the triple constraints (time, cost, specification) as a standard measure of success and this still appears to be extremely important in evaluating the success of ICT (information communication technology) projects. However, an ICT project cannot always be seen as a complete success or a complete failure. Moreover, the parties involved may perceive the terms 'success' and 'failure' differently. A quasi-experiment (gaming) has been developed in order to determine the measures for success used by the different parties involved in judging an ICT project. The results of this quasi-experiment were analysed using aggregation theory and validated by probabilistic feature models. In general the figures do not contradict. This research indicates that the impact of the triple constraints on the judgement of success is rather small. Other criteria, such as user happiness and financial or commercial success, are far more important. Surprisingly, whether or not a project was able to meet the predefined specifications was of little importance for the appreciation of the project's success.

Circuit Design Techniques for a First-Generation Cell Broadband Engine Processor

The Cell Broadband Engine (Cell BE) is a multicore system-on-chip (SoC), implemented in a 90-nm high-performance silicon-on-insulator (SOI) technology, and optimized, within the triple constraints of area, power, and performance, to run at frequencies in excess of 3 GHz. The large scale of the design (~75 million logic transistors, and about 750 000 latches and flip-flops), high-volume requirements, and the desire to support multiple manufacturing facilities dictated a need for very robust circuit practices, but at the same time, the high-frequency goal drove the use of more aggressive styles in certain critical regions of the design. This paper describes the local clock design, along with the various latches and flip-flops deployed, followed by a discussion of the circuit techniques used for the digital logic implementation, including special considerations for high-speed synthesized control logic, semi-custom and full-custom static circuit design and full-custom dynamic logic circuits. In addition, the synergistic processor element (SPE) circuit design is described, followed by the techniques and issues associated with the SRAM design. Finally, the methods used for electrical verification are described, these being an important part of the strategy for ensuring overall design robustness and first-silicon success