Translinear Techniques Research Articles

A 1.2-V Current-Mode RMS-to-DC Converter Based on a Novel Two-Quadrant Electronically Simulated MOS Translinear Loop

A novel current-mode CMOS RMS-to-DC converter using translinear techniques is introduced. It is based on a squarer/divider cell that is implemented using an electronically simulated loop with a novel biasing scheme that allows its operation in two quadrants. The cell is designed using a differential input current and a small signal first order filter to implement the voltage averaging, leading to a compact solution that can be used with low voltage supplies. The converter has been fabricated in a standard 130-nm CMOS process, and measurement results are provided to demonstrate the feasibility of the system.

A first-order parameter-varying filter using dynamic translinear techniques

Abstract In this article, a first-order parameter-varying filter based on dynamic translinear techniques is presented. The proposed filter has a reduced time response which is a consequence of the strategy considered for the variation of its 3 dB cutoff frequency. Computer simulations confirm the correct operation of the filter.

A 1.5 V Current-Mode CMOS RMS-to-DC Converter

A very low voltage, current-mode CMOS RMS-to-DC converter is presented. It is fully designed using MOS Translinear techniques. More specifically, its main building blocks are a squarer/divider and a geometric-mean cell which are obtained by using simple second-order MOS Translinear loops in a folded configuration, leading to a very regular and compact implementation. A novel biasing technique is employed for such loops, allowing them to operate at supply voltages as low as 1.5 V. Experimental results for a prototype IC demonstrating the correct operation of the circuit are included.

1.5 V CMOS companding filter

A 1.5 V CMOS integrated filter based on MOS translinear techniques is presented. The internal voltage swing compression due to its companding nature, together with the biasing strategy employed, lead to very low supply voltage requirements. Measurement results demonstrate on silicon the proposed technique, readily extendable to higher-order filters.

Syllabic-companding log domain filters

A general theory for companding log domain filters is proposed which combines not only exponential mappings, but also a new translational mapping approach which guarantees suitable operating conditions in any log domain filter. The filter equations resulting from the use of the theory ultimately contain translinear terms which are known to be realizable using translinear techniques. A discussion of the design of the companding filters, regarding the economical use of translinear loops and the convenient selection of system parameters, is offered which leads to first- and second-order circuit designs. Finally, the noise performance of an example design is investigated using a carefully crafted large-signal simulation technique, showing clearly the advantage of the companding filter approach.