Virtualization is a convenient way to efficiently utilize the numerous on-chip resources in modern physical platforms. However, it is important to ensure a high performance for the workloads running on such virtualized platforms. One factor which reduces the performance of these virtualized workloads is the frequent flushing of hardware-managed Translation Lookaside Buffers (TLBs). To avoid these flushes and reduce the TLB miss rate, we propose the Tag Manager Table (TMT), a hardware architecture for generating and managing process-specific TLB tags. Since the TMT approach is software-transparent, it is equally applicable for virtualized and non-virtualized environments. Using a full-system simulation approach, we investigate the reduction in the TLB miss rate achieved by using the TMT. We also analyze the variation of this reduction with factors like the size of the TMT, the TLB architecture and the workload characteristics and estimate the relative importance of these factors in determining this reduction.