Transimpedance Research Articles

Portable glucose detector based on nickel oxide modified Screen Printed Carbon Electrode (SPCE)

A portable and low-cost system prototype for glucose detector based on LMP91000EV M potentiostat has been created. Characterization of Screen-Printed Carbon Electrodes (SPCE) without modification (bare SPCE) and modified nickel oxide (NiO/SPCE) was carried out with a commercial potentiostat to see the effect of nickel oxide in detecting glucose. Through the electrochemical impedance spectroscopy method, the Rct value of 1,276.79 Ω is obtained for NiO/SPCE and 429.06 Ω for bare SPCE, so that NiO/SPCE has a slower electron transfer rate. Meanwhile, through the cyclic voltammetry method, the surface-active electrode area is 7.1×10-2cm2 for NiO/SPCE and 6.9×10-2 cm2 for bare SPCE, so that NiO/SPCE is more sensitive in detecting glucose. When the glucose concentration is varied, the Limit of Detection (LOD) and Limit of Quantitation (LOQ) values of NiO/SPCE are smaller, specifically 1.807 mM and 6.024 mM than bare SPCE, specifically 2.629 mM and 8.762 mM, so NiO/SPCE is more sensitive. When the scan rate is varied, the gradient value of NiO/SPCE is smaller, specifically -8.14×10-4 mA s/mV than bare SPCE, specifically -9.62×10-4 mA s/mV, so NiO/SPCE is not more sensitive. Next, comparing a prototype system that Trans Impedance Amplifier (TIA) gain is varied and a commercial potentiostat. As a result, the cyclic voltammogram per cycle on commercial potentiostat is more stable. The smaller the TIA gain on the system prototype, the more stable it is, this is because the noise that is amplified is getting smaller.

0.5-V 281-nW Versatile Mixed-Mode Filter Using Multiple-Input/Output Differential Difference Transconductance Amplifiers.

This paper presents a new low-voltage versatile mixed-mode filter which uses a multiple-input/output differential difference transconductance amplifier (MIMO-DDTA). The multiple-input of the DDTA is realized using a multiple-input bulk-driven MOS transistor (MI-BD-MOST) technique to maintain a single differential pair, thereby achieving simple structure with minimal power consumption. In a single topology, the proposed filter can provide five standard filtering functions (low-pass, high-pass, band-pass, band-stop, and all-pass) in four modes: voltage (VM), current (CM), transadmittance (TAM), and transimpedance (TIM). This provides the full capability of a mixed-mode filter (i.e., twenty filter functions). Moreover, the VM filter offers high-input and low-output impedances and the CM filter offers high-output impedance; therefore, no buffer circuit is needed. The natural frequency of all filtering functions can be electronically controlled by a setting current. The voltage supply is 0.5 V and for a 4 nA setting current, the power consumption of the filter was 281 nW. The filter is suitable for low-frequency biomedical and sensor applications that require extremely low supply voltages and nano-watt power consumption. For the VM low-pass filter, the dynamic range was 58.23 dB @ 1% total harmonic distortion. The proposed filter was designed and simulated in the Cadence Virtuoso System Design Platform using the 0.18 µm TSMC CMOS technology.

An Active Inductor Based Transimpedance Amplifier with Two Local Feedbacks as a Fiber Optic Application

An important use of active inductor feedback is reported. It was evident that a frequency dependent impedance of an active inductor is similar to that of an ordinary spiral inductor which is a key advantage in integrated circuit design given the fact that Mosfet-based active inductor circuit occupies less volume on board a chip. In this work, a 42 dBΩ transimpedance (TIA) gain at 1 GHz is obtained with 33 𝑝𝐴⁄√𝐻𝑧 of input referred noise with a very low power consumption of 0.605 mW. The Common-Gate Common-Source input stage with an active inductor feedback is reported in this work for the first-time long side a second stage current mirror with additional local active inductor feedback. The extremely low level of power consumption is considered to be another key advantage for that matter despite the moderate levels of TIA gain, bandwidth and input-referred noise current spectral density with 1V DC supply voltage. The LTspice software was used for simulation.

Design framework for inverter cascode transimpedance amplifier using Gm/ID based PSO applying design equations

This paper presents a framework for the design of the inverter cascode (InvCas) transimpedance (TIA) for the optical receiver's front-end. The framework combines the particle swarm optimization (PSO) evolutionary algorithm with the gm/ID methodology to calculate the required circuit parameters needed to obtain the target specifications entered by the designer. The framework relies on the derived circuit equations to define the design space and evaluate the performance using the parameters calculated by the gm/ID and PSO. This technique speeds up the design process by avoiding the need for Spice simulation to assess the fitness of each particle during the optimization process. The proposed framework is implemented in a Matlab program utilizing the framework that takes target specifications as an input and provides the design parameters of the particle with the best circuit performance satisfying these specifications as an output. The framework is tested using the 130 nm CMOS technology to produce three different designs each targeting a different bandwidth and gain for different optical communications data rates while optimizing the power and noise performance of each design. All the evaluated designs achieved the required specifications and show superior performance compared with TIA state-of-the-art.

A 56-Gb/s PAM4 Receiver Analog Front-End With Fixed Peaking Frequency and Bandwidth in 40-nm CMOS

This paper discusses a 56-Gb/s PAM4 receiver analog-front end (AFE) implemented in TSMC 40-nm CMOS process. The system consists of a differential 100- Ω termination, a two-stage continuous-time linear equalizer (CTLE), a variable gain amplifier (VGA), and an output buffer. The source-degenerated transconductance stage and inverter-based transimpedance (TIA) with source follower structure are adopted for both CTLE and VGA. The utilization of source follower can solve the harsh DC operation problem in conventional inverter-based TIA and extend the bandwidth. By altering the source-degenerated resistors and capacitors in the two-stage CTLE, the proposed AFE can reach fixed peaking frequency with 9-dB compensation range at high frequency. Moreover, it can also achieve a fixed bandwidth at 14 GHz and 9.5-dB DC gain tuning range when altering the feedback resistors and negative capacitance compensation network (NCC) in VGA. Measurement results demonstrate that: it can compensate for 7.3-dB channel loss at 14-GHz Nyquist frequency and open the closed eye for 56-Gb/s PAM4 signal with BER <; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-8</sup> from 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">15</sup> - 1 PRBS input. The core of the AFE occupies 0.32-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area and consumes 30-mW power from 1.1/1.2-V supply.

A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With −15.2-dBm OMA Sensitivity

This letter presents a 3-D-integrated 26 Gb/s opto-electrical receiver front-end. The electronic integrated circuit (EIC) is fabricated in a BiCMOS-55-nm technology, flipped and placed on top of the photonic integrated circuits (PICs) die through copper pillars. In the receiver chain, a fully differential shunt-feedback TI amplifier (FD-SF TIA) is followed by a limiting amplifiers (LAs) with embedded equalization, output driver and an automatic offset cancelation loop. The whole receiver provides a transimpedance (TI) gain of 76 dBΩ with 30-GHz bandwidth. By exploiting the FD-SF TIA with low parasitic capacitance of the Germanium dual heterojunction photo diode (Ge-PD) in the photonic die, the receiver achieves sensitivity of -15.2 dBm optical modulation amplitude (OMA) at Ge-PD and -10-dBm OMA at the single-mode fiber (SMF) optical output with bit error rate of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> and PRBS 15. The sensitivity is aligned with state-of-the-art receivers employing discrete photonics and, to author's best knowledge, it is the lowest reported among published 25 Gb/s receivers exploiting silicon photonics.

Analysis and design of highly linear Gm–TIA PGA with flat gain response

This paper analyzes high linearity Cherry–Hopper programmable-gain-amplifier (PGA), which is a cascade of linear transconductance (Gm) stage and transimpedance (TIA) stage. Basing on these analysis, reasons for gain peaking of Gm–TIA PGA are discussed. A Gm–TIA PGA with flat gain response and high power-efficiency is designed, and implemented in a 0.18 μm CMOS process. It draws 260-μA current from a supply of 1.8-V, while maintains a constant bandwidth of 24-MHz when driving a capacitive load of 2-pF. Flat gain response over the gain range is obtained, and the measured OIP3 reaches 19.5 dBm.

100 Gb/s Differential Linear TIAs With Less Than 10 pA/ $\sqrt {\mathrm {Hz}}$ in 130-nm SiGe:C BiCMOS

The design methodology and circuit implementation of a transimpedance (TI) amplifier (TIA) featuring low averaged input-referred current noise density without compromising the TIA bandwidth (BW) are presented. The technology role in the key performance metrics is also discussed and verified by means of two analogous TIA designs implemented in two different 130-nm SiGe:C BiCMOS processes from IHP, SG13S with $f_{T}/f_{\max }= 250/340$ GHz and SG13G2 with $f_{T}/f_{\max }= 300/500$ GHz. Both TIAs adopt a fully differential linear architecture with three stages: an input shunt-feedback TI stage followed by a variable gain amplifier which provides post-amplification with 15-dB gain control range and an output 50- $\Omega $ buffer. The TIA in SG13S features 68.5 dB $\Omega $ differential TI gain, 42-GHz 3-dB BW, and 8 pA/ $\sqrt {\mathrm {Hz}}$ averaged input-referred current noise density while the second TIA in SG13G2 provides 65 dB $\Omega $ differential TI gain, 66-GHz 3-dB BW, and 7.6 pA/ $\sqrt {\mathrm {Hz}}$ . Measured total harmonic distortion in both TIAs in the maximum gain condition is better than 5% for ~800 mVppd output swing and input currents of ~300 $\mu $ App. Both circuits dissipate 150 mW of power and are shown to operate at up to 100 Gb/s data rate with clean PRBS31 non-return to zero and PAM-4 eye diagrams. To the author’s best knowledge, the reported TIAs exhibit the lowest averaged input-referred current noise density shown to date at a BW sufficient to support 100 Gb/s net data rate, surpassing other silicon-based and InP implementations toward the next-generation 400 Gb/s optical links.

New Development Design of Low Current Measurement with Noise Reduction for High-Resolution System

The treatment of inoperable cancers in the therapy terminal in Lanzhou-China, which is located at the Institute of Modern Physics (IMP), permits to work on the actual front-end readout. The availability of detailed noise spectral density characteristics for the OPA amplifier helps to develop the noise error analysis for high-resolution. This work focused on the noise model of the detector-preamplifier, which presents the low noise circuit schematic of the Transimpedance (TIA). Considering the parasitical influences, we develop a new approach to detect the weak signals based on resonant frequency, 1/√L1 (C1+CGS). In addition, the system eliminates leakage current in the reset switch and reduces the charge injection occur from the switches in the Gated Integrator (GI) and the configuration switch is made especially with two transmission gates switches, in series, with a grounded MOS switch, attached to the node between the two transmission gates switches and the linearity almost good.

A DC-75-GHz Bandwidth and 54 $\text {dB}\Omega $ Gain TIA With 10.9 pA/ $\sqrt {\mathrm {Hz}} $ in 130-nm SiGe:C BiCMOS

A broadband low-noise amplifier with transimpedance (TI) feedback implemented in a 130-nm SiGe:C BiCMOS technology with $f_{T}$ of 300 GHz is presented. The circuit provides 22-dB gain and 75-GHz bandwidth while dissipating only 95 mW of power, achieving a gain bandwidth against dc power efficiency (GBW/ $P_{\mathrm {dc}}$ ) of 9.9 GHz/mW. Measured noise figure (NF) is 4 dB until 26.5 GHz, rising up to 6 dB at 70 GHz based on simulation. Ultrahigh data rate support is demonstrated with clear eye diagrams up to 100 Gb/s. Intended as a TI front end for optical receivers, the amplifier features 54- $\text {dB}\Omega $ TI gain with only 10.9 pA/ $\sqrt {\mathrm {Hz}}$ averaged input-referred current noise density. Measured input-referred 1-dB compression point at 1 GHz occurs at −20 dBm input power. To the best of the authors’ knowledge, the proposed amplifier exhibits the highest GBW/ $P_{\mathrm {dc}}$ with the lowest NF reported to date, toward the next generation 400 Gb/s Ethernet.

Design of a Simple UV Double Beam Spectrophotometer Detector Based on a High Gain Trans Impedance Operational Amplifiers for RNA Measurement

In this work a simple double beam spectrophotometer detector for the nucleic acid detection has been designed. The developed system contains photodiodes as a sensor, logarithamatic transimpedance amplifier circuit and filter circuit.The developed prototype design accuracy is validated by running a RNA sample and the result shows that our simplified developed setup detects the present of RNA in the sample.

A 5-Gb/s Noise Optimized Receiver Using a Switched TIA for Wireless Optical Communications

This paper reports a systematic approach for designing a low noise and low power optical receiver targeting high sensitivity imaging architectures for optical wireless communications. For line of sight tracking in optical wireless communications, a switching matrix is employed between the pixel/photodetector array and the transimpedance (TIA) amplifier. An optimization procedure is introduced to balance various performance parameters in the optical receiver front end when including the effect of the switch. The presented optical receiver consists of a low noise, wideband TIA, where noise and stability are optimized using a series inductor at the input. The TIA is followed by a limiter with offset cancellation and 50 Ω output buffer capable of 900 mV p-p differential output swing, over the 50 Ω resistance of the BERTScope. The receiver implemented in the IBM 130 nm CMOS technology, achieves a bit error rate of 10-12 at 5-Gb/s corresponding to 2.8 μA current at the input and at 4-Gb/s corresponding to 2.1 μA input current, in presence of 1 pF input capacitance representing the photodiode. The total power consumption including the on chip 50 Ω differential output buffer is 68 mW from 1.5 V DC supply. The die area including bonding pads and output buffer is 1106 μm × 895 μm.

MIXED MODE UNIVERSAL FILTER

The configuration with electronic tunable characteristics that can work in mixed mode may be useful from IC realization viewpoint and application adaptability. This paper proposes an electronically tunable mixed mode universal filter based on multiple output current controlled current conveyor (MOCCCII) and this single topology without any alteration can be used in all four modes i.e., voltage (VM), current (CM), transimpedance (TIM) and transadmittance (TAM). The architecture uses four MOCCCIIs and two grounded capacitors; and can realize universal filter functions — low pass (LP), band pass (BP), high pass (HP), notch (NF) and all pass (AP) for all four modes. Moreover the input impedance is high and output impedance is low for voltage signal and vice-versa for current signal, hence the proposed topology is suitable for cascading for all four modes. The workability of the proposed circuit has been verified via SPICE simulations using AMS 0.35 μm CMOS technology.

A high linearity downconverter for SAW-less LTE receivers

This paper presents a high linearity downconverter implemented in a 0.18 μm CMOS process for long term evolution (LTE) receivers without a surface acoustic wave (SAW) filter. The proposed downconverter is composed of a transconductance (Gm) stage, a passive mixer, a current buffer, a transimpedance (TIA) stage, and a DC-offset cancellation (DCOC) loop. The current buffer is utilized to provide very low load impedance for the passive mixer at high frequencies and reduce the output voltage swing induced by out-of-band blockers. This technique improves the input referred third-order intercept point (IIP3) and second-order intercept point (IIP2) of the down-converter by 4.5 dB and 11 dB, respectively. The measured results show that the proposed downconverter achieves a voltage conversion gain of 29.5 dB, double sideband noise figure of 12.7 dB, out-of-band IIP3 of 13 dBm and IIP2 of more than 62 dBm.

Functionalized Photonic Crystal Sensor Elements based on Nanoporous Polymers

ABSTRACTWe report the development of oxygen sensors using polymer photonic bandgap structure and CMOS chips. These integrated sensors provide a new platform for the development of low cost, low (battery) powered, light weight, robust, fast and small sensors. We demonstrate an approach to encapsulation of chemical and biological recognition elements within the porous structures. This sensing platform is built on our recently demonstrated nanofabrication technique using holographic interferometry of a photo-activated mixture that includes a volatile solvent as well as monomers, photoinitiators, and co-initiators. Resulting structure is nanoporous polymer 1D photonic bandgap structures that has reflection grating property and can be directly integrated into optical sensor systems that we have previously developed. For optical sensor system, CMOS (Complementary Metal Oxide Semiconductor) detectors that include phototransistors, trans impedance amplifier, and other signal processing units are used. Combining CMOS chip and nano-porous polymer reflection grating, we demonstrate an oxygen sensor as a prototype by encapsulating the fluorophore (tris(4,7-diphenyl-1,10-phenathroline)ruthenium(II) using fluorescence intensity.