Total Memory Requirement Research Articles

Redundant logarithmic arithmetic

A number system that offers advantages in some situations over conventional floating point and sign/logarithmic number systems is described. Redundant logarithmic arithmetic, like conventional logarithmic arithmetic, relies on table lookups to make the arithmetic unit simpler than an equivalent floating point unit. The cost of 32 bit subtraction in a redundant logarithmic number system is lower than previously published logarithmic subtraction methods. The total memory requirement for a 29-bit redundant logarithmic unit is 16 K words compared to 22 K words by the best previously published conventional sign logarithm unit, assuming similar addition techniques are employed. A redundant logarithmic number system can be implemented with online arithmetic, which would be impractical for a conventional sign logarithm number system. The disadvantages of redundant arithmetic are typical of redundant number systems. First, the redundancy doubles the storage requirements for data values. Second, the representation can become ill-conditioned, especially as a result of iterated multiplications. Third, division and square root operations are more difficult to implement in redundant logarithmic arithmetic.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A Comparison of Three Numerical Methods for Solving Differential Equations on the Sphere

Abstract We compare three numerical methods for solving vector differential equations on a sphere. A composite mesh finite-difference method using overlapping stereographic coordinate systems is compared to transform methods based on scalar and vector spherical harmonics. The methods are compared in terms of total computer time, memory requirements, and execution rates for relative accuracy requirements of two and four digits in a five-day forecast. The computational requirements of the three methods were well within an order of magnitude of one another. In most of the cases that are examined, the time step was limited by accuracy rather than stability. This problem can be overcome by the use of a higher order time integration scheme, but at the expense of an increase in the memory requirements.

A memory-efficient fast Fourier transformation algorithm for crystallographic refinement on supercomputers

A vectorizable algorithm for fast computation of structure factors and derivatives during refinement of macromolecular structures is presented. It is based on fast Fourier transformations on subgrids that cover the unit cell of the crystal. The use of subgrids allows reduction of the total memory requirements for the computations without producing large overheads. The algorithm is applicable to all space groups. The performance of the algorithm on a conventional scalar computer as well as on supercomputers is discussed.

Time-shared communications software for real-time digital controllers

The paper describes a software package designed to provide operator communication with a realtime digital controller. The structure of the program gives priority to the execution of the control algorithm, while the communication routines run in a time shared manner as a background task. The communication package can be used by the control algorithm itself to signal faults or error conditions to the operator, and provides an automatic method of fault logging. Operator intervention can be initiated from a keyboard or from a special-purpose operator console. The system has been designed and built round a Texas Instruments TI9900 microprocessor-based controller, although the package could be adapted for use with other processors. The total memory requirement of the present implementation is under 2K words

Time-shared communications software for real-time digital controllers

The paper describes a software package designed to provide operator communication with a realtime digital controller. The structure of the program gives priority to the execution of the control algorithm, while the communication routines run in a time shared manner as a background task. The communication package can be used by the control algorithm itself to signal faults or error conditions to the operator, and provides an automatic method of fault logging. Operator intervention can be initiated from a keyboard or from a special-purpose operator console. The system has been designed and built round a Texas Instruments TI9900 microprocessor-based controller, although the package could be adapted for use with other processors. The total memory requirement of the present implementation is under 2K words

Optimal Design of Wastewater Collection Systems

The most sought-after requirements of an optimization algorithm are with respect to computer time and memory. For the six-link system the time required for execution of a program is 70 sec on an IBM-360 (Model No.44) computer indicating that the algorithms are fast converging. Further, it takes only 75 sec to compile and load the program on a disk. The requirement of storage space is also very small. The total memory requirement on this computer is 9E8 bytes. A nonlinear algorithm based on Powell’s method has been developed to optimize the design of wastewater collection systems. The algorithm is fast converging, requires small computer memory, employs the discrete set of commercially available diameters, and leads to a global optimum. The economics of optimal and conventional designs has been compared for a six-link wastewater collection system at Roorkee, India. A parametric study has also been presented.

Automatic Sectionalization of Power System Networks for Network Solutions

This paper describes a method for the automatic optimized sectionalization of power transmission networks as required for the application of piecewise solution techniques. The optimality criterion is the minimization of the total computer core memory requirement for storage of the network impedance or admittance matrices.