Total Dose Failure Research Articles

(Invited) Total Dose Effects and Single Event Upsets During Radiation Damage of GaN and SiC

In critical defense applications and autonomous vehicles, there is an increasing transition from high-voltage Si power devices, which are limited in current ratings and power efficiency, to commercial wide bandgap (WBG) power devices. SiC and GaN power devices are now used in the automotive, wireless, and industrial power markets, but their adoption into space and avionic applications is hindered by their susceptibility to permanent degradation and catastrophic failure from heavy-ion exposure. Efforts to space qualify WBG power devices have revealed they are susceptible to damage from the high-energy, heavy-ion space radiation environment (galactic cosmic rays) that cannot be shielded. Higher voltage devices are more susceptible to these effects; as a result, to date, there are space-qualified GaN transistors now available, but limited to 300 V. Recent radiation testing of 600-V and higher GaN transistors has shown failure susceptibility at about 50% of the rated voltage, or less. Similarly, SiC power devices have undergone several generations of advances commercially, improving their overall reliability, but catastrophically fail at less than 50% of their rated voltage. SiC components have demonstrated susceptibility to radiation damage under heavy-ion single-event effects testing, reducing their utility in the space galactic cosmic ray (GCR) environment. In SiC-based Schottky diodes, catastrophic single-event burnout (SEB) and other single-event effects (SEE) have been observed at ~40% of the rated operating voltage, as well as an unacceptable degradation in leakage current at ~20% of the rated operating voltage. SEE caused by terrestrial cosmic radiation (neutrons) have also been identified by industry as a limiting factor for the use of SiC-based electronics in aircraft. Currently, small satellite applications require a Total Ionizing Dose (TID) resilience of 30 krad (Si) and Single Event Latch-up (SEL) hardened up to 80 MeV-cm2/mg linear energy transfer. Radiation hardening comes with a cost. As with Si power MOSFETs, electrical performance will suffer from hardening techniques. The two primary failure radiation damage concerns in current generations of electronics for space applications are (i) Single event upset, in which incident ionizing radiation results in the flipping of a bit from 0 to 1 or vice versa. While this may be a problem for data loss or operation, it does not lead to permanent damage of the device and (ii) Total dose failure, in which irradiation leads to the creation of a sufficient density of defects. These then lead to degradation of the electrical properties to the point of permanent failure. In this talk we will review radiation damage results for GaN and SiC and compare these to initial data for Ga2O3.Work performed as part of Interaction of Ionizing Radiation with Matter University Research Alliance (IIRM-URA ) , sponsored by the Department of the Defense, Defense Threat Reduction Agency under award HDTRA1-20-2-0002. The content of the information does not necessarily reflect the position or the policy of the federal government, and no official endorsement should be inferred. *Current address: Department of Materials Science and Engineering, University of Wisconsin-Madison, Madison, WI 53706

Worst Case Test Vectors for Sequential Circuits in Flash-Based FPGAs Exposed to Total Dose

We introduce a methodology for identifying worst case test vectors (WCTVs) for delay failures induced by total dose in sequential circuits implemented in flash-based field-programmable gate arrays (FPGAs) using design-for-testability (DFT) techniques and path delay faults using commercially available DFT and automatic test pattern generation (ATPG) tools. We verified this methodology experimentally using Microsemi ProASiC3 FPGAs and Cobalt 60 facility. The experimental results show a significant impact on the total dose failure level when using WCTVs in total-dose testing of FPGA devices.

Fault Modeling and Worst-Case Test Vector Generation for Flash-Based FPGA’s Exposed to Total Dose

We analyzed the delay failure induced in flash-based field-programmable gate arrays (FPGAs) exposed to total-ionizing dose. We developed a novel cell-level fault model for such delay failure. We introduced a novel methodology for identifying worst case test vectors (WCTVs) for flash-based FPGA devices exposed to total-ionizing dose based on the developed fault model for delay failure. We introduced a novel methodology to identify WCTVs for flash-based FPGAs using commercially available design and automatic test pattern generation tools. We validated the delay fault model using Microsemi ProASIC3 FPGAs and Cobalt 60 facility. The experimental results also show significant impact on the total-dose failure levels when using WCTVs.

How Long Can the Hubble Space Telescope Operate Reliably?–A Total Dose Perspective

The Hubble Space Telescope has been at the forefront of discoveries in the field of astronomy for more than 20 years. It was the first telescope designed to be serviced in space and the last such servicing mission occurred in May 2009. The question of how much longer this valuable resource can continue to return science data remains. In this paper a detailed analysis of the total dose exposure of electronic parts at the box level is performed using solid angle sectoring/3-dimensional ray trace and Monte Carlo radiation transport simulations. Results are related to parts that have been proposed as possible total dose concerns. The spacecraft subsystem that appears to be at the greatest risk for total dose failure is identified. This is discussed with perspective on the overall lifetime of the spacecraft.

Radiation effects on advanced flash memories

Radiation tests of advanced flash memories including, multi-level flash technology, are compared with results from previous generations. Total dose failure levels are comparable to or lower than those of older technologies, but are likely still caused by degradation of the internal charge pump. Small numbers of read errors were observed during single event tests of the multi-level devices that appear to be caused by shifts in the sense amplifier detection levels or cell threshold shifts rather than loss of electrons off the floating gate.

Single event effects and performance predictions for space applications of RISC processors

Proton and ion single event phenomena (SEP) tests were performed on 32-b processors including R3000A's from all commercial manufacturers along with the Performance PR3400 family, Integrated Device Technology Inc. 79R3081, LSI Logic Corporation LR33000HC, and Intel i80960MX parts. The microprocessors had acceptable upset rates for operation in a low earth orbit or a lunar mission such as CLEMENTINE with a wide range in proton total dose failure. Even though R3000A devices are 60% smaller in physical area than R3000 devices, there was a 340% increase in device single event upset (SEU) cross section. Software tests of varying complexity demonstrate that registers and other functional blocks using register architecture dominate the cross section. The current approach of giving a single upset cross section can lead to erroneous upset rates depending on the application software.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Total dose failures in advanced electronics from single ions

Hard errors from single heavy ions have been reported in advanced commercial CMOS memories. The authors examine the physical interactions of ions with MOS gate oxides-charge generation, recombination, transport, and trapping. They also consider device and circuit characteristics. They conclude that hard errors from single ions are to be expected, and should not be considered surprising. >

Wafer Mapping of Total Dose Failure Thresholds in a Bipolar Recessed Field Oxide Technology

Ionizing radiation failure thresholds were measured across a silicon wafer using 10 KeY x-rays to determine the success of hardened process modifications and to examine wafer level hardness assurance screening techniques. Topological wafer maps of the total dose failure response for Signetics 74F00 circuits are presented.

Total Dose Indujced Hole Trapping and Interface State Generation in Bipolar Recessed Field Oxides

Ionizing radiation induced trapped hole density, Not, and interface state density, Nit, are investigated in bipolar recessed field oxides using parasitic nMOS transistors. Most of the results agree with previous studies made with capacitors on generic thick field oxides. New results include the effects of PN junction fringing fields on inversion voltage shift. Implications are made for total dose failure of bipolar microcircuits based on results of inversion voltage shift versus channel length and channel doping density. under contract DNA001-83-C-0115.

Total Dose Effects in Recessed Oxide Digital Bipolar Microcircuits

Total dose failure levels in digital bipolar microcircuits utilizing recessed oxides were measured at levels as low as 5 Krad(Si). Typical failure levels are in the 10-100 Krad(Si) range. Failure was found to be a strong function of irradiation bias and annealing time after irradiation. In addition, total dose windows below 100 Krad(Si) were observed. The radiation failure mechanism is predominantly inversion of p type silicon either at the bottom of the recessed field oxide, causing buried layer to buried layer channeling, or on the oxide sidewall causing collector to emitter leakage. In addition, a failure mode due to increased sidewall current was observed in a nonisolated form of integrated injection logic. Hardening approaches have been identified and investigated at several manufacturers. Device failure levels were found to vary by several orders of magnitude depending on process lot and layout revision.

Gamma-Ray Effects on an N-Channel MOS Microprocessor (Z8002) in the Zero-Bias Condition

A Cobalt-60 gamma-ray test of Z8002 n-channel MOS microprocessors in a zero-bias condition is described and discussed. The devices were irradiated at room temperature before being functionally tested at high, room and low temperatures. For all devices the total dose failure levels were found to reduce with increasing temperature. The results of these tests have shown a wide spread in failure level with temperature for one of the two manufacturer's products examined (AMD) with high temperature failure first recorded as low as 13.1 Krads (Si), after testing devices from three batches. The other manufacturer's product to be examined (Zilog) had a considerably better worst case failure level of 35.1 Krads (Si) at high temperature, but this result is based on devices taken from a single batch. Some limited parametric testing has provided trend information on supply current, input leakage and threshold voltage change versus total dose. Room temperature annealing effects on post irradiation performance were also studied for an approximate 40 day period and significant changes were found to occur.

Temperature Effects on Failure and Annealing Behavior in Dynamic Random Access Memories

Total dose failure levels and long time anneal characteristics of dynamic random access memories are measured while the devices are exercised under actual use conditions. These measurements were performed over the temperature range of -60 C to +70 C. The total dose failure levels are shown to decrease with increasing temperature. The anneal characteristics are shown to result in both an increase and decrease in the measured number of errors as a function of time. Finaly a description of the test instrumentation and irradiation procedures are given.

EPROM Erasure in Transient and Total Dose Gamma Environments

Four versions of 32K bit EPROMs from three manufacturers were exposed to transient gamma and total dose radiation environments. At a maximum tested transient level of 3.9×109 rad(Si)/sec, the devices were found to be resistant to erasure. Failures from the total dose exposures occurred at different levels for the four device types. The most susceptible part type failed between 3200 and 4500 rad(Si). The most resistant type failed between 9500 and 11000 rad(Si). These variations in total dose failure threshold are attributed to the floating gate oxide thickness differences between the four versions of this EPROM.

Fault Tolerant Memories for Single Particle Radiation Effects

Fault tolerant memory mechanizations are presented in this paper which combine standard Error Detection and Correction (EDAC) techniques with unique memory electrical/spacial organizations and computer protocols which account for single particle radiation effects and significantly reduce their impact on the memory system. The mechanizations also enhance reliability and increase survivability to macroscopic radiation effects including total dose failure and dose rate upset. Standard EDAC mechanizations allow the memory designer to reduce susceptibility to single particle soft upsets at the system level by orders of magnitude. The memory organization and computer protocols presented herein extend this susceptibility reduction to latchup and multiple soft or hard errors in a common word. The mechanizations are compatible with implementation on auxiliary LSI chip sets or partially in VHSIC RAM device structures themselves. They are also compatible with fault tolerant computer mechanizations which account for failure or upset of non RAM device logic circuitry (Processor and Memory).

Ionizing Dose Rate Effects in Microprocessors

The total ionizing dose failure levels in microprocessors for various radiation pulse widths appear to be dose-rate dependent. This apparent dose rate effect is demonstrated by comparing the total dose failure levels for 150-ns and 1-μs pulses, and >5-s 60Co irradiation. All irradiations were done while the device was operating under normal bias. Total dose failure level data are presented for five types of microprocessors: RCA 1802, Motorola 6800, Intel 8080 and 8085, and AND 9080. Each type exhibited the same dose-rate effects. This dose-rate dependence is caused by the collapse of the electric field across the gate oxide during irradiation. Resulting failure levels for high dose-rate exposure of MOS devices then approach the total ionizing dose failure levels for unbiased MOS devices which are from 3 to 10 times higher than biased devices. This unbiasing is caused by the large power supply currents which flow during the radiation pulse. These currents are limited by package lead resistances, which in most cases protect the device from burnout.

Radiation Testing of Recent Vintage 8080A Microprocessors from Several Manufacturers

A novel radiation experiment was performed using recent vintage 8080A microprocessors from several manufacturers. Functional self tests were continuously monitored during irradiation. Total dose failure levels as well as implications of dose rate dependency and mode of failure are noted.

Total Dose Failure Levels of Some Vlsics

Two types of devices representative of very-largescale-integration, 64k dynamic RAMs and 68000 microprocessors, have been studied in a total dose ionizing radiation environment. Both types of parts show an improved hardness compared to earlier test results for large-scale-integrated dynamic RAMs and microprocessors. This indicates that the previously developed downward trend of radiation hardness versus circuit complexity may not continue to prevail.

Transient and total dose radiation characteristics of an SOS LSI array

Transient and total dose characteristics of irradiated 300 gate LSI arrays are presented. These arrays are configured to carry out the arithmetic function of an Arithmetic-Logic Unit. Samples were fabricated with ion implanted source-drain regions, wet-or dry-oxide (SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> ) gate insulator, and n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> deposited polysilicon gates. Irradiation sources were the AFCRL Linac operating with 20- and 100-ns pulses, and the Fort Monmouth Cobalt 60 facility. Transient upset measurements of four worst case outputs are presented with the samples operating in an active and static mode during exposure. Worst case is the static mode of operation during exposure. The upset dose rate during an active mode depends on the time of occurrence of the radiation pulse relative to the transition waveform. Functional failure doses made in-situ are presented for exposure dose rates ranging from 4.2 to 1000 krads (Si)/h. Corresponding total dose failure for these dose rates varies from 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> rads (Si). The rapid annealing properties of the gate insulator are responsible for this dependence on dose rate.

Effects of Total Dose Ionizing, Radiation on the 1802 Microprocessor

Several versions of the 1802 CMOS microprocessor were subjected to Co-60 irradiations. Total dose data is provided for production line parts from two vendors, a specially processed radiation hard lot, and one developmental SOS unit. The increase in total dose failure level from 1 x 104 to 5 x 105 rads(Si) for the specially processed Parts proves the feasibility of hardening the Si-gate LSI technology used for the 1802.