Modulator Topology Research Articles

Reconfigurable [formula omitted] modulator topology design through hierarchical mapping and constraint extraction

This paper presents a novel methodology for designing reconfigurable continuous-time Δ Σ modulator topologies while considering circuit-level implementation constraints. Topologies are optimized for minimizing their structural complexity, maximizing their robustness with respect to circuit nonidealities, and maximizing the feasibility of their circuit-level implementation. A case study for a three mode reconfigurable Δ Σ modulator shows that the produced topologies avoid circuit-level implementation difficulties existing in other approaches.

Design and Analysis of Shock-Absorbing Structure for Flat Panel Display

In order to protect the fragile panel of a liquid crystal display (LCD) from damage caused by shock, a shock-absorbing structure designed to absorb most of the shock energy can be installed between the panel and the frame. The design methodology proposed in this paper uses the topology optimization technique in designing this shock-absorbing structure. The objective is to minimize the maximal panel stress with the shock-absorbing structure, which is designed to be of minimal weight. An algorithm which integrates three modules-the finite-element software ANSYS/LS-DYNA used as the structural analysis tool, the optimization module based on the differential evolution method, and a topology module - is developed to achieve crashworthiness design. Numerical results show that an optimal layout of the shock-absorbing structure with minimal weight is obtained. And, this shock-absorbing structure is proven to effectively increase LCD shock resistance.

Clock jitter error in multi-bit continuous-time sigma-delta modulators with non-return-to-zero feedback waveform

This paper presents a detailed study of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero feedback waveform. It is demonstrated that jitter-induced noise power can be separated into two main components: one that depends on the modulator loop-filter transfer function and the other dependent on input signal parameters, i.e. amplitude and frequency. The latter component, not considered in previous approaches, allows us accurately to predict the resolution loss caused by jitter, showing effects not taken into account previously in literature despite the fact that they are especially critical in broadband telecom applications. Moreover, the use of state-space formulation makes the analysis quite general and applicable to either cascade or single-loop architectures. Closed-form expressions are derived for in-band error power and signal-to-noise ratio that can be used to optimize modulator performance in terms of jitter insensitivity. Time-domain simulations of several modulator topologies (both single-loop and cascade) intended for VDSL application demonstrate the validity of the presented approach.

Pro-finite p-adic Lie algebras

Let p be a prime number. A finite nilpotent Lie ring of characteristic a power of p is called finite- p. A pro- p Lie ring is an inverse limit of finite- p Lie rings. Pro- p Lie rings play a role in Lie theory similar to that played by pro- p groups in group theory. Every pro- p Lie ring admits the structure of a Lie algebra over the p-adic integers; furthermore, every p-adic Lie algebra of finite rank as a p-adic module has an open pro- p subalgebra. We make a detailed study of pro- p Lie rings in terms of various properties, including their topology, Prüfer rank, subring growth, and p-adic module structure. In particular, we prove the equivalence of the following conditions for a finitely generated pro- p Lie ring L: L has finite Prüfer rank; L is isomorphic to a closed subring of gl ( V ) for some p-adic module V of finite rank; and, for sufficiently large n, the Lie F p -subalgebra W n = 〈 e 12 , t e 22 〉 ⊆ gl 2 ( F p [ t ] / 〈 t n 〉 ) is not an open section of L. By reducing to the pro- p Lie ring case, we also prove that all Engelian pro-finite Lie rings are locally nilpotent. This is a Lie theoretic analogue of Zelmanov's theorem which states that every periodic pro- p group is locally finite.

Symbolic Statistical Analysis of SNR Variation for Delta–Sigma Modulators

Traditional methods for statistical analysis of delta-sigma modulators are based on Monte Carlo analysis to iteratively change the design parameters and evaluate the histogram of signal-to-noise ratio (SNR). But Monte Carlo analysis is time-consuming, especially when a number of candidate designs need to be considered. In this brief, a systematic symbolic formulation of statistical SNR variation is made so that variations of capacitors are directly translated to SNR variation. In addition, the symbolic formulation is derived from a generic modulator topology, so that the derived symbolic formulation is applicable to any topology that is covered by the generic topology. Experiments have shown the symbolic formulation can provide fast and reasonably accurate estimation of statistical SNR variation, especially for high-order modulators.

Systematic Methodology for Designing Reconfigurable $\Delta\Sigma$ Modulator Topologies for Multimode Communication Systems

This paper proposes a systematic methodology for designing reconfigurable continuous-time DeltaSigma modulator topologies. Topologies are optimized by minimizing the complexity of the topologies, maximizing the sharing of circuits between the different modes, maximizing the topology robustness with respect to circuit nonidealities, and minimizing the total power consumption. This paper presents a case study for designing topologies for a three-mode reconfigurable DeltaSigma modulator and compares the obtained topologies with a state-of-the-art design and topologies obtained using the DeltaSigma Toolbox

Guest Editorial [intro. to the special issue on the 2006 IEEE/ACM Design, Automation and Test in Europe Conference

The eight articles in this special issue are extended versions of selected papers from the 9th IEEE/ACM Design, Automation and Test in Europe (DATE) Conference, which was held on March 6-10, 2006 in Munich, Germany. The papers address some of the following topics: multiprocessor systems-on-chip (MPSoC) architectural and methodological issues; the problem of accelerating embedded processor execution through instruction set extensions; techniques for optimal bit width allocation in the conversion from floating point to fixed point in arithmetic circuits for low power; an algorithm to optimize circuits with tight sequential cycles; efficient methods to solve more general quantified Boolean formulas (QBFs); and soft error rate (SER) analysis for combinatorial circuits and the design of reconfigurable continuous-time delta-sigma modulator topologies. The selected papers are briefly summarized.

Quantizer Nonoverload Criteria in Sigma–Delta Modulators

A simple method to guarantee absolute stability in multibit sigma-delta modulators (SDMs) is to ensure that the quantizer never overloads. This applies to any SDM. Derivation of the requirements for nonoverload have previously been shown for different types of modulators; the sigma-delta or output-feedback modulator with rounding quantizer as well as the error-feedback modulator using truncation. Here, these nonoverload requirements will be clarified and a unified formulation is presented that is not limited with regard to modulator topology or quantizer function

A Multiplierless DC-Blocker for Single-Bit Sigma-Delta Modulated Signals

The DC content in single-bit domain is both undesirable and hard to remove. In this paper we propose a single-bit multiplierless DC-blocker structure. The input is assumed to be sigma-delta modulated bitstream. This DC-blocker is designed using a delta modulator topology with a sigma-delta modulator (SDM) embedded in its feedback path. Its performance is investigated in terms of the overall signal-to-noise ratio, the effectiveness of DC removal, and the stability. The proposed structure is efficient for hard-ware realisation.

High-level synthesis of /spl Delta//spl Sigma/ Modulator topologies optimized for complexity, sensitivity, and power consumption

This paper proposes a novel topology-synthesis methodology for single-loop single-bit /spl Delta//spl Sigma/ modulators. The goal is to explore all possible topologies and to obtain the optimal topology under various design considerations, such as hardware complexity, modulator sensitivity, and power consumption. A generic modulator architecture that incorporates all possible feedback and feedforward signal paths was defined and the symbolic noise transfer function (NTF) and signal transfer function (STF) for the generic topology were derived. The symbolic functions were then used to formulate the topology-exploration problem as a mixed-integer nonlinearly constrained programming (MINLP) problem that simultaneously generates and selects the optimal modulator topology with respect to the cost function. Experiments show the superiority of synthesized topologies as compared to traditional modulator topologies.

Quadrature /spl Sigma//spl Delta/ modulators with a dynamic element matching scheme

This paper presents a new topology of a multibit quadrature bandpass sigma-delta modulator which employs a simple dynamic element matching (DEM) technique in order to reduce the effects of path mismatch, namely aliasing in the signal band of the mirror images of the signal and of the quantization noise. The DEM scheme results in a reduction of the aliasing of the quantization noise mirror image while it reduces the input signal mirror image alias problem to a self-image problem. It is shown that the self-image can be completely removed in switched-capacitor implementations by using the same capacitors to sample the input and the reference of the feedback digital-analog converters (DACs). Moreover, a simple method for extending low-pass mismatch noise shaping techniques to the complex bandpass case is proposed for the case of multibit feedback DACs.

Toward Predictive Models of Mammalian Cells

Progress in experimental and theoretical biology is likely to provide us with the opportunity to assemble detailed predictive models of mammalian cells. Using a functional format to describe the organization of mammalian cells, we describe current approaches for developing qualitative and quantitative models using data from a variety of experimental sources. Recent developments and applications of graph theory to biological networks are reviewed. The use of these qualitative models to identify the topology of regulatory motifs and functional modules is discussed. Cellular homeostasis and plasticity are interpreted within the framework of balance between regulatory motifs and interactions between modules. From this analysis we identify the need for detailed quantitative models on the basis of the representation of the chemistry underlying the cellular process. The use of deterministic, stochastic, and hybrid models to represent cellular processes is reviewed, and an initial integrated approach for the development of large-scale predictive models of a mammalian cell is presented.

Hysteresis controller with constant switching frequency

Switch mode audio power amplifiers are showing up on market in still greater numbers because of advantages in form of high efficiency and low total system cost, especially for high power amplifiers. Several different modulator topologies have been made, ranging from standard PWM to various self-oscillating and digital modulators. Performance in terms of low distortion, noise and dynamic range differs significantly with the modulator topology used. Highest system performance is generally achieved with analog modulators made as a modulator loop including at least the power stage of the amplifier, because of benefits from continuous time operation and non-quantized resolution. This type of modulator uses no external carrier signal, and is called self-oscillating modulators. The work presented in this paper refers to switch mode audio power amplifier, but can be used within a wide range of DC-DC or DC-AC converters as well.

Efficient double-sampled cascaded .SIGMA..DELTA. modulator topologies for low OSRs

This paper presents novel double-sampling cascaded sigma-delta modulator topologies for wideband applications. The proposed modulator structures employ finite impulse response (FIR) noise transfer function (NTF) to achieve the aggressive noise shaping with an additional zero at the half of the sampling frequency to alleviate the quantization noise folding. Cascading of the proposed modulator structures is very simple without any additional circuit requirements.

Switching-mode-dependent magnetic interlayer coupling strength in spin valves and magnetic tunnel junctions

We have studied the magnetization reversal dynamics of spin valves and magnetic tunnel junctions deposited on step bunched silicon substrates with a strong topological modulation. Our measurements show that the magnetization reversal is dominated by domain wall propagation at low field sweep rates and nucleation processes at high sweep rates. The magnetostatic orange peel coupling present in quasi-static conditions between the magnetic layers disappears when switching by nucleation becomes dominant. Micromagnetic simulations show that this phenomenon can be explained taking into account the modulated topology of the substrate.

A high-level simulation and synthesis environment for ΔΣ modulators

An approach is presented for the high-level simulation and synthesis of discrete-time /spl Delta//spl Sigma/ modulators based on a simulation-based optimization strategy. The high-level synthesis approach determines both the optimum modulator topology and the required building block specifications, such that the system specifications-mainly accuracy (dynamic range) and signal bandwidth-are satisfied at the lowest possible power consumption. A genetic-based differential evolution algorithm is used in combination with a fast dedicated behavioral simulator to realistically analyze and optimize the modulator performance. The approach has been implemented in a tool called Daisy (Delta-Sigma Analysis and Synthesis). Experimental results are shown for both the analysis and synthesis capabilities, illustrating the effectiveness of the approach. The selected range of optimized /spl Delta//spl Sigma/ modulator topologies as a function of the modulator specifications for a wide range of values indicate the capabilities of and the performance range covered by the tool.

On Prebox Module Topologies

Let R be a complete topological division ring whose topology is determined by a real-valued valuation, and let M be a vector space over R. It is proved that M admits a Hausdorff module topology preceding the box topology in the lattice of all module topologies if and only if the dimension of the vector space M over R is a measurable cardinal.

A DSP controlled resonant active filter for power conditioning in three-phase industrial power systems

This paper presents a DSP controlled resonant active filter for power conditioning in three-phase industrial or commercial power systems. The active filter is designed to cancel lower-order harmonics generated by nonlinear loads using a series resonant LC tank tuned to a high frequency along with a pulse-width modulated (PWM) rectifier topology. The PWM control of the active filter allows for independent control of lower-order harmonics to efficiently cancel load-generated harmonics for power quality improvement. The active filter control algorithm is simulated in MATLAB and the real-time harmonic cancellation process is implemented on a DSP and verified through experimental results.

New solutions for a low-cost power electronic building block for matrix converters

This paper analyzes some aspects of integrating the matrix converter (MC) bidirectional switches into a power module. The analysis produces two optimal topologies for a power module: one for low-power and another for medium/high-power MCs. A new power module topology for a low-power three-phase-to-three- phase MC is proposed. By using bootstrap circuits to feed the gate-drivers, the proposed configuration requires only three insulated power supplies for a complete MC. This proposal constitutes a solution recommended in the low-power range, where low cost and low volume are the main objectives. Furthermore, a configuration of a power electronic building block for MCs is proposed. This includes the commutation control logic and the overcurrent protection, provides safe operation, and eliminates the specific problem of operating the bidirectional switches.

MIA modulator for the LLNL “small recirculator” experiment

The Miniature Inductive Adder (MIA) is an innovative topology for high voltage pulse generator applications. A MIA modulator has been developed for the Lawrence Livermore National Laboratory (LLNL) “small recirculator” experiment. In this paper we examine the MIA fundamentals and design issues relevant to this application. Modulator performance data with a test load and with the recirculator induction cell load are presented. Ongoing work to improve the MIA performance and additional applications to which this modulator topology has been applied are discussed.