Top-view Scanning Electron Microscopy Research Articles

Photoresponsivity enhancement of W-doped ZnO film/Silicon based devices via silver nanoparticles

Silver nanoparticles (Ag NPs) were deposited onto a 2 at.% Tungsten (W)-doped ZnO (WZO)/p-Silicon (p-Si) UV photodetector using a cost-effective sol–gel method. Top-view scanning electron microscopy (SEM) images confirmed the uniform coating of Ag NPs. Cross-sectional SEM analysis revealed a WZO film thickness of 167 nm, including the Ag NP layer. UV–Vis spectroscopy demonstrated high transparency with an average value of 79.5% for the Ag NPs-coated WZO film. The bandgap energy of this film was calculated to be 3.17 eV. The fabricated photodetector, comprising the Ag NP-modified WZO film and p-Si substrate, exhibited superior performance due to enhanced optical and electrical properties. Notably, the device achieved a responsivity (R*) of 4.83 A/W, a sensitivity (S*) of 60.82, and a detectivity (D*) of 5.06 × 1012 Jones. Compared to the unmodified WZO/p-Si device, the Ag NP-coated photodetector displayed significant improvements: a 26% increase in R*, a 79% increase in S*, and a 53% increase in D*. These findings highlight the potential of incorporating metal nanoparticles into photosensitive devices to optimize light-matter interactions.

Polycrystalline inclusion-free growth of thick, lattice-matched SiGeC with high substitutional Carbon concentrations up to 2%

State of the art semiconductor manufacturing seeks to expand its range of Si-based materials with novel properties, boosting performance to comply with customer demands. These materials mostly comprise of large lattice parameter materials like Ge-rich or group III/V alloys. To reduce costs, heteroepitaxy of these materials on Si substrates is desired. Buffer solutions like SiGe [1] or Ge Virtual Substrates [2] or III/V patterned Superlattices [3] usually do not result in threading dislocations densities below 106 cm-2, which affects device performance and process robustness.The incorporation of Carbon into SiGe allows to tailor SiGe’s lattice parameter, theoretically enabling to match the Si substrate’s lattice parameter. This allows the strain-free growth of a few hundred nanometers up to several micrometers thick SiGeC on a Si substrate without the formation of dislocations.The growth of SiGeC was performed in a 300 mm industrial standard Reduced Pressure-Chemical Vapor Deposition (RP-CVD) reactor. Si2H6, GeH4 and SiH3CH3 were used as precursors with constant flows at 550°C, 10 Torr. Interstitial (C Int) and substitutional Carbon (C Sub) concentrations were determined by XPS. [4]For a 50 nm SiGeC layer with C Int~0.4% and C Sub=2.0%, smooth surfaces were observed by top view Scanning Electron Microscopy (SEM) (Fig. 1 (a)) and confirmed by Atomic Force Microscopy (AFM) (Fig. 1 (b)) with a RMS of 0.23 nm. X-Ray Diffraction measurements showed the growth of SiGeC lattice matched to the Si substrate (Fig. 1 (c)). Above ~250 nm, islands are visible on the surface by top-view SEM (Fig. 2 (a)) with the island’s diameter increasing as the SiGeC layer thickness increased. Transmission Electron Microscopy showed a dislocation free growth and that the islands/clusters were polycrystalline, originating from several hundred nanometers below the surface (Fig. 2 (b)).Growing SiGeC of the same thickness range under the same growth conditions with lower SiH3CH3 flow, resulted in fully substitutional incorporated Carbon with C Sub~1.0% and C Int below the detection limit. No islands/clusters were observed by SEM and AFM (Fig. 2 (c)). The elimination of C Int allowed to suppress the formation of polycrystalline SiGeC inclusions. The starting point of these defects should be due to point defects formed by C int clusters.Even if the reduction of SiH3CH3 flow resulted in defect free growth of thick SiGeC on Si substrates, other approaches are mandatory to incorporate higher C Sub into the SiGeC layer to achieve the desired novel properties. Dhayalan et al. [5] showed in the literature the growth of SiC with 2% of Carbon (C Sub=1.6%) without the formation of islands/clusters by introducing HCl during a Cylic Deposition Etch (CDE) process. These results are based on the preferential etching of C int point defects, which are preferentially etched by HCl, reducing the amount of C Int and preventing the formation of islands/clusters. Meanwhile, the C Sub was not significantly affected by HCl etching.The impact of HCl on the growth of SiGeC was evaluated by performing co-flow (simultaneous growth and etching) and CDE (separate growth and etching steps) with various small HCl flows, preventing aggressive etching of monocrystalline SiGeC, and varying the duration of the CDE etch step. The introduction of HCl during a co-flow process changed the C and Ge incorporation. The C Sub concentration varied between 2.0% and 1.9% (Tab. 1), while the interstitial Carbon concentration varied between 0.7% and 0.3%, which is the lower detection limit of the XPS measurement. The Germanium concentration increased from 20% to 25% (Tab. 1). The growth of SiGeC without Chlorine showed the transition to a polycrystalline material at the same Carbon composition for higher Ge concentrations. XRD profiles (Fig. 3) showed a good crystalline quality, well-defined SiGeC peak, outlining a reduction of C Int thanks to the HCl etching. The CDE process did not result in significant compositional changes. To gain further understanding a wider range of HCl flows and thicker layers will be investigated in the future.The growth of dislocation free, high crystalline quality SiGeC with high C Sub was demonstrated. It was outlined that interstitial Carbon was likely to create point defects which lead to polycrystalline islands/cluster formation for thick films. HCl was shown to reduce interstitial Carbon incorporation. Other materials with large lattice parameters could benefit from the knowledge gained on defect reduction and lattice matched growth.[1] Y. Bogumilowicz et al., J. Cryst. Growth, vol. 283, no. 3, 2005.[2] J. M. Hartmann, J. Cryst. Growth, 2018.[3] J.-S. Park, M. Tang, S. Chen, and H. Liu, Crystals, vol. 10, no. 12, 2020.[4] J. Vives, J Mater Chem C, 2023.[5] S. K. Dhayalan et al., ECS J3ST, p. 6, 2017. Figure 1

Flash memory hole etch profile monitoring using x-ray and optical scatterometry

Memory hole (MH) etching may be one of the most critical and challenging processes in three-dimensional flash processing and integration. As the holes get deep, hole critical dimensions (CDs) can vary significantly during the top-down etch processing, the hole shape can deviate from a round hole, and the centerline of the hole can deviate from a vertical line. These and other complex behaviors depend on not only the process conditions (chemistry, plasma power, bias, temperature, etc.) but also the process chamber history [e.g., radio frequency (RF) hours from preventative maintenance] and how the process chambers are conditioned. In addition, the etch behavior depends on the tier thickness (ONON or OPOP), materials, deposition conditions, and overall wafer topography and shapes. The etch behavior is further related to the die positions on the wafer (center or middle versus edge dies) and the position in the memory cell (close to the edge of the cell or near the center of the cell). To monitor and control the etch behavior, many metrology methods have been developed; these include the etch-back top-view scanning electron microscopy (SEM), tilt SEM, transmission electron microscopy (TEM), and high voltage scanning electron microscopy (HVSEM). These methods are time consuming, and some are destructive, but they have been deemed the ground truth for determining variations in MH etch processes. We report a methodology that combines optical scatterometry (SCD) and small-angle x-ray scatterometry measurements to provide reliable CD profile measurements while meeting the fast-turnaround sampling requirements of high-volume manufacturing.

Transformation kinetics for low temperature post-deposition crystallization of TiO 2 thin films prepared via atomic layer deposition (ALD) from tetrakis(dimethylamino)titanium(IV) (TDMAT) and water

Background: We report on the fundamental crystallization kinetics of atomic layer deposited (ALD) TiO2 thin films undergoing a post-deposition anneal (PDA) at low temperatures to probe differences in the as-deposited film microstructure. Methods: The system of study is ALD TiO2 thin films prepared from tetrakis(dimethylamino)titanium(IV) (TDMAT) and water at 120 °C, 140 °C and 160 °C followed by ex situ low temperature annealing at temperatures ranging from 140 °C to 220 °C. All as-deposited TiO2 thin films are amorphous by X-ray diffraction (XRD). Post-deposition annealing (PDA) produces large grain anatase crystals, confirmed by XRD and top-view scanning electron microscopy (SEM). A detailed SEM study is performed to quantify the nucleation and growth kinetics by fitting microstructural data to the Johnson-Mehl-Avrami-Kolmogorov (JMAK) equation. Finally, a time-temperature-transformation (TTT) diagram is constructed to summarize the differences in crystallization behavior at different ALD deposition temperatures. Results and conclusions: Fitting microstructural data to the JMAK equation reveals an Avrami exponent close to 3 with continuous nucleation, suggesting two-dimensional, plate-like crystal growth. Applying an Arrhenius relationship to the phase transformation data, the combined activation energy for nucleation and growth is found to be 1.40–1.58 eV atom-1. Nucleation rates are determined, and an Arrhenius relationship is used to calculate the critical Gibbs free energy for nucleation (~1.3–1.4 eV atom-1). As such, nucleation is the rate-limiting step for the amorphous to anatase phase transformation. ALD growth temperature is found to dictate film microstructure with lower deposition temperatures reducing the nucleation rate and leading to larger grain sizes irrespective of PDA conditions. The nucleation rate pre-exponential frequency factor increases with increasing deposition temperature, thereby increasing the likelihood for nucleation. Interestingly, it is this difference in the vibrational modes of the amorphous structure, as indicated by the variation in the nucleation rate pre-exponential frequency factor, that alters the phase transformation rates and not a change in the activation energies for the transformation.

Transformation kinetics for low temperature post-deposition crystallization of TiO2 thin films prepared via atomic layer deposition from TDMAT and water

Background: We report on the fundamental crystallization kinetics of atomic layer deposited (ALD) TiO2 thin films undergoing a post-deposition anneal (PDA) at low temperatures to probe differences in the as-deposited film microstructure. Methods: The system of study is ALD TiO2 thin films prepared from tetrakis(dimethylamino)titanium(IV) (TDMAT) and water at 120 °C, 140 °C and 160 °C followed by ex situ low temperature annealing at temperatures ranging from 140 °C to 220 °C. All as-deposited TiO2 thin films are amorphous by X-ray diffraction (XRD). Post-deposition annealing (PDA) produces large grain anatase crystals, confirmed by XRD and top-view scanning electron microscopy (SEM). A detailed SEM study is performed to quantify the nucleation and growth kinetics by fitting microstructural data to the Johnson-Mehl-Avrami-Kolmogorov (JMAK) equation. Finally, a time-temperature-transformation (TTT) diagram is constructed to summarize the differences in crystallization behavior at different ALD deposition temperatures. Results and Conclusions: Fitting microstructural data to the JMAK equation reveals an Avrami exponent close to 3 with continuous nucleation, suggesting two-dimensional, plate-like crystal growth. Applying an Arrhenius relationship to the phase transformation data, the combined activation energy for nucleation and growth is found to be 1.40–1.58 eV atom-1. Nucleation rates are determined, and an Arrhenius relationship is used to calculate the critical Gibbs free energy for nucleation (~1.3-1.4 eV atom-1). As such, nucleation is the rate-limiting step for the amorphous to anatase phase transformation. ALD growth temperature is found to dictate film microstructure with lower deposition temperatures reducing the nucleation rate and leading to larger grain sizes irrespective of PDA conditions. The nucleation rate pre-exponential frequency factor increases with increasing deposition temperature, thereby increasing the likelihood for nucleation. Interestingly, it is this difference in the vibrational modes of the amorphous structure, as indicated by the variation in the nucleation rate pre-exponential frequency factor, that alters the phase transformation rates and not a change in the activation energies for the transformation.

Very Low Temperature Tensile and Selective Si:P Epitaxy for Advanced CMOS Devices

Nowadays, “more Moore” and “more than Moore” device architectures are becoming more and more complex. In CEA-Leti, we work on the “CoolCubeTM” 3D sequential integration which is based on the stacking of FDSOI devices [1]. We present solutions, at T<500°C, for the integration of SiP Raised Sources & Drains (RSD) in the upper devices without degrading the electrical performances of the bottom ones. We also target a lowering of the RSD resistance and an increase of the electron mobility in the channel of NMOS devices thanks to tensile strain [2]. Such a know-how will be useful to minimize the contact resistance and fabricate other types of devices such as FINFETs or h-GAA (e.g. nano-sheet devices) with Si (110) surfaces.Experiments were carried out in an Applied Materials epitaxy reactor featuring (i) liquid precursor delivery, together with H2, N2 or He carrier gas capability, enabling the use of Cl2; (ii) “High Precision Temperature Control (HPTC)”, allowing excellent LT control and enabling flexible rotation speeds; (iii) “precision flow distribution PFD-III”, enhancing uniformity performances. Selective Epitaxial Growth (SEG) is usually obtained with “co-flow” processes at rather high temperatures (>600°C). Chlorinated precursors (SiH2Cl2 (+ GeH4) + HCl, typically) are then sent simultaneously into the growth chamber. At LT (<500C°C), HCl cannot decompose, however. To overcome those limitations, we used a Cyclic Deposition Etch (CDE) strategy, with non-selective depositions followed by selective chemical vapor etches, to obtain SiP SEG.This strategy allowed us to obtain high quality films, as shown in Fig.1. The Omega-2Theta scans around the (004) X-Ray Diffraction order for tensile SiP (t-SiP) layers grown at T < 500°C with different Phosphorus concentrations were indeed typical of monocrystalline layers, with well-defined and intense peaks together with numerous thickness fringes. The substitutional P contents in those ~ 60 nm thick t-SiP layers were in the 1.02% - 5.42% range. The good layer uniformity in terms of thickness and P content, over a 300mm wafer radius, is shown in figure Fig.2.These layers grown at T <500°C were smooth, as shown in Fig.3, with a 0.21 nm Root Mean Square (RMS) roughness for a 60nm thick Si:P layer, i.e. a value close to the typical RMS roughness for t-SiP layers grown at high temperature with a chlorinated chemistry.The electrical resistivity in various t-SiP layers is plotted in Fig.4 as function of the substitutional phosphorus concentration and for various growth temperatures in the 450°C – 525°C range. Reducing the temperature by 75°C halved the electrical resistivity. We were able to achieve a resistivity as low as 0.21 mOhm.cm for a t-SiP layer with 5.8% of P grown at 450°C.We then evaluated, at first on tests structures without gates, our process selectivity. A top view Scanning Electron Microscopy image of a t-SiP layer grown non-selectively, with numerous amorphous SiP nuclei on SiO2, is shown in Fig 5.a. After some careful optimization, we succeeded in having fully selective processes versus SiO2, as shown in Fig 5.b.We then tested such optimized processes on low density FD-SOI devices with 28 nm design rules. A top-view SEM image of transistors after such a growth is shown in Fig.6. The growth selectivity was excellent, with nitride spacers and hard masks as well as isolations free of a-SiP nuclei for 31 nm of t-SiP with 4.5% of P deposited in the Sources/Drains. The surface was smooth, with a RMS roughness as low as 0.30nm on active areas, as shown in Fig.7. Thanks to High Resolution Reciprocal Space Maps (HR-RSM), we measured a Phosphorus concentration of 4.5% for that SiP layer grown on SOI. The very high quality of that epitaxy layer, with well-defined thickness fringes, is obvious in Fig.8. Cross-sectional Transmission Electron Microscopy (TEM) images such as the one shown in Fig. 9 enabled us to confirm, at the nanoscale, the excellent quality of such layers in RSDs.To sum up, we were able to develop a tensile Si:P process which was shown to be selective, at a temperature lower than 500°C, against SiO2 and SiN. Such t-SiP layers were successfully integrated in the Sources/Drains regions of FD-SOI 28nm devices. The very low material resistivity and the high phosphorus content should yield, notably because of tensile strain, performant NMOS devices in the near future.[1] C. Fenouillet-Beranger et al., IEEE TED 68, 3142-3148 (2021)[2] V. Chan et al., IEEE 2005 Custom Integrated Circuits Conference 2005, pp. 667-674 Figure 1

(Best Student Presentation Award) Reduced Pressure – Chemical Vapor Deposition of Monocrystalline and Polycrystalline Si(:B) and SiGe(:B) Layers on Blanket Wafers

Monocrystalline SiGe alloys can be used instead of monocrystalline Si in order to increase the performances of devices such as heterojunction bipolar transistors (HBTs) [1]. The epitaxial growth of blanket, monocrystalline SiGe layers on Si with a dichlorosilane + germane + hydrochloric acid chemistry was extensively investigated in the literature [2,3]. Similarly, a switch from polycrystalline Si to polycrystalline SiGe can be favorable, for instance, in Complementary-MOS (C-MOS) devices [4,5]. However, the blanket growth by Reduced-Pressure Vapor Deposition (RP-CVD) of polycrystalline Si and SiGe has not been systematically investigated. We have thus performed a one-to-one comparison in terms of growth kinetics and electrically active dopant incorporation between blanket monocrystalline and polycrystalline Si(:B) and SiGe(:B) layers.Epitaxies or depositions were performed, in 300 mm RP-CVD chambers, on two types of templates (Fig.1): i) N-type Si substrates (Fig.1(a)) and ii) poly-Si/oxide/ P-type Si substrates (Fig.1(b)). The poly-Si layer in stack 1.(b) was obtained thanks to amorphous Si deposition followed by annealing at 750 °C, resulting in a poly-Si film. SiH4+HCl+H2 (named Process 1) and SiH2Cl2 (DCS)+HCl+GeH4+H2 (named Process 2) chemistries were used to deposit Si and SiGe layers between 675-750 °C and 10-20 Torr.Monocrystalline and polycrystalline SiGe growth kinetics for two process conditions: i) 750 °C, 10 Torr with a HCl partial pressure of 0.05 Torr and ii) 725 °C, 10 Torr, with a HCl partial pressure of 0.06 Torr, were similar to that in the literature [1-3, 6-8]. As already shown for monocrystalline layers, there was an increase of the intrinsic SiGe growth with the germane partial pressure and the temperature. Meanwhile, it was reduced when adding HCl (Fig.2). Very similar growth rates and evolutions were however obtained whatever the crystalline state of the layers.When diborane was added the gaseous mixture, different behaviors were evidenced depending on i) the crystallinity and ii) the stoichiometry. The Si:B and SiGe:B growth rates increased with the B2H6 flow whatever the chemistry (Fig.3). This was due to a hydrogen desorption increase on boron surface sites [5,10-11]. Growth rates were otherwise higher for monocrystalline than for polycrystalline layers. The electrical resistivities of c-Si:B and c-SiGe:B layers were one decade lower than those of poly-Si:B and poly-SiGe:B layers, however (Fig.4). Resistivity values were otherwise higher for c-Si:B than for c-SiGe:B. This was likely due to i) a better incorporation of B atoms into SiGe than in Si [3,8,9] and ii) a better hole mobility in SiGe [10]. An opposite behavior was observed for polycrystalline layers, with higher resistivities for poly-SiGe:B than for poly-Si:B. We otherwise had similar resistivity evolutions as the partial pressure of diborane Pp(B2H6) increased for all types of layers. A decrease was observed first, followed by a resistivity plateau then some resistivity re-increase for really high diborane flows. Such a phenomenon was already observed for monocrystalline layers and was explained by a crystalline quality degradation [3,8,9] that reduced the hole mobility. A similar behavior was assumed for poly-layers, with a morphological transition to the amorphous phase [11,12]. Top-view Scanning Electron Microscopy (SEM) images (Fig. 5) confirmed the morphological evolution of c-Si:B, poly-Si:B, c-SiGe:B and poly-SiGe:B as the diborane partial pressure increased.New data points for c-SiGe and c-SiGe:B will also be provided for other process conditions. For intrinsic layers, we will show that Refs. [1,2] x2/(1-x) = n×(F(GeH4)/F(SiH2Cl2)) relationship between the Ge concentration x and the germane over dichlorosilane mass-flow ratio is also valid at 10 Torr, with n = 3 at 700 °C with a F(SiH2Cl2)/F(H2) Mass-Flow Ratio (MFR) of 0.005 and a F(HCl)/F(H2) MFR of 0.006. Various characterization techniques were also used to determine the concentration of substitutional Boron atoms in SiGe:B layers and the lattice contraction coefficient (β = 9.11×10-24 cm3). The value of the latter, which is most useful to assess the compressive strain compensation by small boron atoms in SiGe layers, will be compared to literature values.[1] J. Appl. Phys. 88 (2000) 4044[2] J. Crystal Growth 305 (2007) 113[3] J. Crystal Growth 310 (2008) 62[4] J. Microelec. Sys. 16 (2007) 68[5] International Electron Devices Meeting (1991) 567[6] Appl. Phys. Lett. 56 (1990) 1275.[7] S. Chang et al., ECS Proceedings 87–8 (1987) 122[8] J Mater Sci: Mater Electron (2007) 18:747[9] ECS Trans. 75, 8 (2016) 265[10] Mater. Sci. Eng. B 114–115 (2004) 318[11] Appl. Phys. Lett. 66 (1995) 195[12] ECS Trans. 35, 30 (2011) 45 Figure 1

Dual Triplet Sensitization Strategy for Efficient and Stable Triplet–Triplet Annihilation Upconversion Perovskite Solar Cells

Dual Triplet Sensitization Strategy for Efficient and Stable Triplet–Triplet Annihilation Upconversion Perovskite Solar Cells

Growth kinetics and origin of residual stress of two-phase crystalline–amorphous nanostructured films

Composition-driven amorphous-to-crystalline transition is widely observed in sputter-deposited thin films. We have recently shown that peculiar two-phase crystalline–amorphous nanostructures can be obtained for compositions in the transition zone between single-phased amorphous and crystalline films, offering a new possibility to control surface topography and related functional properties. Here, the growth kinetics of the two-phase nanostructures formed in the transition zone is explored and related to residual stress measurements. From the analysis of top-view scanning electron microscopy images, the evolution with the film thickness of relevant parameters describing the growth process was extracted, i.e., surface coverage, volume fraction, and perimeter per unit area of the crystalline regions growing in competition with the amorphous ones. We demonstrate, supported in the aforementioned parameters, that residual stress evolution in the transition zone is governed by the nucleation, growth, and interaction of the crystalline regions during the competitive growth process. Our results shed new light on the kinetics of the crystalline–amorphous competitive growth phenomenon and demonstrate the relevance of residual stress measurements for exploring the growth mechanisms of complex film microstructures.

High-performance methylammonium-free ideal-band-gap perovskite solar cells

Summary The development of mixed tin-lead (Sn-Pb)-based perovskite solar cells (PSCs) with low band gap (1.2–1.4 eV) has become critical not only for pushing single-junction devices toward the maximum efficiency given by the Shockley-Queisser limit, but also for enabling all-perovskite tandem devices beyond this limit. However, achieving high power-conversion efficiency (PCE) and long-term device operation stability simultaneously remains a significant challenge for Sn-Pb-based PSCs. Here, we demonstrate near ideal-band-gap (∼1.34 eV) methylammonium-free Sn-Pb-based PSCs with high efficiency (∼20%) and promising operational stability of maintaining >80% of initial PCE over 750 h under maximum-power-point tracking. The key to this success is the use of a SnCl2⋅3FACl complex additive that improves the microstructure and reduces the development of residual stress in the Sn-Pb perovskite thin films, which in turn enhances the efficiency and stability of the Sn-Pb-based ideal-band-gap PSCs.

PEO-Chameleon as a potential protective coating on cast aluminum alloys for high-temperature applications

Hybrid dual-phase coatings composed of an A356 aluminum alloy modified by plasma electrolytic oxidation (PEO) and burnished with graphite-MoS2-Sb2O3 chameleon solid lubricant powders have been produced. The PEO layer provides high hardness and load support while the solid lubricant powders reduce friction. These hybrid coatings were tribotested against steel and silicon nitride counterparts in air from 25 °C to 300 °C and using variable contact loads. The open porosity and surface roughness of the PEO layers were reduced considerably by the burnishing process. Polishing of the PEO surfaces prior to burnishing significantly reduced the resulting coefficient of friction (COF) of the hybrid coating. In-situ Raman spectroscopy revealed the chemical stability of the dual phase coatings at temperatures up to 300 °C with no signs of oxidation or reduction of the chameleon components. COF values ranged from 0.2 at room temperature down to 0.02 at 300 °C. The observed low friction values were attributed to the synergism between PEO and chameleon layers that promote defect healing and adaptive behavior of the coating. Top view scanning electron microscopy (SEM) and cross-sectional transmission electron microscopy (TEM) confirmed that the thermo-mechanical stimulus caused the chameleon coating to fill the voids in the PEO layer. In-situ Raman spectroscopy revealed that the lubricating phases, i.e. MoS2 and graphite, were protected from oxidation by the porous PEO structure. These lubricious phases formed a transfer film in the wear tracks and the counterpart bodies as a result of the contact pressure (up to 1.4 GPa) and thermal energy, which led to an order of magnitude reduction in the COF at high temperatures. The low shear strength of MoS2 and graphite and the good adhesion and integration of the chameleon coating with the PEO sublayer due to high contact pressures during sliding were responsible for the ultra-low friction behavior of the composite coating.

Carrier Dynamics Engineering for High-Performance Electron-Transport-Layer-free Perovskite Photovoltaics

Summary Electron-transport-layer-free (ETL-free) device architectures are promising designs for perovskite photovoltaics because they offer simpler configurations, low cost, and convenience for versatile optoelectronics. However, the development of ETL-free photovoltaics is hindered by their low performance. Herein, we reveal that a low electron-injection rate at the ETL-free interface is responsible for the performance loss. Moreover, we demonstrate that improving carrier lifetimes in the perovskite films can remedy the poor carrier extraction at interfaces, enabling carrier collection efficiency in ETL-free photovoltaics to approach that in ETL-containing devices. Using perovskite films with microsecond carrier lifetimes, we obtained ETL-free devices with a power conversion efficiency (PCE) of 19.5%, nearly eliminated hysteresis, and good stability. Such a PCE value is comparable to that (20.7%) of the analogous ETL-containing photovoltaics. These results offer opportunities for ETL-free architecture designs in the perovskite photovoltaics family. More importantly, this research provides a general approach to improving the performance of photovoltaics with low-injection-rate interfaces.

Reduced-Dimensional α-CsPbX3 Perovskites for Efficient and Stable Photovoltaics

Summary Inorganic CsPbX3 perovskites have gained great attention owing to their excellent thermal stability and carrier transport properties. However, the power conversion efficiency (PCE) of solution-processed CsPbX3 perovskite solar cells is still far inferior to that of their hybrid analogues. Insufficient film thickness and undesirable phase transition are the two major obstacles limiting their device performance. Here, we show that by adopting a new precursor pair, cesium acetate (CsAc) and hydrogen lead trihalide (HPbX3), we were able to overcome the notorious solubility limitation for Cs precursors to fabricate high-quality CsPbX3 perovskite films with large film thickness (∼500 nm). We further introduced a judicious amount of phenylethylammonium iodide (PEAI) into the system to induce reduced-dimensional perovskite formation. Unprecedentedly, the resulting quasi-2D perovskites significantly suppressed undesirable phase transition and thus reduced the film's trap density. Following this approach, we reported a state-of-the-art PCE to date, 12.4%, for reduced-dimensional α-CsPbI3 perovskite photovoltaics with greatly improved performance longevity.

Electrochemical Synthesis of Bismuth Particles: Tuning Particle Shape through Substrate Type within a Narrow Potential Window.

Bismuth (Bi) electrodeposition was studied on Si/Ti/Au, FTO-, and ITO-coated glasses from acidic nitrate solutions with and without gluconate within a narrow potential window (ΔE = 80 mV). This potential range was sufficient to observe a change in particle shape, from polyhedrons (including hexagons) to dendrites, the trend being slightly different depending on substrate activity. In all cases, though, the formation of dendrites was favoured as the applied potential was made more negative. Bi particles were more uniformly distributed over the substrate when sodium gluconate was added to the electrolyte. X-ray diffraction analyses of dendrites grown at −0.28 V indicated that they exhibit the rhombohedral phase of Bi and are predominantly oriented along the (003) plane. This orientation is exacerbated at the lowest applied potential (−0.20 V vs. Ag|AgCl) on glass/ITO substrate, for which completed and truncated hexagons are observed from the top view scanning electron microscopy images.

Electroplating of Al on Si for Crystalline-Si Solar Cells

Electroplating of aluminum (Al) on silicon (Si) wafers in a room-temperature or near-room-temperature ionic liquid has been developed as an alternative to conventional metallization used to make electrodes on Si solar cells. Compared to other electroplating techniques for Al using molten salts or organic aprotic solvents, room-temperature ionic liquids are a relatively new class of compounds characterized by high electrical conductivity, extremely low vapor pressure, low viscosity, low toxicity, non-flammability, a wide electrochemical window, and being liquid in a wide range of temperatures. These properties make ionic liquids ideal solvents for the electroplating of Al [1-3].Although many metals have been used as the substrate for the electroplating of Al, no results regarding Al electroplating on Si substrates have been reported. In this work, we report the electroplating of Al on Si substrates using room-temperature AlCl3/[EMIM]Cl ionic liquids. The electroplating was performed by means of galvanostatic electrolysis and the surface morphology, composition, and crystal structure of Al deposits were characterized using scanning electron microscopy (SEM) coupled with energy dispersive X-ray analysis (EDAX) and X-ray diffractometry (XRD). In addition, the sheet resistance of Al deposits was studied to understand the effects of pre-bake conditions, deposition temperatures, and post-deposition annealing.Figure 1 shows the top-view SEM image of Al deposits obtained on a Si substrate at 40 mA and 70 ˚C for 0.5 hours. It can be seen that the as-deposited Al film is dense and homogeneous with Al crystallites on the order of 10–20 mm. As shown in the inset, the deposits only display a strong peak of Al around 1.5 KeV without any other peaks corresponding to different materials. Figure 2 shows the XRD pattern of Al deposits obtained on a Si substrate at 40 mA and 70 ˚C for 0.5 hours. Four peaks shown in the XRD pattern correspond to certain crystal orientations of Al, indicating that the composition of the deposits is pure Al metal. Figure 3 shows the sheet resistance of Al deposits with different deposition temperatures at 40 mA for 0.5 hours. It is clearly seen that the sheet resistance decreases as the deposition temperature increases. Post-deposition annealing at 350 ˚C under vacuum was also performed to further reduce the sheet resistance of Al deposits as shown in figure 4. The minimum sheet resistance obtained is ~8 milliohm/sq, corresponding to a resistivity of ~7×10–6ohm-cm. Figure captions:Figure 1. Top-view SEM of Al deposits obtained on Si substrate at 40 mA and 70 ˚C for 0.5 hours. The inset shows the corresponding EDAX analysis of the deposits.Figure 2. XRD pattern of Al deposits obtained on Si substrate at 40 mA and 70 ˚C for 0.5 hours.Figure 3. Sheet resistance of Al deposits as a function of deposition temperature at 40 mA for 0.5 hours.Figure 4. Average sheet resistances of Al deposits as a function of deposition temperature before (black curve) and after (red curve) vacuum annealing.Acknowledgment:This work was supported by the U.S. Department of Energy through the SunShot Program under grant no. DE-EE-0005322.

3D nanostructure reconstruction based on the SEM imaging principle, and applications

This paper addresses a novel 3D reconstruction method for nanostructures based on the scanning electron microscopy (SEM) imaging principle. In this method, the shape from shading (SFS) technique is employed, to analyze the gray-scale information of a single top-view SEM image which contains all the visible surface information, and finally to reconstruct the 3D surface morphology. It offers not only unobstructed observation from various angles but also the exact physical dimensions of nanostructures. A convenient and commercially available tool (NanoViewer) is developed based on this method for nanostructure analysis and characterization of properties. The reconstruction result coincides well with the SEM nanostructure image and is verified in different ways. With the extracted structure information, subsequent research of the nanostructure can be carried out, such as roughness analysis, optimizing properties by structure improvement and performance simulation with a reconstruction model. Efficient, practical and non-destructive, the method will become a powerful tool for nanostructure surface observation and characterization.

Thermal Modification of Nanoscale Mask Openings in Polystyrene Sphere Layers

ABSTRACTAn experimental analysis of the morphology changes of hexagonally close packed polystyrene sphere monolayers induced by annealing in air is presented. The triangular interstices between each triple of spheres, which are frequently used as nanoscale mask openings in colloidal lithography, are observed to gradually shrink in size and change in shape upon annealing. Top view scanning electron microscopy images reveal that different stages are involved in the closure of monolayer interstices at annealing temperatures in the range between 110°C and 120°C. In the early stages shrinkage of the triangular interstices is dominated by material transport to and thus shortening of their corners, in the late stages interstice area reduction via displacement of the triangle edges becomes significant. At intermediate annealing times the rate of interstice area reduction displays a maximum before a stabilized state characterized by a rounded isosceles triangular shape forms.

Synthesis and Characterization of CuO Nanorods by Hydrothermal Method

This paper reports the synthesis of CuO nanorods from Copper (II) sulphate (CuSO4) aqueous solution under the hydrothermal condition variable concentration of NaOH (aq) at 160 °C for 12 h. The thin films of the nanorods on glass were prepared by dip-coating technique. The structure and chemical natures of the obtained materials were studied using powder X-ray diffraction (XRD), Scanning Electron Microscopy (SEM). The optical properties of the nanorods were also studied by UV-visible spectra. The diffraction peaks were quite identical to those of pure CuO, which can be indexed as the monoclinic structure CuO. The diameters of CuO nanorods vary from 10 nm to 100 nm and the length is about several micrometers. The top-view SEM images be seen clearly that high-density, horizontally scattered nanorod were grown on the product prepared at concentration of NaOH (aq) 10 M at 160 °C for 12 h. The spectral of UV-vis data showed the strong cut off at 336 nm.

Gold nanoisland arrays by repeated deposition and post-deposition annealing for surface-enhanced Raman spectroscopy

Gold nanoisland arrays with well controlled growth were achieved by repeated sputtering deposition and post-deposition annealing processes. When each deposition was set at 5 nm (nominal thickness based on gold mass), the single deposition and annealing process (single process) yielded gold nanoisland arrays with an average diameter of ∼16 nm based on top view scanning electron microscopy (SEM). When the deposition and annealing process was repeated two more times (triple process), top view SEM showed the nanoisland arrays grew to ∼38 nm in average diameter. The surface-enhanced Raman spectroscopy (SERS) measurement indicated that triple processed nanoisland arrays led to the highest SERS enhancement, suggesting the necessity of pursuing nanoislands with larger sizes. The gold nanoisland arrays after the triple process were further sputtered with a final layer of gold thin film at different nominal thicknesses. An optimal nominal thickness for SERS was determined experimentally at ∼40 nm, as a result of the competition between the positive and negative effects of the final gold deposition. Last, the uniformity of the optimized SERS substrate was investigated on a 5 cm × 5 cm platform. SERS measurements demonstrated a relative standard deviation of ∼7% in terms of spectral variation over the entire substrate, rendering the process in the present study a promising fabrication approach for large-scale production of SERS substrates.

Fabrication of Cu3Zn3Se ternary compounds by AP-MOCVD

I–II–VI Ternary chalcopyrite semiconductors of Cu1−xZn1−ySe2−δ (Cu3Zn3Se) were successfully fabricated by the atmospheric pressure metal-organic chemical vapor deposition method for the first time. Four major peaks of (112), (220)/(204), (312)/(116), and (400), accompanied by three minor peaks of (103), (211) and (301) were observable in the X-ray diffraction spectra. In particular, the presence of those latter low-intensity peaks featured the formation of the chalcopyrite type Cu3Zn3Se compound. Typical absorption coefficients of the films produced were found to vary from 2.75×104cm−1 to 5.75×104cm−1 over all visible light range and from the same optical absorption spectra the energy gap of the material was extracted to be about 2.02eV. Moreover, the photoluminescence measurement conducted at room temperature also exhibited a strong orange-colored emission line at 1.94eV, which further confirmed that the Cu3Zn3Se ternary compound has been prepared. In addition, the cross-sectional and top-view scanning electron microscopy images characterized the fabricated Cu3Zn3Se compound as a polycrystalline film of thickness about 1–1.3μm and consisting of 1–2.5μm sized grains.