Top-gate Oxide Thin-film Transistors Research Articles

Organic/Inorganic Hybrid Top-Gate Transistors with Ultrahigh Electron Mobility via Enhanced Electron Pathways

The top-gate structure is currently adopted in various flat-panel displays because of its diverse advantages such as passivation from the external environment and process compatibility with industries. However, the mobility of the currently commercialized top-gate oxide thin-film transistors (TFTs) is insufficient to drive ultrahigh-resolution displays. Accordingly, this work suggests metal-capped Zn-Ba-Sn-O transistors with top-gate structures for inducing mobility-enhancing effects. The fabricated top-gate device contains para-xylylene (PPx), which is deposited by a low-temperature chemical vapor deposition (CVD) process, as a dielectric layer and exhibits excellent interfacial and dielectric properties. A technology computer-aided design (TCAD) device simulation reveals that the mobility enhancement in the Al-capped (Zn,Ba)SnO3 (ZBTO) TFT is attributed not only to the increase in the electron concentration, which is induced by band engineering due to the Al work function but also to the increased electron velocity due to the redistribution of the lateral electric field. As a result, the mobility of the Al-capped top-gate ZBTO device is 5 times higher (∼110 cm2/Vs) than that of the reference device. These results demonstrate the applicability of top-gate oxide TFTs with ultrahigh mobility in a wide range of applications, such as for high-resolution, large-area, and flexible displays.

Interfacial Oxidized Gate Insulators for Low-Power Oxide Thin-Film Transistors

Low power consumption is essential for wearable and internet-of-things applications. An effective way of reducing power consumption is to reduce the operation voltage using a very thin and high-dielectric gate insulator. In an oxide thin-film transistor (TFT), the channel layer is an oxide material in which oxygen reacts with metal to form a thin insulator layer. The interfacial oxidation between the gate metal and In–Ga–Zn oxide (IGZO) was investigated with Al, Ti, and Mo. Positive bias was applied to the gate metal for enhanced oxygen diffusion since the migration of oxygen is an important factor in interfacial oxidation. Through interfacial oxidation, a top-gate oxide TFT was developed with low source–drain voltages below 0.5 V and a gate voltage swing less than 1 V, which provide low power consumption.

Development of oxide thin-film transistor using all spin-on-glass insulators with addition of hydrogen peroxide: Buffer, gate insulator, and interlayer dielectric

A top-gate oxide thin-film transistor (TFT) with all spin-on-glass (SOG) insulators was developed. The SOG is based on methyl siloxane and was used for the buffer layer, gate insulator, and interlayer dielectric instead of a vacuum process. The SOG was diluted with ethanol, and a small amount of hydrogen peroxide was added. The diluted SOG was applied to top-gate amorphous indium–gallium–zinc-oxide TFTs, and the effects of the dilution and the hydrogen peroxide added were investigated. The TFTs with the optimized SOG insulators showed a mobility of 7.1 cm2/(V·s), a threshold voltage of 0.5 V, a subthreshold slope of 0.1 V/dec, and an on/off current ratio of 3.6 × 107.

Effect of Al concentration on Al-doped ZnO channels fabricated by atomic-layer deposition for top-gate oxide thin-film transistor applications

Al-doped ZnO (AZO) thin films were prepared by atomic layer deposition, in order to optimize their characteristics as active channel materials for oxide thin-film transistors (TFTs). The crystalline phases of the AZO films deposited at 100 °C appeared as mainly (100) planes, and their surface morphologies were homogeneous and smooth. The electrical conductivities of AZO films with varying Al concentrations were measured in-situ with a temperature sweep from 50 to 250 °C. From the conductivities, the activation energies for the carrier transport of each composition were calculated at some specified temperature ranges. A critical value of incorporated Al increased electrical conductivity by means of the donor doping effect: beyond that value, additional Al was found to act as a typical carrier suppressor. Top-gate-structured AZO TFTs were fabricated and characterized. The maximum field-effect mobility at the saturation region was found to be 0.64 cm2 V−1 s−1 when 1-at. %-Al was incorporated into the ZnO channel. Mobility showed a decreasing trend with increasing Al concentration. Negative and positive bias-stress (NBS and PBS) stabilities of the AZO-TFTs were also evaluated. The threshold voltage shifts during the NBS and PBS for 104 s were as low as −1.8 and −0.9 V, respectively. Raising the Al concentration increased the NBS instabilities, whereas the PBS stabilities were improved by higher Al concentrations.

Self-Aligned Top-Gate Oxide Thin-Film Transistor Formed by Aluminum Reaction Method

Self-Aligned Top-Gate Oxide Thin-Film Transistor Formed by Aluminum Reaction Method

Self-Aligned Top-Gate Oxide Thin-Film Transistor Formed by Aluminum Reaction Method

We developed a novel highly reliable self-aligned top-gate oxide semiconductor thin-film transistor (TFT) formed by the aluminum (Al) reaction method. In this method, Al diffusion into the oxide semiconductor was observed. The low sheet resistivity of the source/drain regions was attributed to Al working as a donor in the oxide semiconductor. The TFTs with 4 µm channel length exhibited a field-effect mobility of 9.8 cm2 V-1 s-1, a threshold voltage of -1.5 V, and a subthreshold swing of 0.22 V/decade. Highly reliable TFTs were obtained after 300 °C annealing without increasing the sheet resistivity of source/drain regions.

Electrical properties of top-gate oxide thin-film transistors with double-channel layers

Using ZnO, and three compositional In 2O 3-Ga 2O 3-ZnO (IGZO, In:Ga:Zn=1:1:1, 2:1:2, 2:2:1, atomic ratio) semiconductors, we have made and evaluated several double layered oxide thin-film transistors (TFTs). The drain current was mainly affected by the nearer channel material to a gate insulator. From the positive bias stress (PBS) tests, however, the electrical stability showed a complicated result, depending on both channel structures and post-heat treatments.