Grain boundaries play an important role in determining the electrical, mechanical, and optical properties of polycrystalline thin films. A side-disubstituted counterpart of pentacene, 6,13 bis(tri-isopropylsilylethynyl) (TIPS) pentacene, has lateral π-π packing and reasonably high solubility in a number of organic solvents. In this paper, the effects of grain boundaries on the effective hole mobility, on/off ratio, threshold voltage, and hysteresis of transistor transfer characteristics were investigated in solution-processed TIPS pentacene thin film transistors with both experiments and simulations. The effects of solvent type, concentration, substrate temperature, and evaporation rate were investigated by optical, electron, and atomic force microscopies. An apparatus for controlled solution casting was designed, fabricated, and used to make TIPS pentacene thin film transistors with more precisely controlled variations in microstructure and defect densities. First, hysteresis in the electrical characteristics was found to correlate directly with grain width WG (the crystal dimension along [12¯0]) in active layers. In addition, since TIPS pentacene crystals with larger grain width (WG>6 μm) generally took a long needle shape and the ones with smaller domain sizes (WG<4 μm) had a more equiaxed geometry, a sharp enhancement in the effective mobility was observed in the larger grains. In devices with active layers cast from toluene solution, the measured field-effect hole mobility for grain width WG smaller than 4 μm was generally ≤0.01 cm2/V s, whereas mobility for films with grain width WG>6 μm was typically 0.1∼1 cm2/V s. A model of boundary-limited transport was developed and used to explain experimental data. Based on the proposed model and an energy barrier (EB) on the order of 100 meV for electrical transport across grain boundary, the effective grain-boundary mobility μGBo was estimated to be approximately 5×10−7 cm2/V s.