Time Division Multiplexing Technique Research Articles

Design Philosophy and Hardware Implementation for Digital Subscriber Loops

This paper presents various requirements and configurations in the information network system (INS) NTT's version of the integrated services digital network (ISDN)- such as field trials, and technologies and equipment design of the digital subscriber loop using balanced wire pairs. The main aspects characterizing digital subscriber loops, are a customer access structure, a digital transmission system on existing subscriber loops, and customer interface. A configuration of two-wire digital subscriber loops with two customer access channels, which is adopted in the field trials, will be described. The time-shared two-wire digital transmission and power feeding methods on subscriber loops are discussed. The common mode rejection ratio (CMRR) is discussed in detail, since CMRR is one of the main factors which affects the transmission ability of balanced wire pairs. A proposed self-clocked four-wire customer interface utilizes time division multiplexing technique. The digital subscriber loop operates on a call-by-call basis for link establishment to avoid excessive power dissipations as well as to avoid impairments caused by crosstalk from other lines within a cable. Its design objectives and implementation are also discussed.

Statistical multiplexing in data networks

Common carriers throughout the world are finding it difficult to satisfy current needs for rapid data transfer over telephone lines. Both the carrier and the user want quick, reliable and cheap data transmission. Thus, the maximization of line utilization is essential and this is why the multiplexing of signals from several sources into a single datastream for transfer over one line is becoming popular. The paper describes statistical time division multiplexing techniques and explains the operation of statistical multiplexers. Typical STDM installations are examined, including interfacing statistical multiplexers with other equipment and operation under adverse conditions. The development of switching multiplexes is discussed and the cost benefits of STDM compared with leased-line communication are estimated.

A Digital Telephone with Extensions

A digital telephone concept is described where each subscriber set sends and receives digital signals (8-bit PCM). Duplex, simultaneous operation of extensions on a single pair of wires is made possible by time division multiplex (TDM) techniques. A successful feasibility demonstrator of the concept that operates at 512 kbits/s is also described. It has a digital switch at one end and digital telephones at the other, with up to three extensions talking at one time. The telephones feature a separate digital signaling channel, automatic loop-back testing, and low-power transducers.

Notes on the Implementation of MUSBOX: A Compiler for the Systems Concepts Digital Synthesizer

In 1978 the Center for Computer Research in Music and Acoustics (CCRMA) at Stanford University acquired a remarkable musical instrument: the prototype of the Systems Concepts Digital Synthesizer (SCS) designed and built by Peter Samson of Systems Concepts, San Francisco, to the specifications of CCRMA. The principal purpose of the synthesizer design was to address the high computational bandwidth required for real-time high-quality digital audio signal processing. It is well known that digital synthesis techniques have been limited by the sheer speed, precision, and consequent volume of computation required for useful and interesting results. It was hoped that a special-purpose digital computer that directly addressed the nature of the data to be manipulated would be sufficiently fast to do useful amounts of signal computation in real time. The resulting design is described elsewhere in the literature (Loy 1980; Samson 1980; Samson forthcoming), but a brief review is not out of place here. The synthesizer uses standard TTL logic, relying extensively on time-division multiplexing and pipelining techniques to implement a fixed set of processing capabilities. The synthesizer is divided into modules, called processing elements, which can be configured to perform specific signal processing functions. There are four classes of processing elements, each class being uniquely suited to one kind of processing (Fig. 1). They are generators, which produce a variety of periodic fixedwaveform signals; modifiers, which modify signals; sum memory, which provides a means of intercommunication between the individual generators and modifiers; and delay units, which interface the modifiers to a large memory bank (up to 64K 20-bit words) for reverberation and table storage. There are 256 generators, 128 modifiers, 256 sum memory locations, and 32 delay units; not all sum memory locations can be written by all processing elements, however. All of these processing elements can run simultaneously. Each generator is divided functionally into an oscillator part and an envelope part. The oscillator part produces normalized square, sawtooth, pulse train, sin(x), sin(x+FM), and sum-of-cosines waveforms. The oscillator parameters that can be controlled include frequency (28 bits), frequency sweep (20), phase angle (20), number of cosines to be summed (if any), and a sum memory address from which frequency modulation (FM) data are taken. The envelope part can produce a constant (12), plus either a linear ramp (24) or a positive or negative exponential function to control the amplitude of the oscillator, with an overall precision of 20 bits. A final 12-by-13-bit two-quadrant multiply scales the oscillator product by the amplitude product, and the result is written to a specified 20-bit-wide sum memory location. In addition, the generators have degenerate modes in which they perform other nec? 1981 by D. Gareth Loy

Interlacing properties of shift-register sequences with generator polynomials irreducible over<tex>GF(p)</tex>(Corresp.)

Interlacing properties of shift-register sequences with generator polynomials irreducible over GF (p) -herein called elementary sequences--are analyzed. The most important elementary sequences are maximal-length sequences ( m -sequences). If the period q of an elementary sequence is not prime, the sequence can always be constructed by interlacing shorter elementary sequences of period q_{i} , provided q_{i} divides q . It is proved that all interlaced elementary sequences are generated by one and the same irreducible polynomial. Some relationships between equal-length elementary sequences are derived, including some rather unexpected crosscorrelation properties. As an example of an application of the theory, a new time-division multiplex technique for generating high-speed m -sequences is presented.

An Easily Implementable Network Analyzer

A simple network analyzer is devised which makes use of the sampling and time-division multiplexing techniques to detect a signal in a phasor form. Composed of a binary 90° phase shifter and a coherent detector, the detection system involved allows the real and imaginary parts of a scattering parameter to be detected sequentially. The performance of a prototype analyzer supports the detection principle. The error analysis is also given to specify the operation of a binary 90° phase shifter needed for the analyzer to assure a prescribed measurement accuracy.

Automatic Interferometer with Digital Readout for Refractometric Analysis

The paper describes an interference refractometer for liquids and gases which operates automatically and reads out in digital or analog form. A compensating technique using white light is used for measurement. Zero adjustment is achieved by rotating the compensator and capturing the zero-order white light fringe by photoelectric means. Measurement of the path difference compensated by the compensator is based on electronic interpolation and counting of interference fringes by optointerferometric means, a time division multiplex technique with pulse amplitude modulation being used to obtain the electrical fringe signals.

Impulse analysis and common control in an electronic telephone switching system

This paper discusses the conversion of telephone-line supervision signals into digital logic signals, and the subsequent storage and control of the dialed information, in a telephone switching system using time-division multiplex techniques. Emphasis is on the analyzed-signal timing tolerances and minimization of the logic control functions of the register. Reuse of storage elements for multiple functions on a time discrimination basis and the elimination of logic stages to reduce series delay are also discussed.

An Experimental Automatic Communication System for Air Traffic Control

The Experimental Automatic Ground/Air/Ground Communication System (AGACS) under development for the Bureau of Research and Development, Federal Aviation Agency, will provide a two-way traffic control data link permitting automatic mechanized communication for essential routine flight information between the air and ground environments. The system selected is operable in both VHF and UHF aircraft communication bands and permits choice of FSK-carrier or FSK-AM modulation. Up to 500 aircraft may be interrogated and reply on a single channel in a time period of two minutes or less. Information is binary coded and transmitted by time-division multiplex techniques at a data rate of 750 bits per second.