Threshold Logic Elements Research Articles

Hall effect in adaptive threshold logic

Application of Hall effect to implement the adaptive threshold logic element is described. The adaptive weight unit described has a memory and a non-destructive read-out. The device consists of a Hall element inserted in an air-gap of a square-loop magnetic torroidal core. The generated Hall voltage represents the present effective weight. The memory is provided by the remanent flux in the core. The device described is essentially a multi-level memory cell with the direct electrical read-out.

A trainable nonlinear function generator

Trainable threshold logic elements have been used in the adaptive pattern recognition field to design linear classifiers for patterns of binary variables. This paper shows how one of these trainable linear devices can be used to implement a trainable non-linear function generator. A trainable function generator is similar in function to the spatial function generators found in analog computers except that the coefficients of its function are set in an iterative "training" procedure instead of being predetermined in the design stage. The primary application of the trainable function generator, to date, has been in the real-time design of nonlinear pattern classification devices, therefore, the use of the trainable function generator as a nonlinear discriminant function in pattern classification is emphasized. It is demonstrated that in the implementation of the trainable function generator it is highly advantageous to use what has been defined as a linearly independent code to represent the analog pattern parameters as binary patterns for the threshold element. When a linearly independent code is used, a linear threshold element in a trainable function generator can be used to "learn" nonlinear discriminant functions just as it is used to learn linear discriminant functions.

Compound Synthesis of Threshold-Logic Network for the Realization of General Boolean Functions

This paper deals with the problem of compound synthesis of threshold-logic network, or of realizing a general Boolean function with a number of threshold-logic elements. Some basic theorems concerning the expression of a general Boolean function as a combination of a number of threshold functions are presented. The general structure of a network of m threshold-logic elements is analyzed in light of the basic theorems and properties of threshold functions. The properties of isobaric threshold functions are discussed and are utilized for compound synthesis. Methods for decomposing a function into a sum or product of unate functions and into a sum or product of threshold functions are developed. A synthesis procedure conforming with the general structure of a network of threshold-logic elements is given. A simplified synthesis procedure, which needs less cut and trial than the original procedure and is, therefore, more practical, is also presented. Some special situations are discussed. Examples are worked out to show the decomposition of functions, and to illustrate the synthesis method.

Synthesis of Minimal Threshold Logic Networks

An algorithm is developed for synthesizing networks which realize Boolean switching functions through the use of a minimum number of threshold logic elements. A switching function is represented by a matrix and the algorithm is based on the principle that the removal of the positive linear dependences from the rows of this matrix results in a linearly separable function. The positive linear dependences are removed by adding columns to the matrix, each column representing the output of a threshold logic element in the network. The added columns in effect transform a nonseparable function into a sparable function a higher dimensional space. The algorithm is illustrated with examples of the synthesis of both single and multiple output networks. The technique is not restricted to completely specified functions.

Threshold Logic Elements Used as a Probability Transformer

article Free AccessThreshold Logic Elements Used as a Probability Transformer Author: C. L. Sheng University of Ottawa, Ottawa, Canada University of Ottawa, Ottawa, CanadaView Profile Authors Info & Claims Journal of the ACMVolume 12Issue 2April 1965 pp 262–276https://doi.org/10.1145/321264.321278Published:01 April 1965Publication History 10citation357DownloadsMetricsTotal Citations10Total Downloads357Last 12 Months22Last 6 weeks3 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

A Graphical Interpretation of Realization of Symmetric Boolean Functions with Threshold Logic Elements

A graphical interpretation of the realization of symmetric Boolean functions with threshold logic elements is presented, from which a systematic synthesis method is developed. Theoretically, symmetric functions of any number of variables can be realized. Examples are given to show that, practically, there is no difficulty at all in realizing symmetric Boolean functions of as many as thirty or forty variables. Some theorems related to graphical interpretation and realization are presented, and the lower and upper bounds of the number of threshold logic elements required for the realization of symmetric functions are also derived from the graphical point of view.

Computer Group of The Institute of Electrical and Electronics Engineers, Inc.

A graphical interpretation of the realization of symmetric Boolean functions with threshold logic elements is presented, from which a systematic synthesis method is developed. Theoretically, symmetric functions of any number of variables can be realized. Examples are given to show that, practically, there is no difficulty at all in realizing symmetric Boolean functions of as many as thirty or forty variables. Some theorems related to graphical interpretation and realization are presented, and the lower and upper bounds of the number of threshold logic elements required for the realization of symmetric functions are also derived from the graphical point of view.

Real-Time Adaptive Speech-Recognition System

This paper describes a real-time speech-recognition system employing adaptive threshold logic elements called “Adalines.” Time-normalized digital patterns representing the time-frequency spectrum are obtained from amplitude-normalized outputs of 8 bandpass filters. Adaline networks that perform the speech-pattern classification are simulated in an IBM-1620 computer. In a recent experiment, the Adalines were trained on 8 samples each of a group of 16 phonetically balanced words. After correct classification of these samples, different samples, spoken by the same speaker, were correctly identified 112 times without error. When tested on new voices of the same sex, the machine achieved an average recognition rate of 90%; however, substantial improvement is realized by including the new speaker(s) in the training group. The use of adaptive networks as pattern classifiers has achieved enormous system flexibility, since complete redesign of the classification system can be accomplished by a training process. The system has successfully carried out many speech-recognition tasks, among them recognition of the 10 digits spoken in 4 different languages and identification of different speakers saying the same spoken words.