Three-level Neutral Point Clamped Research Articles

Improved Temperature Monitoring and Protection Method of Three-Level NPC Application Based on Half-Bridge IGBT Modules

The overheating stress of power devices is the main cause of converter system failures, so real-time temperature acquisition, as well as timely over-temperature protection, under various operating conditions are key to achieving a more reliable energy conversion. In this paper, an improved three-dimensional (3-D) coupled thermal model for insulated gate bipolar transistors (IGBTs) and related heatsink is constructed by considering the thermal coupling effects at both the device- and the module level. Furthermore, the coupled thermal impedance parameters are thereby extracted based on the finite-element method (FEM), so that the dynamic loss and transient temperature distribution under actual working conditions can be obtained based on this electro-thermal coupling model. Meanwhile, to avoid the overheating damage of power devices due to untimely action of the negative temperature coefficient (NTC) thermistor over-temperature protection, this article aims at the idle IGBT device in the three-level neutral-point clamped (NPC) application using IGBT half-bridge modules, combined with the emitter terminal temperature, and finally realizes the multiple over-temperature protection settings. The improved temperature monitoring methods proposed in this paper are realized by the drive and control circuits and verified through simulation and experimental results.

Nonlinear control of grid-connected PV systems using active power filter with three-phase three-level NPC inverter

Grid-connected photovoltaic (PV) systems have become a significant area of interest for research scientists. Given this, this article presents a nonlinear control of grid-connected PV systems using active power filter (APF) with three-phase three-level neutral point clamped (NPC) inverter. The control objectives involve: (1) Forcing the PV output voltage to track a reference signal provided by the MPPT block in order to produce their maximum power, (2) Regulating the DC link voltage to satisfy a correct operation mode of the three-phase active power filter, and (3) Satisfying power factor correction (PFC) objective at the point of common coupling, PCC. Therefore, the suggested control strategy includes a cascade structure of two loops. The inner-loop regulator is designed using the sliding mode control technique and Lyapunov approaches to ensure the PFC objective by forcing the grid current to follow a given reference signal. The Outer-loop consists mainly of a proportional-integral (PI) regulator so that to regulate the output voltage. Further, the theory of instantaneous real power is used to calculate reference harmonics. The effectiveness of the proposed controller is demonstrated through simulation results using MATLAB/Simulink.

Fast Reliability Assessment of Neutral-Point-Clamped Topologies Through Markov Models

This article presents detailed Markov models for the reliability assessment of multilevel neutral-point-clamped (NPC) converter leg topologies, incorporating their inherent fault-tolerance under open-circuit switch faults. The Markov models are generated and discussed in detail for the three-level and four-level active NPC (ANPC) cases, while the presented methodology can be applied to easily generate the models for a higher number of levels and other topology variants. In addition, this article also proposes an extremely fast calculation method to obtain the precise value of the system's mean time to failure from any given formulated system Markov model. This method is then applied to quantitatively compare the reliability of two-level, three-level, and four-level ANPC legs under switch open-circuit-guaranteed faults and varying degrees of device paralleling. The comparison reveals that multilevel ANPC leg topologies inherently present a potential for higher reliability than the conventional two-level leg, questioning the suitability of the traditional search for topologies with the minimum number of devices in order to improve reliability. Experimental results are presented to validate the fault-tolerance assumptions upon which the presented reliability models for the three-level and four-level ANPC legs are based. This article is accompanied by supplementary MATLAB scripts.

Model Predictive Current Control Based on Virtual Voltage Vector Method for Parallel Three-Level Inverters

The parallel three-level neutral-point clamp (3L-NPC) inverters are widely solicited today to satisfy the higher power demand by using low-rated switching devices in industrial applications such as renewable power generation. With the 3L-NPC in parallel, the zero-sequence circulating current (ZSCC) occurs in the closed circuit and decreases the performances of the current response if the two 3L-NPCs share the same dc bus with no galvanic isolation at the ac side. From the analysis of the ZSCC equivalent circuit, the virtual voltage vectors are proposed and exploited by the finite control set model predictive control (FCS-MPC) for mitigating the ZSCC and improving the current accuracy. In order to keep the neutral-point balance and reduce the switching loss, the differential capacitor voltage and the average switching frequency are considered in the proposed MPC. An experimental platform based on the Simulink-Real-Time system is presented for further verification of the effectiveness of the proposed method. The simulation and the experimental results obtained under the proposed strategy show that the ZSCC is reduced to near zero, and the current response provided has lower THD.

Independent Upper- and Lower-Arm Switching Scheme Based on Reference Current Polarity for Three-Level NPC Inverters

This study presents a novel switching scheme for three-level neutral point clamped (NPC) inverters. The proposed switching method independently drives the upper- and lower-arm elements of the inverter based on the polarity information of the reference current. The proposed switching scheme does not require the inclusion of dead-time for each switching, except when the current polarity changes. Therefore, unlike the conventional inverter switching method, dead-time compensation is not needed, and the possibility of an arm-short accident is prevented. In this study, a switching procedure is detailed, and the operation mode analysis of the proposed switching scheme is presented. The effectiveness of the proposed switching method is verified experimentally by application to a grid-connected inverter that requires inverter current control.

The new approach minimizes harmonics in a single-phase three-level NPC 400 Hz converter for airplanes

<span lang="EN-US">This paper provides a new approach to reducing high-order harmonics in 400 Hz inverter using a three-level neutral-point clamped (NPC) converter. A voltage control loop using the harmonic compensation combined with NPC clamping diode control technology. The capacitor voltage imbalance also causes harmonics in the output voltage. For 400 Hz inverter, maintain a balanced voltage between the two input (direct current) (DC) capacitors is difficult because the pulse width modulation (PWM) modulation frequency ratio is low compared to the frequency of the output voltage. A method of determining the current flowing into the capacitor to control the voltage on the two balanced capacitors to ensure fast response reversal is also given in this paper. The combination of a high-harmonic resonator controller and a neutral-point voltage controller working together on the 400 Hz NPC inverter structure is given in this paper.</span>

Improved Neutral-Point Voltage Balancing Control With Time Delay Compensation and Antiwindup Loop for a Three-Level NPC Inverter

This article proposes an improved neutral-point voltage balancing control (NPVBC) with time delay compensation and an antiwindup loop based on a dynamic change limit for a three-level neutral-point clamped (NPC) voltage-source inverter. NPVBC is essential for a three-level NPC inverter since it has a separate dc link. In an NPVBC based on the carrier-based pulsewidth modulation (CBPWM), the neutral-point (NP) voltage is regulated by synthesizing the NP current. The conventional NP voltage balancing controller is designed as a proportional-integral controller; however, time delays due to the digital control and pulsewidth modulation, and antiwindup loop were not considered despite the fact that digital control delay disturbs the accurate synthesis of NP current and the windup phenomenon may appear on the regulator since synthesizable NP current range can be limited by operating condition. To solve these problems, this article proposes improvement methods for NPVBC with digital delay compensation and an antiwindup loop based on CBPWM. Analysis on the effect of digital delay is described, and the time delays compensation method is proposed. Furthermore, an NP voltage balancing controller with an antiwindup loop is proposed along with an analysis of the synthesizable NP current range. With the proposed method, NP voltage ripples can be reduced, and control stability of the NPVBC can be greatly improved by preventing the windup phenomenon that may occur when the inverter output is insufficient. To verify the proposed methods, simulations and experiments, including elevator tower test, were conducted, and the results verify the effectiveness of the proposed methods.

An Optimal Control Algorithm with Reduced DC-Bus Current Fluctuation for Multiple Charging Modes of Electric Vehicle Charging Station

This paper presents a systematic structure and a control strategy for the electric vehicle charging station. The system uses a three-phase three-level neutral point clamped (NPC) rectifier to drive multiple three-phase three-level NPC converters to provide electric energy for electric vehicles. This topology can realize the single-phase AC mode, three-phase AC mode, and DC mode by adding some switches to meet different charging requirements. In the case of multiple electric vehicles charging simultaneously, a system optimization control algorithm is adopted to minimize DC-bus current fluctuation by analyzing and reconstructing the DC-bus current in various charging modes. This algorithm uses the genetic algorithm (ga) as the core of computing and reduces the number of change parameter variables within a limited range. The DC-bus current fluctuation is still minimal. The charging station system structure and the proposed system-level optimization control algorithm can improve the DC-side current stability through model calculation and simulation verification.

Model-Free Predictive Current Control for Three-Level Inverter-Fed IPMSM With an Improved Current Difference Updating Technique

Parameter mismatches in conventional model predictive current control (MPCC) would worsen torque and THD performance. To eliminate the parameter dependence of MPCC, this letter proposes a model-free predictive current control (MFPCC) for a three-level inverter-fed interior permanent magnet synchronous motor (IPMSM). Firstly, to increase the current difference updating frequency in the diode neutral-point-clamped (NPC) three-level inverter, a synchronous updating method is proposed in a manner where the number of updated current differences during one sampling period is increased up to 6. Secondly, for the sake of computational burden alleviation, a candidate vector selection algorithm is introduced in such a way that the number of candidate vectors is reduced to only 7–9. Then, the problem of neutral-point voltage fluctuation which is inherent to the three-level NPC inverter is investigated, and a reasonable replacement method incorporating the redundancy characteristic of small vectors is developed. Finally, experimental results verify that the system robustness against mismatched parameters can be greatly enhanced by use of the proposed control scheme; meanwhile, steady-state performance and dynamic-state response of the system can be improved to some extent as well.

Control parameters optimization of three-level neutral-point clamp rectifier for EAST low-frequency resonance suppressor

The low-frequency resonance suppressor effectively reduce the low-order harmonics and resonance amplification generated by the EAST poloidal field power system during the operation. This article takes the control parameters of the three-level neutral-point clamp rectifier in the low-frequency resonance suppression device as the research object to reduce the steady-state delay of the system and to ensure the stability of the DC side voltage balance. The system model of the three-level midpoint clamp rectifier in dq rotating coordinate system is constructed to study the effect of various control parameters on the stability of the rectifier system. Furthermore, combined with variation regularity of system eigenvalue, the control parameters of the rectifier are optimized, and the anti-interference ability, dynamic performance and robustness of rectifier system are improved. Finally, the correctness and effectiveness of the control parameters optimization are verified through RT-LAB simulation.

Accuracy Improvement of Stator Inductance Identification Method Based on Low-Frequency Current Injection for Three-Level NPC Inverter-Fed IM Drives in Locked-Rotor Standstill Condition

In this paper, a stator inductance identification process is proposed. The process is based on a three-level neutral-point-clamped (NPC) inverter-fed induction motor (IM) drive with a standstill condition. Previously, a low-speed alternating current (AC) injection test for stator inductance identification was proposed to overcome practical problems in conventional identification methods for three-level NPC inverter-based IM drives. However, the low-speed AC injection test-based identification method has some problems if a heavy load or mechanical brake is connected, as these can forcibly bring the rotor to a standstill during parameter identification. Since this low-speed testing-based identification assumes the motor torque is considerably lower in low-speed operations, some inaccuracy is inevitable in this kind of standstill condition. In this paper, the proposed current injection speed generator is based on the previously studied low-speed test-based stator inductance identification method, but the proposed approach gives more accurate estimates under the aforementioned standstill conditions. The proposed method regulates the speed for sinusoidal low-frequency AC injection on the basis of the instantaneous reactive and air-gap active power ratio. This proposed stator inductance identification method is more accurate than conventional fixed low-frequency AC signal injection identification method for three-level NPC inverter-fed IM drive systems with a locked-rotor standstill condition. The proposed method’s accuracy and reliability were verified by simulation and experiment using an 18.5 kW induction motor.

Grid-Tied Neutral Point Clamped based Centralised Photovoltaic Inverter with Improved DC Link Voltage Balancing and Harmonic Minimisation Control

Abstract This paper proposes an improved space vector pulse width modulation (SVPWM) based DC link voltage balancing control of a three-phase three-level neutral point clamped (NPC) centralised inverter supplying the generated power from photo voltaic (PV) array to a three-phase utility grid. Two possible schemes have been developed based on the power conversion stage between PV array and the utility grid namely, two-stage (three-level boost converter three-phase three-level NPC inverter) and single-stage (three-phase three-level NPC inverter alone). The comparison between these two schemes has been thoroughly discussed in terms of the control strategies employed, power loss analysis and efficiency. The performance of the centralised inverter under different modes of operation has been investigated by developing the required control strategies for smooth operation. Using the proposed control strategy, the centralised inverter can be operated as a static synchronous compensator (STATCOM) during night time, if needed. The power loss incurred in the power-electronic converters has been analysed for constant and also for variable ambient temperature. The effectiveness of the centralised inverter as an active filter (AF) has also been verified when a three-phase non-linear load is considered in the system.

Improved NPC Inverters without Short-Circuit and Dead-time Issues

The traditional neutral point clamped (NPC) inverter has short-circuit problem. The risk of short-circuit can be decreased by using dead-time in the switching signals. However, the dead-time decreases the achievable output voltage and causes distortion in the waveforms. To overcome the short-circuit problem, dual-buck NPC (DB-NPC) and split-inductor NPC (SI-NPC) inverters have been researched. However, the voltage stress of the two external diodes in the DB-NPC inverter is higher. On the other hand, the SI-NPC inverter has a problem of generating huge voltage spikes in the dead-time, which can destroy the semiconductor devices. In addition, the SI-NPC inverter cannot provide reactive power. This article presents a family of NPC inverters consisting of single-phase, three-phase, and cascaded inverters. The proposed inverters have no short-circuit and dead-time issues, therefore no high voltage and current spikes are caused. Also, the dead-time in the switching signals can be minimized. As a result, the magnitude of the output waveforms can be increased, and quality can be improved. Unlike the DB-NPC inverter, the voltage stress of all the semiconductor in the proposed inverter is lower, and unlike the SI-NPC inverter the proposed inverter provides reactive power. In this article, the proposed three-level NPC inverter is analyzed, designed, and tested. The voltage stress of the semiconductor devices in the proposed inverter is half of the source voltage, whereas in the conventional DB-NPC inverter the voltage stress of the two external diodes is the source voltage. In addition to the aforementioned benefits, the proposed cascaded inverter reduces the total number of inductors. To verify the analysis, detailed simulation, and experimental results of the proposed three-level inverter with input voltage 640 V, output power 1.2 kW, and output voltage 220 Vrms are provided.

A Novel Zero Dead-Time PWM Method to Improve the Current Distortion of a Three-Level NPC Inverter

This paper proposes a novel pulse width modulation (PWM) for a three-level neutral point clamped (NPC) voltage source inverter (VSI). When the conventional PWM method is used in three-level NPC VSI, dead time is required to prevent a short circuit caused by the operation of complementary devices on the upper and lower arms. However, current distortion is increased because of the dead time and it can also cause a voltage unbalance in the dc-link. To solve this problem, we propose a zero dead-time width modulation (ZDPWM) which does not require dead time used in complementary operation. The proposed technique applies the offset voltage to the space vector pulse width modulation (SVPWM) reference voltage for the same modulation index (MI) as the conventional SVPWM, but any complementary switching operation needs dead time. In addition, the proposed method is divided into four operation sections using the reference voltage and phase current to operate switching devices which flow the current depending on the section. This ZDPWM method is simply implemented by carrier and reference voltage that reduce the current distortion, because complementary operation that needs dead time is not implemented. However, the operation section is delayed due to the sampling delay that occurs during the experiment. Therefore, in this paper, we conduct a modeling of sampling delay to improve the delay of operation section. To verify the principle and feasibility of the proposed ZDPWM method, a simulation and experiment are implemented.

Model Predictive Control Method Based on Deterministic Reference Voltage for Single-Phase Three-Level NPC Converters

When single-phase three-level neutral-point-clamped (NPC) converters operate, there are two main control objectives that need to be met for correct operation. First, the ac source current must be controlled to be sinusoidal. Second, the dc capacitor voltages must be balanced. In original model predictive control (MPC) methods for NPC converters, an optimization process involving an empirical weighting factor design is required to meet both of these objectives simultaneously. This study proposes an MPC approach developed for single-phase three-level NPC converters to meet these objectives using a single reference voltage consisting of a difference-mode term and a common-mode term in each phase. The difference-mode term and the common-mode term are responsible for sinusoidal ac source current synthesis and dc capacitor voltage balancing, respectively. Then, a single cost function compares the adjusted reference voltage with possible voltage candidates to select an optimal switching state, resulting in the smallest cost function value. Different from the conventional MPC method, the proposed approach avoids the selection of weighting factors and the attendance of various control objectives. Thanks to the deterministic approach, the proposed MPC method is straightforward to implement and maintain fast transient performance while guaranteeing the control objectives. Finally, the effectiveness and feasibility of the proposed approach for single-phase three-level NPC are verified through comprehensive experimental results.

Reconfiguration modulation strategy analysis for proactive adaptability of the monitored inverter to on-line monitoring system of IGBT modules

To realize on-line monitoring for insulated-gate bipolar transistor (IGBT) modules in the three-level neutral point clamped (NPC) inverters, a reconfiguration modulation strategy is proposed. The saturated voltage drop (VCE) is one of the most common diagnostic signs of IGBTs’ healthy status due to the advantages of monitoring method such as simple theory, mature implementation, and accurate measurement, and the method to extract VCE in the monitoring system has been researched in the previous study. On this basis, considering realizing on-line monitoring process, essential supported hardware and proactive on-line monitoring environment are needed to guarantee the safe and friendly on-line monitoring implementation. Analysis has been made to show that the on-line monitoring system is able to work regularly by just making use of the inherent O state of a three-level NPC inverter in some circumstances. But to guarantee the monitoring process and the safety of the monitored NPC inverter, the novel reconfiguration strategy is a kind of necessary and essential means to create an on-line monitoring environment, and it is proposed and researched in this paper. Through theoretical derivation, the optimization of reconfiguration strategy is obtained. The reconfiguration strategy proposed in this research has been achieved and its validity is proved based on experimental results.

CBPWM and SVPWM equivalent relationship on single‐phase NPC N ‐level inverters with arbitrary sequence

Single-phase multilevel neutral-point-clamped (NPC) voltage source inverter has been widely applied in AC traction drive system, the carrier-based pulse width modulation (CBPWM) method and the space vector pulse width modulation (SVPWM) method are mainly two modulation methods for single-phase NPC multilevel converters, and there is a certain relationship between these two modulation strategies. In this study, the unified relationship between SVPWM and CBPWM in single-phase three-level and five-level NPC has been analysed. Then by injecting the zero-sequence component into the initial modulation wave, the same switching state and output current as SVPWM can be achieved through modulation waves decomposed under the CBPWM strategy. Finally, the unified theory of SVPWM and CBPWM in an N-level inverter with an arbitrary number of segments sequence was deduced. The simulation and experimental results illustrate that the unified theory between CBPWM and SVPWM is correct. With the zero-sequence injected, CBPWM can realise the same effect as SVPWM, but the former is simpler than the latter, which is easy to promote for higher-level applications.

Disturbance Rejection and Control Design of MVDC Converter with Evaluation of Power Loss and Efficiency Comparison of SiC and Si Based Power Devices

With direct current (DC) power generation from renewable sources, as well as the current relocation of loads from alternating current (AC) to DC, medium-voltage DC (MVDC) should fill gaps in the areas of distribution and transmission, thereby improving energy efficiency. The MVDC system is a platform that interconnects electric power generation renewables (solar, wind) with loads such as data centers, industrial facilities and electric vehicle (EV) charging stations (also using MVDC technology). DC–DC power converters are part of the rising technology for interconnecting future DC grids, providing good controllability, reliability and bi-directional power flow. The contribution of this work is a novel and efficient multi-port DC–DC converter topology having interconnections between two converters, three-level neutral point clamping (NPC) on the high-voltage (HV) side and two converters on the low-voltage (LV) side, providing two nominal low voltages of 400 V (constant) and 500 V (variable), respectively. The design of this new and effective control strategy on the LV side has taken into condition load disturbances, fluctuations and voltage dips. A double-closed-loop control topology is suggested, where an outside voltage control loop (in which the capacitance energies are analyzed as variable, and the inside current loop is decoupled without the precise value of boost inductance) is used. The simulation results show the effectiveness of the proposed control system. In the second part of this study, wide-bandgap SiC and Si devices are compared by using comprehensive mathematical modeling and LT-spice software. Improving power loss efficiency and overall cost comparisons are also discussed.

Open‐circuit fault diagnosis method for three‐level neutral point clamped inverter based on instantaneous frequency of phase current

Because the three-level neutral point clamped (NPC) inverter has the advantages of a large output capacity and high output voltage, it is widely used in wind energy and solar energy power generation. Unfortunately, the three-level NPC inverter often suffers from open-circuit faults, which leads to system security problems and great economic losses. To guarantee the secure operation of the three-level NPC inverter, an open-circuit fault diagnosis method for a three-level NPC inverter based on the instantaneous frequency (IF) of the phase current is proposed here. First, different open-circuit fault signals of the NPC inverter are analysed. Then, the IF of the phase current is used to obtain the fault diagnosis variables. Simultaneously, the Hilbert transform (HT) is used to estimate the IF of the phase current, which carries the information of open-circuit faults. Meanwhile, the average value of the normalised current is provided to locate faulty switches. Finally, by combining the diagnostic variables with the identification threshold, the detection and localisation of open-circuit faults in the NPC three-level inverter are determined. Compared to other fault diagnosis methods, the proposed method is more stable and makes it easier to diagnose open-circuit faults. The correctness and robustness of the method are verified by simulation results.

Four-Level Hysteresis-Based DTC for Torque Capability Improvement of IPMSM Fed by Three-Level NPC Inverter

Direct torque control (DTC) is considered one of the simplest and fastest control strategies used in motor drives. However, it produces large torque and flux ripples. Replacing the conventional two-level hysteresis torque controller (HTC) with a four-level HTC for a three-level neutral-point clamped (NPC) inverter can reduce the torque and flux ripples in interior permanent magnet synchronous motor (IPMSM) drives. However, the torque will not be controlled properly within the upper HTC bands when driving the IPMSM in the medium and high-speed regions. This problem causes the stator current to drop, resulting in poor torque control. To resolve this problem, a simple algorithm based on a torque error average calculation is proposed. Firstly, the proposed algorithm reads the information of the calculated torque and the corresponding torque reference to calculate the torque error. Secondly, the average value of torque error is calculated instantaneously as the reference torque changes. Finally, the average value of the torque error is used to indicate the operation of the proposed algorithm without the need for motor speed information. By using the proposed algorithm, the torque can be controlled well in all speed regions, and thus, a better stator current waveform can be obtained. Simulation and experimental results validate the effectiveness of the proposed method.