Thin Si Layer Research Articles

Diffusion and trapping of implanted hydrogen in a Si/Si:B/Si structure

H implantation in Si/Si:B/Si structures is a promising route to improve the Smart Cut™ process and transfer thin Si layers of reduced roughness and controlled thickness onto regular Si wafers. However, the mechanisms driving this process are unknown and thus difficult to model or optimize. For this reason, we have experimentally studied the redistribution of H which takes place in such structures after implantation and during annealing using SIMS and TEM. We show that the Si:B layer already traps H during implantation and form platelets parallel to the wafer surface. During annealing, the H atoms implanted in the Si regions are slowly transferred toward the Si:B layer where they are trapped on large platelets which grow further during annealing. Routes to optimize this process go through the minimization of H precipitation in the pure Si regions. This can probably be achieved by optimizing the implantation conditions.

A Step toward High-Energy Silicon-Based Thin Film Lithium Ion Batteries.

The next generation of lithium ion batteries (LIBs) with increased energy density for large-scale applications, such as electric mobility, and also for small electronic devices, such as microbatteries and on-chip batteries, requires advanced electrode active materials with enhanced specific and volumetric capacities. In this regard, silicon as anode material has attracted much attention due to its high specific capacity. However, the enormous volume changes during lithiation/delithiation are still a main obstacle avoiding the broad commercial use of Si-based electrodes. In this work, Si-based thin film electrodes, prepared by magnetron sputtering, are studied. Herein, we present a sophisticated surface design and electrode structure modification by amorphous carbon layers to increase the mechanical integrity and, thus, the electrochemical performance. Therefore, the influence of amorphous C thin film layers, either deposited on top (C/Si) or incorporated between the amorphous Si thin film layers (Si/C/Si), was characterized according to their physical and electrochemical properties. The thin film electrodes were thoroughly studied by means of electrochemical impedance spectroscopy, Raman spectroscopy, X-ray photoelectron spectroscopy, and atomic force microscopy. We can show that the silicon thin film electrodes with an amorphous C layer showed a remarkably improved electrochemical performance in terms of capacity retention and Coulombic efficiency. The C layer is able to mitigate the mechanical stress during lithiation of the Si thin film by buffering the volume changes and to reduce the loss of active lithium during solid electrolyte interphase formation and cycling.

Modeled optical properties of SiGe and Si layers compared to spectroscopic ellipsometry measurements

The optical response of strained SiGe alloys, as well as thin Si layers, is analyzed using a sp3d5s∗ tight-binding model within the independent particle approximation. The theoretical results are compared to measurements obtained on samples with various Ge content and layer thicknesses. The dielectric function is extracted from spectroscopic ellipsometry allowing a separation of its real and imaginary parts. Theory and simulation show similar trends for the variation of the dielectric function of SiGe with varying Ge content. Variations are also well reproduced for thin Si layers with varying thickness and are attributed to quantum confinement.

Ellipsometry of surface layers on a 1-kg sphere from natural silicon

We have investigated surface layers on a monocrystalline float-zone, n-type (2400–2990Ωcm) sphere with the diameter of 93.6004mm. Ellipsometric spectra in the visible–ultraviolet range reveals the presence of thin layers of amorphous Si as well as oxide overlayer. We have also prepared a series of flat Si samples, polished using slurries with 1–6μm grits; the overlayers were examined by mid–infrared ellipsometry, including the range of polar vibrations of the SiO bonds. AFM measurements on the sphere were used to test the models of its surface.

(Invited) Surface Activated Wafer Bonding; Principle and Current Status

The surface activated bonding method originally uses cleaning of material surfaces by sputter etching using high energy ion/atom beam of inert gases, typically Ar. [1] The cleaning process removes adsorbed atoms and compound layers, typically oxides, which stabilize the surface. Therefore, after the cleaning process the surfaces become unstable “active” states. Mating two such activated surfaces in vacuum enables strong bond formation even at room temperature. This process is quite suitable for the wafer direct bonding. Because intimate contact is automatically achieved at the bonding interface by attractive force between two atomically smooth surfaces of polished wafers, the process requires not only heating process but also pressure application. [2,3] This method has been successfully applied to various semiconductor wafers such as Si, GaAs, SiC, etc. [4,5] Most of the metals can be also bonded by the method in case of atomically smooth surfaces of, for example, metal layers finished by CMP and/or thin metal films deposited on well-polished wafers. [6,7] On the other hand, materials such as SiO2 and polymers cannot be directly bonded by the method. To bond such materials, deposition of very thin intermediate layers of metals or Si has been proposed. [8] The deposited metal atoms firmly adhere to the surface of SiO2 and/or polymers and simultaneously form active metal surface. The thin film deposition is regarded as a new process for the surface activation. This means that the concept of the surface activated bonding has been extended in order to apply the method to wide range of materials. Various applications of the surface activated bonding have been developed in the field of wafer-level packaging and engineered substrates. In wafer-level packaging field, various MEMS devices have been already commercialized and 3D-integration of heterogeneous devices are under investigation. In engineered substrate application, RF filters have been already commercialized and still succeeding developments continue. Engineered substrates for micro-electronics, power-electronics, solar cells, etc. are now extensively developed by the method. We believe the surface activated bonding will be used in wide range of technological fields in the near future. [1] T. Suga, et al., Acta Metall. Mater. 40 (1992) S113. [2] H. Takagi, et al., Appl. Phys. Lett. 68(1996) 2222. [3] H. Takagi, et al., Sens. Actuat. A 105 (2003) 98. [4] M. M. R. Howlader, et al., J. Vac. Sci. Technol. B 19(2001) 2114. [5] J. Suda, et al., Proc ICSCRM 2013, Miyazaki, Japan, (2013) 358. [6] A. Shigetou, et al., J. Mater. Sci. 40 (2005) 3149 [7] T. Shimatsu, et al., J. Vac. Sci. Technol. B 28(2010) 706. [8] R. Kondou, et al., Scripta Materialia 65(2011) 320.

Thin Layer Transfer Using Room Temperature Wafer-Level Bonding Process

Direct wafer bonding has already been demonstrated as an efficient solution to create a linkage between two different surfaces. One of the main limitation is the temperature required to stabilize the bonding interface and the strength. For example, to completely stabilize a Si/Si bonding realized at room pressure, an annealing step done at 1000°C or above is required. In the past, alternative low temperature processes, using plasma activation of the surfaces before contact between them, were developed for SiO2 to Si and SiO2 to SiO2 bondings, lowering the annealing temperature at 300°C and enabling enough bond strength for many applications [1]. Another possible option to realize a room temperature Si/Si bonding is to use a covalent bonding process [2]. The EVG®580 ComBond® was developed with this aim by bringing the wafers in contact in an ultra-high vacuum environment, after activation in vacuum of both surfaces in the ComBond® Activation Module (CAM®) [3,4]. This paper aims to present observations made after the transfer of a thin layer using this novel direct covalent Si/Si bonding process. The bonding process was realized in an EVG®580 ComBond® equipment installed at CEA-Leti. At first, the equipment and the process window were qualified in terms of metal and particle contaminations. Measurements of particles with a threshold at 90nm were performed, and detection of metals contamination demonstrated that the whole bonding process was metal free with a specification of 1.1010 at/cm² for all metallic elements. The activation process, performed in the CAM®, was also characterized, especially in terms of etching rate, roughness and amorphous thickness measurement done by ellipsometry. Then, an appropriate bonding process, demonstrating a high bond strength (>5 J/m²) was developed for Si/Si 200 mm wafers. Using this process, the bonding of a SOI (Si 100nm - SiO2 200nm) with a Si wafer was performed, in order to transfer the SOI Si layer onto a new substrate and to characterize both the bonding and the transfer qualities. In this study, bonding quality is assessed using C-mode Scanning Acoustic Microscopy (C-SAM) which is performed just after bonding, as shown on figure 1a, where no defects have been observed. More generally, in order to control the bonding and the layer transfer processes, particle contamination measurements deserve to be performed on the SOI surface before bonding and after layer transfer. It may be done using a SurfScan equipment (SP2) from KLA-Tencor with a detection threshold value of 90 nm for instance. If large particles are deposited at the bonding interface during activation process, they lead to non-transferred areas (i.e. holes) visible after layer transfer. As we can see from figure 1b, no holes or additional defects are detected after such a layer transfer. Thus, perfect quality of transferred layers on 200 mm full wafers is shown. Additional measurements may be performed in order to characterize the bonding interface. Ellipsometry is used to measure the thickness of the amorphous area created during the surface activation step. TEM observations, made before and after recrystallization, allow to confirm the thickness of the amorphous layer, as well as to study the temperature at which the Si interface is fully recrystallized. Finally, SIMS measurements is used to characterize the other species than Si which could be found at the bonding interface like oxygen, carbon, and metallic elements for instance. The successful transfer of a thin Si layer onto a new substrate shown in this work demonstrates that such a bonding process would deserve to be applied to many other thin layer transfer techniques. REFERENCE [1] T. Plach, K. Hingerl, S. Tollabimazraehno, G. Hesser, V. Dragoi and M. Wimplinger, J. Appl. Phys., 113, 094905 (2013) [2] H. Takagi, K. Kikuchi, R. Maeda, T. R. Chung and T. Suga, "Surface Activated Bonding of Silicon Wafers at Room Temperature", Appl. Phys. Lett. Vol. 68, No.16 (1996), pp. 2222-2224. [3] C. Flötgen, N. Razek, V. Dragoi, M. Wimplinger, “Novel Surface Preparation Methods for Covalent and Conductive Bonded Interfaces Fabrication”, ECS Trans. 64(5), The Electrochemical Society, pp. 103-110, 2014 [4] C. Flötgen, N. Razek, V. Dragoi, “Functional Interfaces Fabrication Through Room Temperature Wafer-Level Bonding”, Proc. of WaferBond Conference, 2015, pp. 55-56 EVG®580 is a Trade Mark of EVGroup ComBond® is a Trade Mark of EVGroup CAM® is a Trade Mark of EVGroup Figure 1

Layered Si-C Nanocomposites Synthesized from Layered Silicate As High Performance Anodes for Lithium-Ion Batteries

1. Introduction Lithium Ion Batteries (LIB) are already widely used for small potable electronics (cellular phone, lab top computer, MP3 etc.) as a main energy part due to light weight, good energy storage rate, and long term stability (cyclaility and durability). Existing LIBs use graphite as an anode material. This carbon material has high cycle stability and electrical conductivity. However, the specific lithiation capacity (370 mA h g-1) of the graphite can’t satisfy the demands for higher energy density batteries. Silicon (Si) has emerged as a promising material to produce high capacity anodes for LIBs, due to its high theoretical capacity (~4200 mA h g-1) which is 10 times higher than that of graphite. However, Si anodes for LIBs have a disadvantage from the large volume change. The expanding to 3-4 times its original size often break the electrical contacts with current collector. Therefore, we focus on making ideal particle size and effective structure of Si. Layered Si particles are prepared by kanemite as a raw material, followed by magnesiothermic reduction. And then, the phenol-formaldehyde liquid resin pyrolyzed carbon coated on the surface of Si particles and inserted into layered Si inner space. In this research, This novel anode active materials exhibit a high reversible specific capacity and good capacity retention. 2. Materials and Method The natural clays with layered Na+ silicates are used in constructing the structure of the silicon layers. A layered silicate kanemite (NaHSi2O5ㆍ3H2O) was prepared by dispersing δ-Na2SiO5 (1.0g) in deionized water (100mL) with stirring for 1h. After that, the kanemite was filtrated, washed, and then dried. The kanemite powder (200mg) was mixed with Mg powder (200mg), and calcined for magnesiothermic reduction at 650°C under Ar atmosphere for 5h. 0.1 M of HCl solution remove redundant Mg, MgO and Mg2Si. We used HF and ethanol solution for remove remained SiO2 in the layered silicon particles. 200 mg of synthesized layered silicon particles, 100ml of Phenol-Formaldehyde (PF) liquid and 1ml of HCl were dispersed in the mixture by ultrasonication for 2h. The mixed solution was filtrated with 0.2mm size of membrane filter. During the filtrate process, dispersed silicon thin plates are stacked like bricks. The filter and mixture become phenolic resin structure after heated at 128°C for 12h. Finally, the silicon-phenolic resin solid compound was calcined at 700°C for 5h in Ar atmosphere in order to be layered Si-C nanocomposites. For the characteristic comparison, we prepare commercial original Si nanoparticles (40~60nm). 3. Results and discussion As shown in Fig. 1a,b, the PF resin pyrolized carbon and carbon black showed constant reversible capacity of 170mA h g-1 and 150mA h g-1 respectively. The layered Si and commercial Si particle showed a first reversible capacity of almost 1100mAhg-1 and 1200mAhg-1 in Fig. 1c,d. however, the reversible capacity in both samples were less that 100mAhg-1 after 25 cycles. On the other hand, the reversible capacity on the layered Si-C nanocomposite is still as high as 792mA h g-1 after 25 cycles at a rate of 100mAg-1 as shown in fig. 1e. This means capacity retention is 90% because the first reversible capacity was 875 mA h g-1. Fig. 1f result indicating that the layered Si-C nanocomposite has an excellent cycling performance. One possibility of the improved performance maybe accounted to the fact that the thin layer structures of nano silicon may have less volumetric changes and restrain the pulverization of the electrode materials during lithium ion insertion and extraction. Another reason for the enhanced behavior could be assigned to the carbon, which can improve the electrical conductivity of the composite and suppress the polarization. 4. Conclusions In summary, layered Si plates were prepared by the means of magnesiothermic reduction of Kanemite. And then, layered Si-C nanocomposites were successfully synthesized by dispersing layered silicon particles in a liquid phenol-formaldehyde followed by a subsequent pyrolysis process. This process enables a strong contact of the silicon layers and carbon sources. The layered Si-C nanocomposites exhibit an initial reversible capacity of 875mAhg-1 and a high retention of 90% after 25cycles at a current density of 100mAg-1. The highly enhanced electrochemical performance of layered Si-C nanocomposite maybe attributed to the intercalated and coated carbon on the composites which suppress the volume change of Si upon cycling, prevent the pulverization of the electrode, and increase the electrical conductivity of nanocomposite. The extremely thin Si layer (<1nm) will also provide better strength than general Si particles from the volume change, as same function as the Si thin film. Figure 1

Short wavelength enhanced phototransistor with n ‐doped porous silicon layer

A phototransistor with aluminium (Al)/porous silicon (Si)/epitaxial-Si structures was proposed and was fabricated and characterised with short wavelength enhanced operating. We proposed the short wavelength response of the Si-based thin film phototransistor; it can be enhanced by introducing thin porous Si (PS) layer as the base region of transistor. The porous process of device manufacture is suitable for applications in design of visible-light sensitive phototransistors. Experimental results showed that the short wavelength responses in the developed devices were enhanced as compared with the Si-based homojunction transistors, this comparably medium optical gain indicated that the developed Al/PSi/epitaxial-Si heterojunction thin film phototransistor got potential for practical Si-based optical-electron integrated-circuit and biophotonics applications.

Effect of the order of He+ and H+ ion co-implantation on damage generation and thermal evolution of complexes, platelets, and blisters in silicon

Hydrogen and helium co-implantation is nowadays used to efficiently transfer thin Si layers and fabricate silicon on insulator wafers for the microelectronic industry. The synergy between the two implants which is reflected through the dramatic reduction of the total fluence needed to fracture silicon has been reported to be strongly influenced by the implantation order. Contradictory conclusions on the mechanisms involved in the formation and thermal evolution of defects and complexes have been drawn. In this work, we have experimentally studied in detail the characteristics of Si samples co-implanted with He and H, comparing the defects which are formed following each implantation and after annealing. We show that the second implant always ballistically destroys the stable defects and complexes formed after the first implant and that the redistribution of these point defects among new complexes drives the final difference observed in the samples after annealing. When H is implanted first, He precipitates in the form of nano-bubbles and agglomerates within H-related platelets and nano-cracks. When He is implanted first, the whole He fluence is ultimately used to pressurize H-related platelets which quickly evolve into micro-cracks and surface blisters. We provide detailed scenarios describing the atomic mechanisms involved during and after co-implantation and annealing which well-explain our results and the reasons for the apparent contradictions reported at the state of the art.

Origin of microplasma instabilities during DC operation of silicon based microhollow cathode devices

The failure mechanisms of micro hollow cathode discharges (MHCD) in silicon have been investigated using their I-V characteristics, high speed photography and scanning electron microscopy. Experiments were carried out in helium. We observed I–V instabilities in the form of rapid voltage decreases associated with current spikes. The current spikes can reach values more than 100 times greater than the average MHCD current. (The peaks can be more than 1 Ampere for a few 10’s of nanoseconds.) These current spikes are correlated in time with 3–10 μm diameter optical flashes that occur inside the cavities. The SEM characterizations indicated that blister-like structures form on the Si surface during plasma operation. Thin Si layers detach from the surface in localized regions. We theorize that shallow helium implantation occurs and forms the ‘blisters’ whenever the Si is biased as the cathode. These blisters ‘explode’ when the helium pressure inside them becomes too large leading to the transient micro-arcs seen in both the optical emission and the I–V characteristics. We noted that blisters were never found on the metal counter electrode, even when it was biased as the cathode (and the Si as the anode). This observation led to a few suggestions for delaying the failure of Si MHCDs. One may coat the Si cathode (cavities) with blister resistant material; design the MHCD array to operate with the Si as the anode rather than as the cathode; or use a gas additive to prevent surface damage. Regarding the latter, tests using SF6 as the gas additive successfully prevented blister formation through rapid etching. The result was an enhanced MHCD lifetime.

Interfacial Reactions Between Anorthite (CaAl2Si2O8) and Al 7075 Alloy at 850°C and 1150°C

The present work reports an investigation of the interactions of Al 7075 alloy and anorthite at 850°C (150 h) and 1150°C (24 h). Transmission electron microscopy, electron probe microanalysis, X‐ray diffraction, and scanning electron microscopy coupled with energy‐dispersive spectroscopy were used to identify the mineralogical and microstructural changes at the metal–ceramic interface. At 850°C, the phase formation mechanisms were (a) Si4+–Al3+ interdiffusion between the Al alloy and anorthite to form calcium dialuminate (CA2) and Ca2+–Mg2+ interdiffusion between the Al alloy and calcium dialuminate to form spinel. At 1150°C, spinel + Al2O3 and calcium hexaluminate (CA6) + CA2 were the major and minor phase mixtures, respectively in the corroded area. A thin layer of calcium monoaluminate (CA), gehlenite, and Si was present in the immediate vicinity of anorthite. The early stages of corrosion at 1150°C and 850°C were identical. However, due to thickening of the corroded region (viz., spinel formation) and enhanced evaporation of Mg at the higher temperature, the interdiffusion path evolves from Si4+–Al3+ + Ca2+–Mg2+ to Si4+–Al3+ + Ca2+–Al3+, thus establishing the following phase evolution path at the interface:urn:x-wiley:00027820:media:jace14091:jace14091-math-0001

High-quality silicon on silicon nitride integrated optical platform with an octave-spanning adiabatic interlayer coupler

Hybrid nanophotonic platforms based on three-dimensional integration of different photonic materials are emerging as promising ecosystems for the optoelectronic device fabrication. In order to benefit from key features of both silicon (Si) and silicon nitride (SiN) on a single chip, we have developed a wafer-scale hybrid photonic platform based on the integration of a thin crystalline Si layer on top of a thin SiN layer with an ultra-thin oxide buffer layer. A complete optical path in the hybrid platform is demonstrated by coupling light back and forth between nanophotonic devices in Si and SiN layers. Using an adiabatic tapered coupling method, a record-low interlayer coupling-loss of 0.02 dB is achieved at 1550 nm telecommunication wavelength window. We also demonstrate high-Q resonators on the hybrid material platform with intrinsic Q's as high as 3 × 10(6) for a 60 μm-radius microring resonator, which is (to the best of our knowledge) the highest Q observed for a micro-resonator on a hybrid Si/SiN platform.

Structural damage in thin SLIM-Cut c-Si foils fabricated for solar cell purposes: atomic assessment by electron spin resonance

Within the context of reducing production costs, thin (<90 μm) silicon foils intended for photovoltaic applications have been fabricated from standard (100)Si wafers using a low-temperature (<150 °C) stress-induced lift-off process. A multi-frequency electron spin resonance (ESR) study was performed in order to evaluate, at atomic scale, the quality of the material in terms of defects, including identification and quantification. Generally, a complex ESR spectrum is observed, disentangled as the superposition of three separate signals. This includes, most prominently (∼91% of total density) the D-line (Si3 ≡ Si· dangling bonds in a disordered Si environment), a set (∼6%) of highly anisotropic signals ascribed to dislocations (K1-like), and a triplet, identified as the Si-SL5 N-donor defect. Defect density depth profiling from the lift-off side shows all signals disappear in tandem after etching off a ∼33 μm thick Si layer, indicating a highly correlated−equal in relative terms−distribution of the three types of defects over the affected top part of the Si foil. The defect density is found to be highly non-uniform laterally, with the density peaking near the crack initiation point, from which defect generation spreads. It is thus found that the SLIM-Cut method for fabrication of thin Si foils results in the introduction of defects that would unacceptably impair the functionality of photovoltaic cells built on these substrates. Fortunately, this may be cured by etching off a thin top Si layer, resulting in a most useful thin Si foil of standard high quality.

Room-temperature bonding method for polymer substrate of flexible electronics by surface activation using nano-adhesion layers

A sealing method for polymer substrates to be used in flexible electronics is studied. For this application, a low-temperature sealing method that achieves flexible bonding of inorganic bonding material is required, but no conventional technique satisfies these requirements simultaneously. In this study, a new polymer bonding method using thin Si and Fe layers and the surface activated bonding (SAB) method are applied to bond poly(ethylene naphthalate) (PEN) films to each other. PEN films can be bonded via the proposed method without voids at room temperature, and the bonded samples are bendable. The adhesion strength of the bonded samples is so strong that fracture occurs in the polymer bulk rather than at the bond interface. Investigations of the bonded samples by transmission electron microscopy (TEM) and Fourier-transform infrared spectroscopy (FTIR) reveal that bonding is achieved by chemical interactions between the polymer surface and deposited atoms.

Growth of light-emitting SiGe heterostructures on strained silicon-on-insulator substrates with a thin oxide layer

The possibility of using substrates based on “strained silicon on insulator” structures with a thin (25 nm) buried oxide layer for the growth of light-emitting SiGe structures is studied. It is shown that, in contrast to “strained silicon on insulator” substrates with a thick (hundreds of nanometers) oxide layer, the temperature stability of substrates with a thin oxide is much lower. Methods for the chemical and thermal cleaning of the surface of such substrates, which make it possible to both retain the elastic stresses in the thin Si layer on the oxide and provide cleaning of the surface from contaminating impurities, are perfecte. It is demonstrated that it is possible to use the method of molecular-beam epitaxy to grow light-emitting SiGe structures of high crystalline quality on such substrates.

Optimization of the Antireflection Coating of Thin Epitaxial Crystalline Silicon Solar Cells

In this work we use an effective weighting function to include the internal quantum efficiency (IQE) and the effective thickness, Te, of the active cell layer in the optical modeling of the antireflection coating (ARC) of very thin crystalline silicon solar cells. The spectrum transmitted through the ARC is hence optimized for efficient use in the given cell structure and the solar cell performance can be improved. For a 2-μm thick crystalline silicon heterojunction solar cell the optimal thickness of the Indium Tin Oxide (ITO) ARC is reduced by ∼8nm when IQE data and effective thickness are taken into account compared to the standard ARC optimization, using the AM1.5 spectrum only. The reduced ARC thickness will shift the reflectance minima towards shorter wavelengths and hence better match the absorption of very thin cells, where the short wavelength range of the spectrum is relatively more important than the long, weakly absorbed wavelengths. For this cell, we find that the optimal thickness of the ITO starts at 63nm for very thin (1μm) active Si layer and then increase with increasing Te until it saturates at 71nm for Te > 30μm.

Optical Property of Porous Silicon Produced by Metal-Assisted Etching

A number of ideas have been applied to improve the conversion efficiency of crystalline silicon (Si) solar cells. Antireflection of Si surface is an important technology to increase the photocurrent density of solar cells. Both random pyramid structures produced by anisotropic etching of crystalline Si wafers and antireflection coatings which have lower refractive index than Si are generally used for commercial solar cells. Common antireflection coatings using Si nitride have such problems as high manufacturing cost and limited antireflection effect only in a specific range of wavelength. Previously, antireflection coatings of porous Si formed by stain etching using a mixture solution of hydrofluoric acid and nitric acid or by anodic etching were reported1, 2. This method can control the refractive index by changing the structure of the porous Si, so it can decrease the reflection of Si surface in a wide wavelength range. We reported that macro porous Si formed by a metal assisted etching, which is immersing metal catalyst modified Si in a hydrofluoric acid (HF) aqueous solution, can be used as a texture layer for antireflection of solar cells3. The macro porous layers consisting of pores in µm-size are expected to damage p-n junction and reduce the conversion efficiency of solar cells. In this study, we investigated the optical properties of porous Si thin films, which were thinner than p-n junction. Single-crystalline n-Si wafers (CZ, (100), ca. 10 Ω cm) were used as substrates. The Si wafers were immersed in 1 mM (M = mol dm-3) silver nitrate (AgNO3) solution including 0.15 M HF at 278 K for electroless displacement metal deposition. Metal deposited Si wafers were immersed in a 6.6 M HF solution including hydrogen peroxide (H2O2) at 298 K for 1 ~ 60 s. The samples after etching were immersed in a 13 M nitric acid and then 7.3 M HF to remove silver nanoparticles remaining in the bottom of the pores and the Si oxide film, respectively. A multi-photometric system (Otsuka Electronics, MCPD-7000KA) with an integrating sphere was used to measure reflectance of Si surface. A spectroscopic ellipsometer (Otsuka Electronics, FE-5000) was used to analyze the optical constants of the porous Si thin film. Fig. 1 shows that an uniform porous Si thin film consisting of straight pores, few tens nm in diameter and 250 nm in length, was formed by the etching for 15 s. The structure of porous Si was changed with HF and H2O2 concentrations of the etching solution and etching time. The pore size was consistent with the size of Ag nanoparticles as shown in Fig. 1. Thus, the porosity of porous Si can be evaluate as the coverage of Ag nanoparticles on Si before etching. The coverage, that is porosity, can be controlled by deposition time of Ag. The reflection of porous Si surface was much lower than mirror polished Si wafer before metal assisted etching (Fig. 2). As the porosity increased, interference waveform in the reflectance spectra appeared and the peak interval of reflectance spectra decreased. On the other hand, it was possible to control the thickness of the porous Si thin film by changing the etching time. As porous layer thickness increased, the reflectance decreased and the amplitude of the interference waveform decreased. The reflectance reached lower than 5.5%, which is much lower than 10% of a pyramidal structure, in the wavelength range of 400-1000 nm. From these results, we assumed that the porous Si functions as an optical thin film of a smooth single-layer. The refractive index of porous Si thin film at the porosity of 33 ~ 56% was observed as 1.1 ~ 2.2. The attenuation factor (factor that affects light absorption) of porous Si thin film was ~100 times higher than that of crystalline Si. The thin porous Si layers produced by the metal assisted etching are expected to work as suitable antireflection films for crystalline Si solar cells. ACKNOWLEDGEMENT The present work was partly supported by JSPS KAKENHI (26289276). The authers wish to express their thanks to Otsuka Elecronics Co., LTD for ellipsometric analysis. REFERENCES 1. R. R. Bilyalov, R. Lüdemann, W. Wettling, L. Stalmans, J. Poortmans, J. Nijs, L. Schirone, G. Sotgiu, S. Strehlke, C. Lévy-Clément, Sol. Energy Mater. Sol. Cells 60, 391-420 (2000). 2. L. Remachea, E. Fourmonda, A. Mahdjoubb, J. Dupuisa, M. Lemitia, Mater. Sci. Eng. B 176, 45–48 (2011). 3. S. Yae, Y. Kawamoto, H. Tanaka, N. Fukumuro, H. Matsuda, Electrochem.Commun. 5, 632 (2003). Figure 1

Friction between silicon and diamond at the nanoscale

This work investigates the nanoscale friction between diamond-structure silicon (Si) and diamond via molecular dynamics simulation. The interaction between the interfaces is considered as strong covalent bonds. The effects of load, sliding velocity, temperature and lattice orientation are investigated. Results show that the friction can be divided into two stages: the static friction and the kinetic friction. During the static friction stage, the load, lattice orientation and temperature dramatically affects the friction by changing the elastic limit of Si. Large elastic deformation is induced in the Si block, which eventually leads to the formation of a thin layer of amorphous Si near the Si-diamond interface and thus the beginning of the kinetic friction stage. During the kinetic friction stage, only temperature and velocity have an effect on the friction. The investigation of the microstructural evolution of Si demonstrated that the kinetic friction can be categorized into two modes (stick-slip and smooth sliding) depending on the temperature of the fracture region.

Liquid phase epitaxy of binary III–V nanocrystals in thin Si layers triggered by ion implantation and flash lamp annealing

The integration of III–V compound semiconductors in Si is a crucial step towards faster and smaller devices in future technologies. In this work, we investigate the formation process of III–V compound semiconductor nanocrystals, namely, GaAs, GaSb, and InP, by ion implantation and sub-second flash lamp annealing in a SiO2/Si/SiO2 layer stack on Si grown by plasma-enhanced chemical vapor deposition. Raman spectroscopy, Rutherford Backscattering spectrometry, and transmission electron microscopy were performed to identify the structural and optical properties of these structures. Raman spectra of the nanocomposites show typical phonon modes of the compound semiconductors. The formation process of the III–V compounds is found to be based on liquid phase epitaxy, and the model is extended to the case of an amorphous matrix without an epitaxial template from a Si substrate. It is shown that the particular segregation and diffusion coefficients of the implanted group-III and group-V ions in molten Si significantly determine the final appearance of the nanostructure and thus their suitability for potential applications.

Spalling of a Single Crystalline Silicon Layer By Electroless/Electrodeposit-Assisted Stripping(EAS) Process for Flexible Silicon Devices

The purpose of this study was to investigate a novel kerf-free method to reduce thecost of the silicon materialfor flexible silicon devices such as a solar cell, a TFT(thin film transistor) and etc. In the last few decades, there were a number of attempts to reduce the production cost of the silicon by reducing the thickness of the silicon wafer such as a sawing technique, a high-temperature induced spalling process and etc. Among these techniques, a novel method called Electroless/Electrodeposit Assisted Stripping(EAS) process is one of the most effective and inexpensive kerf-free methods for acquiring a high quality thin-single crystalline silicon film. The EAS process is schematically described in Figure 1. This technique requires a stressor layer at a predetermined depth by manipulating the stress value and thickness of Ni deposit. A stress is induced by a nickel layer electrodeposited from citrate bath at room temperature. As the induced tensile stress was introduced at the critical value, a thin Si layer without crack was successfully lifted off from a silicon substrate. The advantage of the EAS process is that the thin silicon film can be repetitively lifted off from a Si substrate, so that it dramatically reduces the manufacture cost of the solar cell and can also be reproduced continuously owing to its all-wet process. The EAS process is consisted of three steps: 1) forming a Ni seed layer with nano-rod using anelectroless deposition to enhance the adhesion of seed layer on Si substrate, and 2) forming a low stress layer as a buffer layer to prevent cracks on a seed layer and then finally 3) forming a high stress layer using electrodeposit at room temperature. A high quality Si film could be obtained by the precise control of two parameters: 1) adhesion between a metal seed layer and Si, 2) critical stress applied to Si substrate. Concerning control of the adhesion of the Ni seed layer-Si interface, a Ni seed layer has to be satisfied with both high adhesion on Si and high resistance of crack by a high stress-inducing layer. We investigated a high adhesive electroless seed layer on Si in place of a conventional high cost PVD(physical vapor deposition) process. Firstly, nano-holes were formed with control of a critical spacing on Si surface by MACE(metal assisted chemical etching) and then both holes and Si surface were covered with Ni using autocatalytic electroless deposition. The effect of the nano-hole in silicon, such as a pretreatment for enhance adhesion, is also investigated using different MACE parameters – control of metal distribution, depth in Si, the size of the nano-hole, various etched structure. Concerning control of a critical stress applied to Si substrate, a stress layer has to be satisfied with a certain stress value high enough to propagate a crack within Si during electrodeposition. We investigated both internal stress value of the Ni deposit and the spalling behavior under different conditions of composition, current density, pH, temperature etc. Figure 1