Thin Quad Flat Pack Research Articles

Effect of Air-HAST Conditions on Sn Whisker Growth

Sn whiskers are one of the major causes of failure in fine-pitch electronics because of the short distance between the leads in an electronic package. In various whisker mechanisms, it takes a long time to grow a whisker due to Sn corrosion because the temperature is limited to below 100°C in high humidity. In the highly accelerated temperature and humidity stress test (HAST), the corrosion phenomenon rarely occurred because of the little air inside the chamber. Therefore, air is needed in the whisker accelerating test to meet the same whisker mechanism under high temperature and humidity conditions. In this study, an Air-HAST with air inputs in the chamber with highly temperature and humidity was introduced. Whisker growth was accelerated with temperatures at 130°C and various air pressures using the thin quad flat package (TQFP) sample with Sn plating lead. The whisker growth in the Air-HAST, HAST, and high temperature and high humidity test (85°C, 85%R.H.) was compared by plotting each growth length and number of whiskers. The accelerated relationships of whisker growth under the various test conditions will help the electronic industry meet the short development cycles. Key words: Sn whisker, Air-HAST, 85°C/85%RH, HAST, TQFP

An in-situ numerical–experimental approach for fatigue delamination characterization in microelectronic packages

An in-situ and cost-effective numerical–experimental approach for fatigue characterization of bi-material interfaces in microelectronic packages is presented. In this method using a sample-centered approach, a miniaturized sub-critical bending (MSCB) test setup is designed and fabricated based on the samples that are acquired directly from the production-line. Sub-critical crack growth (SCCG) is captured along the surface between molding compound (MC) and copper lead-frame (LF) in the samples prepared from Thin Quad Flat Package (TQFP). The toughness values such as critical (Gc) and sub-critical strain energy release rate (Gth) are measured. It is shown that crack propagation along the MC/LF interface is highly fatigue sensitive. In addition, fatigue–fracture tests under different isothermal conditions reveal that, the toughness values are higher in lower temperatures. The fractographical study of samples shows that, although some of the molding compound particles are left on the LF surface, the interfacial fracture is the dominant failure mode.

Numerical analysis on the effects of different inlet gates and gap heights in TQFP encapsulation process

Finite volume method (FVM) based simulation of encapsulation process in thin quad flat pack (TQFP) packages is presented in this paper. The 3D model of TQFP package is built and meshed with tetrahedral elements using GAMBIT, and simulated by FLUENT software. Castro–Macosko viscosity model and volume of fluid (VOF) technique are applied for flow front tracking of the encapsulant. Curing kinetics is taken into consideration in the simulation using Kamal’s equation. To solve the Castro–Macosko and Kamal models, suitable user defined functions (UDFs) are developed using MS VISUAL STUDIO.NET software and incorporated into the FLUENT. The parameters such as mold filling time, flow front profiles, pressure distribution in the package and void formation, for three different inlet gate arrangements and gap heights, are analyzed. The degree of conversion of the molding compound during the encapsulation process is also studied for different number of inlet gates. It is found that the filling time and void occurrence could be reduced by increasing the number of inlet gates, and the variation of gap height within the cavity is crucial in controlling the peak pressure. Moreover, the combined effect to two competing events, such as, reduction of viscosity with shear rate due to non-Newtonian behavior of the polymer fluid and increase in viscosity during the curing reaction, are effectively demonstrated. The simulation results are compared with previous experimental results and found in good conformity.

Interface delamination analysis of TQFP package during solder reflow

Interface delamination during solder reflow is a critical reliability problem for the plastic IC packages. The main objective of this study is to apply modified virtual crack closure method (MVCCM) for the analysis of interface delamination between the leadframe pad and the encapsulant during a lead-free solder reflow after the level 1 moisture preconditioning. In this study, the moisture diffusion parameters and the coefficient of moisture expansion (CME) of two different epoxy molding compounds (EMC) are characterized for moisture diffusion analysis and the deformation analysis due to hygroscopic swelling. At the same time, the entire thermal and moisture history of Thin Quad Flat Pack (TQFP) package is simulated from the start of level 1 moisture preconditioning (85 °C/85%RH for 168 h) to subsequent exposure to a lead-free solder reflow process. Finally, the transient development of the stress intensity factors due to thermal stress only K t , hygrostress only K h , vapor pressure only K p and combined energy release rate G tot are computed and studied by using MVCCM. Based on the calculated stress intensity factors and energy release rates, it seems that for the EMC, the Young’s modulus, moisture diffusion coefficient, CME and adhesion strength with leadframe at high temperature appear to be the most significant variables for the MSL performance of TQFP package and this matches well with the experimental finding.

Simulations and experiments of three-dimensional paddle shift for IC packaging

Paddle shift is one of the most serious defects which may arise during the IC encapsulation of leadframe-type packages. The term “paddle shift” means the deflection of the leadframe-pad and die as a result of the pressure difference between the top and bottom mold cavities. In extreme cases, paddle shift could lead to a substantial reduction in the reliability of package. This paper employed a computational approach to predict the paddle shift quantity during the IC packaging process. The approach was based on precise finite element (FE) models and flow-structure decoupled analyses. Two kinds of FE models were needed for the decoupled analyses, namely a 3D FE model for the mold filling analysis (i.e. fluid-flow mesh) and a 3D FE model for the structural analysis (i.e. paddle mesh). The aim of the mold filling analysis was to identify the pressure distribution acting on the paddle structure during the encapsulation process, while the objective of the structural analysis was to determine the amount of paddle shift which was caused by pressure distribution. To investigate the relationship between the package geometry and the amount of paddle shift, the present simulations considered six TQFP (Thin quad flat package) models with different geometrical parameters. The simulation results for the paddle shift were compared with the experimental results to demonstrate the accuracy of the proposed numerical approach. It was found that a good agreement exists between the two sets of results.

Critical variables in IC Packaging Wire Bonding Process (ICPWBP): Ulrasonic (US) power, force and temperature

Accompanied with the improvement of manufacturing technology of Integrated Circuits (IC), packaging technology must also be improved to raise yields of the related processes. In this paper, the yields of the critical variables in IC packaging manufacturing system are improved. We presented a TQFP (Thin-Quad-Flat Pack), the wire bonding processes were analyzed and determined to be the critical processes, and the concept of signal-to-noise ratio in Taguchi Method was applied to determine the ultimate parameters for the wire bonding processes. Also, the process capability analysis was conducted. We presented the critical variables in IC Packaging Wire Bonding Process (ICPWBP): ball shear/wire pull of ultrasonic (US) power, ball shear/wire pull offeree, and temperature.

Non‐contact infrared detection of defects in electronic packaging

A non‐contact infrared detection by a steady direct current electro‐thermal technique is established to detect possible defects in electronic packaging. In the infrared detection process, researchers generally use the temperature rise attributed to the direct current source to estimate defects roughly. To detect defects accurately, the interference to the temperature rise due to parameters aside from defects (such as current inputs, defect types) needs to be filtered out. The so‐called “temperature defect influence factor T” (i.e. the ratio of temperature rise of a defective structure detected from experiment to that of a perfect one from finite element analysis) together with a rigorous detection criterion are thus devised in this work to detect defects. By depicting the contours of the temperature defect influence factor, the shape, size, number and location of defects in electronic packaging can be clearly detected using the detection procedure developed. As a case study, the detection of defects in thin quad flat package (TQFP) is performed. The results demonstrate that the present technique is feasible and effective for defect detection in electronic packaging.

Optimization of TQFP molding process using neuro-fuzzy-GA approach

Abstract This paper focuses on an integrated optimization problem that involves multiple qualitative and quantitative responses in the thin quad flat pack (TQFP) molding process. A fuzzy quality loss function (FQLF) is first applied to the qualitative responses, since the molding defects cannot be simply represented by the relationship between molding conditions and mathematical models. Neural network is then used to provide a nonlinear relationship between process parameters and responses. A genetic algorithm together with exponential desirability function is employed to determine the optimal parameter setting for TQFP encapsulation. The proposed method was implemented in a semiconductor assembly factory in Taiwan. The results from this study have proved the feasibility of the proposed approach.

An effective methodology for thermal characterization of electronic packaging

An effective and novel methodology that integrates infrared (IR) thermography measurement and a three-dimensional (3-D) finite element (FE) model is proposed for thermal characterization of packages in a steady state under a natural convection environment based on JEDEC specification . To perform surface temperature measurement using an IR thermometer, a black paint coating is applied on the surface of packages so as to calibrate the surface radiation. The associated emissivity is approximately assessed using a simple calibration experiment, and an appropriate thickness of the coating is determined. By using a typical 100-lead Thin Quad Flat package (TQFP) as the test vehicle, the proposed methodology is benchmarked by a thermal test die measurement in terms of the junction-to-ambient (J/A) thermal resistance and the chip junction temperature. To demonstrate the accuracy of the benchmarked data from the thermal test die measurement, a corresponding uncertainty analysis is performed. It is found that the worst possible uncertainty in the measured power, based on the specific power supply, is about 0.005 W and that of chip junction temperature measurement is about 0.78/spl deg/C. Additional studies are performed to evaluate the feasibility of the correlation models for convective heat transfer coefficients on typical TQFP packages. It turns out that for a small device such as the TQFP package, these correlation models are fairly reliable.

Viscoplastic Anand model for solder alloys and its application

A viscoplastic constitutive model, the Anand model, in which plasticity and creep are unified and described by the same set of flow and evolutionary relations, was applied to represent the inelastic deformation behavior for solder alloys. After conducting creep tests and constant strain rate tests, the material parameters for the Anand model of the Pb‐rich content solder 92.5Pb5Sn2.5Ag were determined from the experimental data using a nonlinear fitting method. The material parameters for 60Sn40Pb, 62Sn36Pb2Ag and 96.5Sn3.5Ag solders were fitted from the conventional model in the literature where plasticity and creep are artificially separated. Model simulations and verifications reveal that there is good agreement between the model predictions and experimental data. Some discussion on this unified model is also presented. This viscoplastic constitutive model for solder alloys possesses some advantages over the separated model. The achieved Anand model has been applied in finite element simulation of stress/strain responses in solder joints for chip component, thin quad flat pack and flip‐chip assembly. The simulation results are in good agreement with the results in the literature. It is concluded that the Anand model could be recommended as a useful material model for solder alloys and can be used in the finite element simulation of solder joint reliability in electronic packaging and surface mount technology.

A new approach in free air ball formation process parameters analysis

The shape and size of gold wire ball formation deeply affects the quality of wire bonding. It not only affects the bond-ability of the first bond (ball bond), but also affects the possibility of processing low loop height bonding for thin packaging [such as thin small outline package (TSOP) and thin quad flat package (TQFP)] and high input/output (I/O) fine pitch packaging such as ball grid array. The parameters which affect the gold wire ball formation include: 1) tail length left after second bond; 2) type and shape of capillaries used; 3) material characteristics of gold wire; 4) supplied voltage, current, and time of electrical flame-off (EFO) unit; 5) gap between tail and electrode plate; and 6) relative position between capillary and electrode plate. In this paper, experiments were conducted to find the effect of these parameters on ball formation. Taguchi method together with neural network is applied in this research to find the best parameters setting for gold wire ball formation. It can then be used for wire bonding process parameter adjustment and process monitoring. It can also be used as reference for the development of wire bonders.

Effect of geometric parameters on popcorn cracking in plastic packages during VPS process

Several thin quad flat packages (TQFPs) are analyzed for the evaluation of G, the energy release rate based on the interfacial fracture mechanics. The purposes of this study are; (i) to obtain the values of G as a function of the length of delamination (interfacial crack) and various geometric dimensions, (ii) to obtain the values of G for the package crack, which is believed to be the subsequent stage to the full delamination, and consequently (iii) to investigate quantitatively the effect of the various geometric dimensions on the popcorn cracking during vapor-phase soldering (VPS). Also the method to compute the phase angle (or mode mixity) for the interfacial crack is presented for several TQFPs. Due to the insufficient data for G c int, the question of whether the partial delamination for given a (delamination length or crack length) grows or not cannot be addressed. However, this can be used for the prediction of the popcorn cracking in the future study.

Study of delaminated plastic packages by high temperature Moire and finite element method

In the current study, 1200 l/mm gratings are replicated at elevated temperatures onto the cross sections of two delaminated plastic packages: a thin quad flatpack plastic package (TQFPP) and a power small outline plastic package (PSOPP). The specimens are measured at room temperature for thermal deformation induced by cooling process. The finite element models are used to simulate the cooling process and the results are compared with the Moire interferometry results. The finite element models with different delaminations between die and die attach are used to simulate the fringe patterns obtained from Moire interferometry. It was found that the delamination size can be estimated by the combination of Moire technique and finite element method. The finite element model, once verified, can then be used in making cost effective decisions in plastic packaging design and processing.

A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor

This paper describes a 160 MHz 500 mW 32 b StrongARM(R) microprocessor designed for low-power, low-cost applications. The chip implements the ARM(R) V4 instruction set and is bus compatible with earlier implementations. The pin interface runs at 3.3 V but the internal power supplies can vary from 1.5 to 2.2 V, providing various options to balance performance and power dissipation. At 160 MHz internal clock speed with a nominal Vdd of 1.65 V, it delivers 185 Dhrystone 2.1 MIPS while dissipating less than 450 mW. The range of operating points runs from 100 MHz at 1.65 V dissipating less than 300 mW to 200 MHz at 2.0 V for less than 900 mW. An on-chip PLL provides the internal clock based on a 3.68 MHz clock input. The chip contains 2.5 million transistors, 90% of which are in the two 16 kB caches. It is fabricated in a 0.35-/spl mu/m three-metal CMOS process with 0.35 V thresholds and 0.25 /spl mu/m effective channel lengths. The chip measures 7.8 mm/spl times/6.4 mm and is packaged in a 144-pin plastic thin quad flat pack (TQFP) package.

New developed of thin plastic package with high terminal counts

A small and thin quad flat package (QFP)-type plastic package for large-scale integrated (LSI) logic devices with high pin counts has been developed. The size of the package with 252 input and output pins is 17.3 mm by 17.3 mm, and the thickness is 1.52 mm. The pitch and the width of the leads are 0.25 and 0.1 mm, respectively. The main technologies for assembly of the package are tape automated bonding (TAB) interconnection technology, which has been developed for bonding of high-terminal-count LSIs, and the molding technology, which has also been developed for very small and thin plastic packages. The reliability of the package and the outer lead bonding of the package were evaluated, and it was confirmed that both the package and the bonding have no problem in the pressure cooker test (PCT), the temperature cycle test, and the high-temperature-storage test. >