Thin-film Transistors Research Articles

Brain-Computer Interfaces Using Flexible Electronics: An a-IGZO Front-End for Active ECoG Electrodes.

Brain-computer interfaces (BCIs) are evolving toward higher electrode count and fully implantable solutions, which require extremely low power densities (<15mW cm-2). To achieve this target, and allow for a large and scalable number of channels, flexible electronics can be used as a multiplexing interface. This work introduces an active analog front-end fabricated with amorphous Indium-Gallium-Zinx-Oxide (a-IGZO) Thin-Film Transistors (TFTs) on foil capable of active matrix multiplexing. The circuit achieves only 70nV per sqrt(Hz) input referred noise, consuming 46µW, or 3.5mW cm-2. It demonstrates for the first time in literature a flexible front-end with a noise efficiency factor comparable with Silicon solutions (NEF = 9.8), which is more than 10X lower compared to previously reported flexible front-ends. These results have been achieved using a modified bootstrap-load amplifier. The front end is tested by playing through it recordings obtained from a conventional BCI system. A gesture classification based on the flexible front-end outputs achieves 94% accuracy. Using a flexible active front end can improve the state-of-the-art in high channel count BCI systems by lowering the multiplexer noise and enabling larger areas of the brain to be monitored while reducing power density. Therefore, this work enables a new generation of high channel-count active BCI electrodegrids.

Flexible bezel‐less thin‐film transistor backplane with through‐plastic‐vias for seamless tiling

AbstractTiling with a variety of panel units is a promising approach to customizing displays in terms of size, shape, and aspect ratio. However, tiled displays with conventional panel units have a major drawback in that they suffer from noticeable seams due to the bezels of the panel units. Here, we demonstrate a flexible bezel‐less thin‐film transistor (TFT) backplane for seamless tiling. By using through‐plastic‐vias (TPVs) that penetrate an ultrathin polyimide (PI) film substrate, a bezel‐less backplane with an ultra‐narrow bezel width of 8 μm was realized, in which oxide TFTs in pixel circuits on the backplane are driven from the back side of the PI film substrate using three‐dimensional signal wires, which go through the TPVs. The resistance of a TPV was evaluated with a TPV chain with 1000 TPVs connected in series and was found to be as small as 1.3 Ω. Furthermore, the transfer characteristics of an oxide TFT in a test element group for a pixel circuit were evaluated from the back side of the PI film substrate. The TFT exhibited clear switching behavior with an on/off current ratio of more than 108 and a high mobility of 25 cm2/Vs, which are sufficient to drive light‐emitting devices.

Ultrasensitive ZnO-Nanorod-Structured Pressure Sensor by Integrating InSnZnO Thin-Film Transistor

Ultrasensitive ZnO-Nanorod-Structured Pressure Sensor by Integrating InSnZnO Thin-Film Transistor

High-Performance Perovskite Flat Panel X-Ray Imagers via Blade Coating.

Perovskite X-ray detectors are recognized as the most promising candidates for low-dose detectors due to their superior performance. However, it is still full of challenging in the fabrication of flat-panel X-ray imagers (FPXIs), primarily due to the absence of large area thick films that exhibit high uniformity and long-term performance stability. A general synthesis route is urgently needed to grow large-scale halide perovskite thick films directly on a pixeled thin-film transistor (TFT) backplane with high uniformity, closing the gap between the great potential of perovskite X-ray detectors and their entry into the market. In this work, an advanced precursor paste suitable for blade coating is developed to enable high-throughput manufacturing of FPXIs. Highly uniform perovskite films with a thickness of 300-micrometers are directly deposited onto pixeled TFT substrates by the blade-coating method using the above paste, which governs a stable dark current and minimal noise of the X-ray detectors. As a result, (BA)2(MA)9Pb10I31 perovskite X-ray detectors achieved a high sensitivity of 15200 µC Gyair -1 cm-2 and a limit of detection (LoD) of 26.8 nGyair s-1. Moreover, FPXIs with a spatial resolution of 0.95 lp mm-1 (0.475 lp pixel-1) are obtained, which exhibits negligible signal crosstalk and excellent X-ray imaging performance.

One Micrometer Channel Length, Coplanar Polycrystalline InGaO Thin Film Transistors Exhibiting 85 cm2 V−1 s−1 Mobility and Excellent Bias Stabilities by Using Offset Engineering

AbstractThe effect of N+ resistivity in the offset region, for ≈1 µm channel length coplanar, polycrystalline InGaO (PC‐IGO) thin‐film transistors (TFTs) is studied. The room temperature deposited amorphous IGO is solid phase crystallized at 450 °C. The PC‐IGO TFT exhibits a maximum effective field‐effect mobility (µFE) of ≈86.69 cm2 V−1 s−1, a threshold voltage of ≈1.5 V, and a subthreshold swing of ≈300 mV decade−1, with remarkable stability under bias and temperature stress. The offset length (Loff) is varied from 1 to 3 µm and their electrical performances are analyzed. Upon increasing the Loff from 1 to 3 µm, the on current (Ion) and the µFE drops from 50.31 to 17.72 µA and 85.40 to 67.64 cm2 V−1 s−1, respectively, which can be attributed to a greater voltage drop in the Loff, resulting in the reduction of effective VDS applied to the channel. Technology computer‐aided design simulations shows that at the sheet resistance of 14.5 Ω sq−1. in the N+ offset region, the Ion dependency disappears with the change in Loff, which is attributed to the negligible voltage drop. These results provide valuable insight into optimizing N+ doping, for high‐performance, short‐channel coplanar oxide TFTs.

A Study of Device Parameters Affecting the Current Error Rate in a Low-Temperature Polycrystalline Silicon Thin-Film Transistor Pixel Circuit for Active-Matrix Organic Light-Emitting Diode Display Applications

In active-matrix organic light-emitting diode (AMOLED) displays, conventional pixel circuits that compensate for the non-uniformity of the threshold voltage (VT) of low-temperature polycrystalline silicon thin-film transistors (TFTs) can hardly compensate for variations in other TFT parameters, such as carrier mobility (μ0), subthreshold swing (SS) and the various effects of parasitic capacitance. In recent high-resolution AMOLED displays, as the current required for OLED pixel driving decreases, the current error rate (CER) caused by the non-uniform TFT parameters increases. In this study, we analyzed the influence of each TFT parameter on the CER using SPICE simulation. Based on our analysis, the origin of the increased CER can be classified into two categories: the charging capability of driving TFT and the capacitive coupling effect of the switching TFT. The SS of the driving TFT and the parasitic capacitance of the switching TFT are major factors that affect the CER in terms of the charging capability and capacitive coupling effect, respectively. Our analysis results can be summarized as follows: The SS value of the driving TFT should be high, and its variation should be small to minimize the CER. The variation in the parasitic capacitance of the switching TFT possibly occurs due to long-term bias conditions, as well as process non-uniformity. Therefore, the stability of TFT should also be confirmed for the prevention of anomalous CER caused by long-term bias stress.

High-Temperature Stable Amorphous Sn-Rich InSnGaO Thin Films Fabricated Via Atomic Layer Deposition for Next-Generation Dynamic Random-Access Memory Applications.

Facile phase transitions and electrical degradation of amorphous oxide semiconductors due to a high thermal budget have significantly limited their dynamic random-access memory (DRAM) applications, which require high thermal stability at temperatures over 600 °C. In this paper, we report an amorphous In-Sn-Ga-O (ITGO) semiconductor fabricated via atomic layer deposition, which exhibits high-temperature (∼700 °C) phase stability with moderate electrical properties. The optimal Sn-rich ITGO composition (In/Sn/Ga = 25:58:17 at. %) represents a thermally stable amorphous phase with excellent Hall mobility (24.0 cm2/(V s)) above 600 °C. Various analytical and simulation methods reveal the role of Sn as an efficient amorphous stabilizer and enhancer of electron mobility in oxide semiconductors. A thin-film transistor with a 4.5 nm-thick ITGO channel demonstrates excellent field-effect mobility (7.7 cm2/(V s)) and reliability. Therefore, Sn-rich ITGO is a promising candidate for next-generation DRAM channels that require amorphous-phase stability at a high thermal budget.

Impact of deep and tail trap states on the electrical performance of double-gate ZnO thin film transistors

Abstract Traps in ZnO thin film transistors (TFTs) affect the electrical characteristics of the device. Traps originate primarily due to the disordered nature of the deposited semiconductor channel or are present at the ZnO and gate-dielectric interface. This work studies the effect of traps in double-gate ZnO TFTs using technology computer-aided design. The grain boundary and interface traps are assumed to be localized at the ZnO/SiO2 interface and are defined within the energy bandgap of ZnO using a double-exponential function. The traps are assumed to be of the acceptor type. The concentration of tail states is assumed to be 103 times more than in the deep state, while the characteristic temperature of deep state traps is assumed to be higher than the tail states. In common mode operation (i.e. both top and bottom gates are shorted), the tail states dominate the device characteristic compared with the deep state, while in independent mode (i.e. both gates are biased independently) the deep state traps affect the device characteristics more than the tail states.

Investigation of the electrical performance and carrier transport mechanism for heterostructured bilayer In2O3/InGaSnO thin-film transistors

In this study, InGaSnO (IGTO)-based bilayer In2O3/IGTO and IGTO/In2O3 thin-film transistors (TFTs) were designed, and their carrier transport mechanisms and electrical performances were investigated. Herein, the ultrathin In2O3 layer provided a higher carrier concentration (Ne), thus accumulating free carriers and enhancing the carrier mobility. The thick amorphous IGTO layer controlled the device and carrier conductance, yielding a reasonable threshold voltage (Vth). Consequently, the optimized bilayer In2O3/IGTO TFTs exhibited high field-effect mobility (μFE) of 43.6 cm2 V−1s−1 and good control with Vth of 1.2 V compared to the single layer In2O3 and IGTO TFTs. Experimental analysis indicated a decrease in the oxygen vacancy (VO) formation energy owing to the interaction between interstitial Ini and Sn. Consequently, numerous unpaired electrons were generated from VO at the hetero-interfaces. In addition, an analysis of the energy band shift indicated that the heterojunction generated parasitic channels to control the Ne, and the In2O3/IGTO TFT exhibited a smaller Rc (0.34 KΩ μm), which enhanced the μFE of TFTs. Overall, the high-performance bilayer In2O3/IGTO TFTs fabricated herein have significant potential for applications in thin-film electronics.

Influence of radio-frequency magnetron sputtering power on electrical characteristics and positive bias stress stability of indium tin zinc oxide thin-film transistors

Abstract As the pursuit of high-quality display panels intensifies, the importance of high-performance thin-film transistors (TFTs) becomes increasingly prominent. Indium tin zinc oxide (ITZO) TFTs, as one of the promising directions for high-performance metal oxide TFTs, impose high demands on their performance and reliability. In this study, the performance and stability of ITZO TFTs fabricated under different radio-frequency magnetron sputtering power conditions were systematically tested and investigated. After sputtering power optimization, the field effect mobility of ITZO TFTs reaches 29.68 cm²/V·s, with a steep sub-threshold swing of 0.17 V/decade, near-zero threshold voltage, and good stability. Using atomic force microscopy and X-ray photoelectron spectroscopy characterization techniques, the thin films were analyzed to elucidate the relationship between sputtering power variations and oxygen vacancies.

Large Scale Lead-Free Perovskite Polycrystalline Wafer Achieved by Hot-Pressed Strategy for High-Performance X-Ray Detection.

Halide perovskites (HPs) have demonstrated excellent direct X-ray detection performance. Lead-free perovskite polycrystalline wafers have outstanding advantages in large-area X-ray imaging applications due to their area-scalability, thickness-controllability, large bulk resistivity, and ease of integration with large-area thin film transistor arrays. However, currently lead-free perovskite polycrystalline wafers possess low sensitivity, typically less than 1000 µC Gy-1 cm-2, which severely limits their X-ray detection applications. Here, high-quality and large scale polycrystalline wafers of AG3Bi2I9 (AG: aminoguanidinium) with short intercluster distances are successfully prepared using a hot-pressing method. The wafers possess high mobility-lifetime product of 5.66 × 10-3 cm2 V-1 and therefore achieve high X-ray sensitivity of 2675 µC Gy-1 cm-2, which can be comparable to those of the high-quality single crystal counterpart reported by the previous research (7.94 × 10-3 cm2 V-1 and 5791 µC Gy-1 cm-2), and represent the best results of the currently lead-free HP polycrystalline wafers. Besides, the wafers exhibit the X-ray detection limit as low as 11.8 nGy s-1, excellent long-term working stability, and high spatial resolution of 5.9 lp mm-1 in imaging. The findings demonstrate that AG3Bi2I9 polycrystalline wafers are feasible for high-performance X-ray detection and imaging system.

Inkjet printing of sustainable ZTO/AlOx thin film transistors

Abstract Even though printed metal oxide thin film transistors (TFTs) have been a central topic of research in the past decade, the most notable results still require scarce elements such as gallium and indium, or high annealing temperatures (≥ 400 °C) when used non-critical raw materials such as zinc and tin.&amp;#xD;In this work, safe, abundant and inexpensive materials such as zinc, tin and aluminum are explored to reach low-cost thin films and devices with both the semiconductor and dielectric layers deposited by inkjet printing and annealed at lower temperatures (300 °C). Alumina (AlOx) and zinc tin oxide (ZTO) inks containing a theoretical optimal V% of ethylene glycol (EG) were optimized for production of uniform and reproducible AlOx/ZTO thin film layers. Common ink parameters (such as the reverse Ohnesorge, capillary, Webber and Reynolds numbers) were evaluated and compared with relevant literature on inkjet drop formation mechanisms. Inks within theoretical optimal parameter values were printing optimized in terms of drops per inch, number of layers, UV substrate surface activation, print speed, and post annealing. A high-quality dielectric of two alumina layers was printed, having a breakdown field above 2.93 ± 0.33 MV.cm-1, and a dielectric constant of 7.74 ± 0.73 at 1 kHz. Thin film transistors (TFTs) of inkjet printed (IJP) ZTO/AlOx layers were produced with a maximum IOn/IOff ratio of 103 and a saturation mobility of 2.2 cm2.V-1.s‑1. This approach not only advances the field of printed electronics but also addresses concerns related to material scarcity, thermal budget, and production costs.&amp;#xD;

P-type ZnO:N thin films deposited at room temperature on different substrates for p-channel Thin Film Transistor fabrication

A series of ZnO:N thin films were deposited by means of reactive pulsed laser deposition at room temperature on SiO2 glass slides, quartz, Al2O3, polyimide, silicon, and thermally oxidized SiO2. The p-type conductivity was confirmed by Hall effect-Van der Pauw measurements, with electrical parameters varying depending on the substrate deposition as follow: hole concentration between 2.4×1018 - 3.8×1017 cm-3, resistivity between 0.5 - 4 Ωcm, and mobility between 2 - 8 cm2V-1s-1. In situ X-ray photoelectron spectroscopy revealed identical binding energy values of the ZnO:N thin films across all substrates; the relative atomic concentrations varied between 49-53.8 at.%, 44-49 at.% and 2-2.4 at.% for zinc, oxygen and nitrogen respectively, due to over-quantification related to zinc particle splashing. Scanning electron microscopy confirmed a surface roughness of the films below 2 nm. Several wide and defect-related emissions were found by Cathodoluminescence; but the film deposited on quartz exhibited a unique, intense, and narrow blue band, the deconvolution of which revealed peaks at wavelengths of 430 nm and 461 nm. A growth rate of 14 nm/hour, and an etching rate of 2 nm/sec were found; these parameters were confirmed with the fabrication of smooth-walled ZnO:N thin films microstructures using photolithography. Finally, Thin Film Transistors (TFT) were fabricated. The devices exhibited low, but clear field effect current amplification, with a Ion/Ioff = 10. The feasibility of using room-temperature deposited p-type ZnO:N thin films for p-channel TFT fabrication was demonstrated.

Epitaxial films and devices of transparent conducting oxides: La:BaSnO3

This paper reviews recent developments in materials science and device physics of high-quality epitaxial films of the transparent perovskite La-doped barium stannate, La:BaSnO3. It presents current efforts in the synthesis science of epitaxial La:BaSnO3 films for achieving reduced defect densities and high electron mobility at room temperature. We discuss the scattering mechanisms and the route toward engineering defect-free epitaxial La:BaSnO3 heterostructures. By combining chemical surface characterization and electronic transport studies, special emphasis is laid on the proper correlation between the transport properties and the electronic band structure of La:BaSnO3 films and heterostructures. For application purposes, interesting optical properties of La:BaSnO3 films are discussed. Finally, for their potential application in oxide electronics, an overview of current progress in the fabrication of La:BaSnO3-based thin-film field-effect transistors is presented together with recent progress in the fundamental realization of two-dimensional electron gases with high electron mobility in La:BaSnO3-based heterostructures. Future experimental studies to reveal the potential deployment of La:BaSnO3 films in optoelectronic and transparent electronics are also discussed.

Bottom-Gate Poly-Si Thin Film Transistors Fabricated by Blue Laser Diode Annealing and Their Reliability Under DC and AC Bias Stresses

Bottom-Gate Poly-Si Thin Film Transistors Fabricated by Blue Laser Diode Annealing and Their Reliability Under DC and AC Bias Stresses

Uniformity and Reliability of Enhancement-Mode Polycrystalline Indium Oxide Thin Film Transistors Formed by Solid-Phase Crystallization

Uniformity and Reliability of Enhancement-Mode Polycrystalline Indium Oxide Thin Film Transistors Formed by Solid-Phase Crystallization

Application of Solution-Processed High-Entropy Metal Oxide Dielectric Layers with High Dielectric Constant and Wide Bandgap in Thin-Film Transistors

High-k metal oxides are gradually replacing the traditional SiO2 dielectric layer in the new generation of electronic devices. In this paper, we report the production of five-element high entropy metal oxides (HEMOs) dielectric films by solution method and analyzed the role of each metal oxide in the system by characterizing the film properties. On this basis, we found optimal combination of (AlGaTiYZr)Ox with the best dielectric properties, exhibiting a low leakage current of 1.2 × 10−8 A/cm2 @1 MV/cm and a high dielectric constant, while the film’s visible transmittance is more than 90%. Based on the results of factor analysis, we increased the dielectric constant up to 52.74 by increasing the proportion of TiO2 in the HEMOs and maintained a large optical bandgap (&gt;5 eV). We prepared thin film transistors (TFTs) based on an (AlGaTiYZr)Ox dielectric layer and an InGaZnOx (IGZO) active layer, and the devices exhibit a mobility of 18.2 cm2/Vs, a threshold voltage (Vth) of −0.203 V, and an subthreshold swing (SS) of 0.288 V/dec, along with a minimal hysteresis, which suggests a good prospect of applying HEMOs to TFTs. It can be seen that the HEMOs dielectric films prepared based on the solution method can combine the advantages of various high-k dielectrics to obtain better film properties. Moreover, HEMOs dielectric films have the advantages of simple processing, low-temperature preparation, and low cost, which are expected to be widely used as dielectric layers in new flexible, transparent, and high-performance electronic devices in the future.

Water-Borne Fluorinated Polyimide Dielectric for Large-Area IGZO Transistors and Logic Gates.

Thin-film transistors offer excellent and uniform electrical properties over large areas, making them a promising option for various future electronic devices. Polyimide dielectrics are already widely used in various electronic devices because of their exceptional dielectric properties, thermal stability, and desirable mechanical flexibility, which make them suitable for harsh environments. However, the current research on polyimide dielectric materials has certain limitations, such as the use of toxic solvents, high-temperature processes, and deficient coating properties. Herein, we introduce an aromatic polyimide dielectric, which exhibits excellent electrical properties even when processed at a low temperature of 250 °C using environmentally friendly water-based "one-step" polymerization. Despite its thin thickness of <200 nm, the water-borne fluorinated polyimide dielectric material demonstrates stable insulating properties over a wide range of electric fields and achieves a high breakdown voltage of over 4.5 MV cm-1. Furthermore, we successfully achieved a large-area coating of uniform dielectric layers with no pinholes using only water as a solvent and a simple solution process without any additional processing steps. These results demonstrate that the water-borne polyimide gated indium-gallium-zinc oxide transistor exhibits excellent and stable device performance. Moreover, we used the transistor to successfully demonstrate various logic gates (NOT, NAND, and NOR). Overall, this study provides guidelines for the eco-friendly and sustainable use of water-borne polyimide dielectric materials with high electrical performance and large-processing window advantages.

Thermopower modulation analyses of effective channel thickness for Zn-incorporated In2O3-based thin-film transistors

Abstract Zn-incorporated In2O3 (IZO) thin-film transistors (TFTs) show high field-effect mobility (µFE ~40 cm2 V−1 s−1) when the IZO channel is amorphous, whereas a lower µFE (~10 cm2 V−1 s−1) is observed with polycrystalline channel. The reasons behind this difference in µFE remain unclear despite various studies on IZO TFTs. Here, we perform electric field thermopower modulation analysis on amorphous and polycrystalline IZO TFTs to measure the change in effective thickness. For amorphous channel, the effective thickness was zero when the effective gate voltage (Vg−Vth, Vg: gate voltage, Vth: threshold voltage) was zero. Furthermore, it gradually increased with Vg−Vth up to 1.6 nm, reflecting that conduction band bending occurred. By contrast, polycrystalline channel showed an initial effective thickness of 5 nm (≈ film thickness of IZO) and sharply decreased to ~1.7 nm. In amorphous channels, electron transport followed field effect theory, while factors like grain boundaries limited transport in polycrystalline channels.

Effect of an Electrical Field Applied to the Metal Capping Layer on the Electrical Properties of SiZnSnO Thin‐Film Transistors for Touch Sensor Application

Thin‐film transistors (TFTs) have been studied for their high mobility and stability to facilitate the development of TFT‐based touch sensors and electronic devices. A metal capping (MC) layer on the back channel of Si–Zn–Sn–O(SZTO) TFTs has been proposed to improve the electrical properties. MC, when adopted on the channel layer, has low resistance, leading to an improvement in the mobility of the TFT. The mobility of Ti/Al MC TFT has improved from 20.7 to 37.9 cm2 V−1 s compared to the pristine TFTs. Applying a potential voltage to the MC layer sensitively modulates the I–V characteristics of the TFT. The present study applies a voltage of 60 mV, similar to that of the human body, to MC‐TFTs to explore their possibilities as human touch sensors. The sensitivity and the energy bandgap modulation are also discussed.