Thin-film Transistors Research Articles

Heterogeneous monolithic 3D integration for hybrid vertical CMOS inverter using n-type IGTO TFT on p-type Si FET

In this work, a complementary metal oxide semiconductor (CMOS) vertical inverter using heterogeneous monolithic 3D (M3D) integration with p-type Si field-effect transistor (FET) and n-type indium-gallium-tin-oxide (IGTO) thin film transistor (TFT) was implemented and characterized. This CMOS inverter was attained by vertical stacking n-type IGTO TFT on p-type Si FET. Oxide semiconductor materials such as indium-gallium-zinc-oxide (IGZO), indium-tungsten-oxide (IWO), indium oxide (In2O3) and IGTO are being considered as potential options for channel materials in M3D integration technology due to high electrical characteristics and low temperature process. Among them, IGTO was employed as a channel material to achieve high mobility. We fabricated a n-type IGTO TFT using HfO2 and tungsten as a gate dielectric and electrode, respectively. The post-annealing process was conducted at 200–500 °C with 50 °C intervals. The IGTO TFT exhibits a high field-effect mobility (32.9 cm2/Vs), low sub-threshold swing (0.070 V/dec) and stable reliability behaviour (ΔVth < 0.4 V) against various external gate bias temperature stress tests in a low temperature (<500 °C). The stable heterogeneous vertical inverter performance such as voltage-transfer curve (VM = 1.66 V), voltage gain (30.1 V at VDD = 3 V), and noise margin (NMH = 1.22 V, NML = 1.34 V) were well behaved. This M3D integration-based hybrid CMOS inverter can be an alternative knob toward various device applications.

Sensing Interfaces Engineering for Organic Thin Film Transistors-Based Biosensors: Opportunities and Challenges.

Organic thin film transistors (OTFTs) enable rapid and label-free high-sensitivity detection of target analytes due to their low cost, large-area processing, biocompatibility, and inherent signal amplification. At the same time, the freedom of synthesis, tailorability, and functionalization of organic semiconductor materials and their ability to be combined with flexible substrates make them one of the ideal platforms for biosensing. However, OTFTs-based biosensors still face significant challenges, such as unexpected surface adsorption, disordered conformation, inhomogeneous graft density, and flexibility of probe molecules that biological sensing probes would face during immobilization. In this review, efficient immobilization strategies based on OTFTs biological sensing probes developed in the last 5 years are highlighted. First, the biosensors are classified according to their sensing interface. Second, a comprehensive discussion of the types of biological sensing probes is presented. Third, three commonly used methods for immobilizing biological sensing probes and their challenges are briefly described. Finally, the applications of OTFTs-based biosensors for liquid phase detection are summarized. This review provides a comprehensive and timely review of optimization in sensing interface engineering so that efficient immobilization of biological sensing probes with sensing interfaces will contribute to the development of high-performance OTFTs-based biosensors.

Hybrid System of Polystyrene and Semiconductor for Organic Electronic Applications

While organic semiconductors hold significant promise for the development of flexible, lightweight electronic devices such as organic thin-film transistors (OTFTs), photodetectors, and gas sensors, their widespread application is often limited by intrinsic challenges. In this article, we first review these challenges in organic electronics, including low charge carrier mobility, susceptibility to environmental degradation, difficulties in achieving uniform film morphology and crystallinity, as well as issues related to poor interface quality, scalability, and reproducibility that further hinder their commercial viability. Next, we focus on reviewing the hybrid system comprising an organic semiconductor and polystyrene (PS) to address these challenges. By examining the interactions of PS as a polymer additive with several benchmark semiconductors such as pentacene, rubrene, 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS pentacene), 2,8-difluoro-5,11-bis(triethylsilylethynyl) anthradithiophene (diF-TES-ADT), and 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT), we showcase the versatility of PS in enhancing the crystallization, thin film morphology, phase segregation, and electrical performance of organic semiconductor devices. This review aims to highlight the potential of an organic semiconductor/PS hybrid system to overcome key challenges in organic electronics, thereby paving the way for the broader adoption of organic semiconductors in next-generation electronic devices.

Enhanced electrical performance and stability of solution-processed oxide semiconductor thin-film transistors via an incorporation of deionized water oxidizer

Solution-processed amorphous oxide semiconductor thin films contain poor metal-oxygen-metal (M-O-M) networks and numerous impurities, making it difficult to manufacture high-performance semiconductor devices with excellent stability. In this study, we enhance the electrical performance and device stability of solution-processed oxide thin-film transistors (TFTs) by incorporating water molecular oxidants. In solution, a water molecule can be easily incorporated by adding deionized water (DW) to the precursor solution. The DW-incorporated precursor solutions induced the production of oxide semiconductor thin films with improved M-O-M networks and fewer defect states. Therefore, compared to conventional case, the DW-incorporated indium zinc oxide (InZnO) TFT showed improved device performances and significantly reduced changes of threshold voltage under positive gate bias stress and negative gate bias/illumination stress conditions. This approach of incorporating DW into the precursor solutions provides a promising route for fabricating high-quality amorphous semiconductor films and transistor devices.

On the importance of crystal structures for organic thin film transistors.

Historically, knowledge of the molecular packing within the crystal structures of organic semiconductors has been instrumental in understanding their solid-state electronic properties. Nowadays, crystal structures are thus becoming increasingly important for enabling engineering properties, understanding polymorphism in bulk and in thin films, exploring dynamics and elucidating phase-transition mechanisms. This review article introduces the most salient and recent results of the field.

Low Contact Resistance via Quantum Well Structure in Amorphous InMoO Thin Film Transistors

The amorphous oxide semiconductor (AOS) thin film transistor (TFT) shows promise for use in advanced integrated circuits, such as 2T0C dynamic random-access memory, due to its excellent electronic performance and ability to be fabricated at low temperatures. Nevertheless, the high contact resistance between the metal and AOS restricts the applicability of AOS-TFT. This study demonstrates the achievement of a reduced contact resistance in InMoO (IMO) transistors by using a MoOx interlayer during fabrication. Increasing the oxygen concentration alters the band structure of MoOx and creates a graded Mo-MoOx-IMO structure with a pronounced quantum well at the interlayer between the metal and channel. Consequently, the quantum well’s ability to attract electrons and shape the band edge suppresses the Fermi-level pinning effect, ultimately leading to the establishment of an ohmic contact. The optimized MoOx interlayer showed a significant improvement in contact resistance (∼400%) through the adjustment of oxygen content during annealing procedures. This finding suggests that it is an attractive approach to provide excellent source/drain contacts in future ultra-scaled amorphous oxide semiconductor thin-films.

A bioinspired tactile scanner for computer haptics

Computer haptics (CH) is about integration of tactile sensation and rendering in Metaverse. However, unlike computer vision (CV) where both hardware infrastructure and software programs are well developed, a generic tactile data capturing device that serves the same role as what a camera does for CV, is missing. Bioinspired by electrophysiological processes in human tactile somatosensory nervous system, here we propose a tactile scanner along with a neuromorphically-engineered system, in which a closed-loop tactile acquisition and rendering (re-creation) are preliminarily achieved. Based on the architecture of afferent nerves and intelligent functions of mechano-gating and leaky integrate-and-fire models, such a tactile scanner is designed and developed by using piezoelectric transducers as axon neurons and thin film transistor (TFT)-based neuromorphic circuits to mimic synaptic behaviours and neural functions. As an example, the neuron-like tactile information of surface textures is captured and further used to render the texture friction of a virtual surface for “recreating” a “true” feeling of touch.

Hot Carrier Degradation Reduction in Metal Oxide Thin-Film Transistors by Implementing a Lightly Doped Drain-Like Structure

Hot Carrier Degradation Reduction in Metal Oxide Thin-Film Transistors by Implementing a Lightly Doped Drain-Like Structure

Pixel Circuit Design for X-ray Detection Utilizing a-IGZO Thin-Film Transistors

Abstract In recent advancements, X-ray detectors have made significant progress. Active pixel sensors exhibit superior Signal-to-Noise Ratio (SNR) compared to passive counterparts. The conventional pixel circuit for X-ray detectors has three transistors and one capacitor. We focused on simplifying this pixel to enhance resolution. Our research introduces and verifies a novel pixel circuit developed for high-resolution X-ray detectors. The proposed pixel circuit is composed by two n-type thin-film transistors and one capacitor. It requires two scan pulses and three operational stages. This structure can effectively reduce the component area of the pixel circuit. We designed RPI LEVEL = 35 amorphous TFT model and simulated for verify our proposed pixel circuit. In results, proposed pixel circuit successfully operated and shows 2.5 μV when the equivalent resistance of detector (RDetector) is 10 MΩ, and 8.38 V when RDetector is 1 MΩ. To minimize the harmful effects of X-ray exposure, reducing the dosage is essential. Sensitivity and low noise are crucial factors, and the proposed circuit offers a compact design, increased sensitivity, and higher output voltage.

Enhanced NBIS Stability of Oxide Thin-Film Transistors by Using Terbium-Incorporated Alumina

Enhanced NBIS Stability of Oxide Thin-Film Transistors by Using Terbium-Incorporated Alumina

Quantitative Insight of Annealing Atmosphere-Induced Device Performance and Bias Stability in a Ga-Doped InZnSnO Thin-Film Transistors

Quantitative Insight of Annealing Atmosphere-Induced Device Performance and Bias Stability in a Ga-Doped InZnSnO Thin-Film Transistors

Improved Stability of BEOL-Compatible Highly Scaled Ultrathin InZnO Channel Ferroelectric Thin-Film Transistor With TiO₂ Interfacial Layer

Improved Stability of BEOL-Compatible Highly Scaled Ultrathin InZnO Channel Ferroelectric Thin-Film Transistor With TiO₂ Interfacial Layer

Polycrystalline-Silicon CMOS Thin-Film Transistors With T-Shaped Gate and Lightly Doped Drain

Polycrystalline-Silicon CMOS Thin-Film Transistors With T-Shaped Gate and Lightly Doped Drain

Emulating Low-Power Synaptic Plasticity in a Solution-Processed Oxide-Based Long Retention Memory Transistor with High Learning Accuracy.

The exploration of synaptic plasticity in metal-oxide-based ferroelectric thin-film transistors has been limited. As a perovskite ferroelectric material, LiNbO3 is widely studied; but its potential use as a neuromorphic device, like synaptic transistors, has not been realized. In this study, a solution-processed ferroelectric thin-film transistor (FeTFT) with an alternating layer of LiNbO3 and Li5AlO4 as a gate dielectric has been fabricated. This configuration reduces the depolarization field by leveraging the large ionic polarization of Li+ ions in the Li5AlO4 layer, while the wide bandgap helps mitigate the leakage current. FeTFT exhibits impressive transistor performance, including a saturation mobility of 0.478 cm2V-1 s-1, an on/off ratio of 3.08 × 103, and a low trap-state density of 1.3 × 1013 cm-2. Moreover, the device demonstrates good memory retention, retaining information for nearly 1 day. It successfully emulates synaptic plasticity, specifically short-term plasticity and long-term plasticity. Besides, a 94% training accuracy has been achieved through artificial neural network simulation. Notably, the FeTFT consumes minimal power, with energy consumption of approximately 3.09 nJ per synaptic event, which is remarkably low compared to other reported solution-processed FeTFT devices.

Engineering the Template Layer for Silicon Phthalocyanine‐Based Organic Thin Film Transistors

Engineering the Template Layer for Silicon Phthalocyanine‐Based Organic Thin Film Transistors

Development of high on/off current ratio in p-type copper oxide thin-film transistors with a back-end-of-line compatible process

Development of high on/off current ratio in p-type copper oxide thin-film transistors with a back-end-of-line compatible process

Solution-processed high-k photopatternable polymers for low-voltage electronics.

High dielectric constant (k) polymers have been widely explored for flexible, low-power-consumption electronic devices. In this work, solution-processable high-k polymers were designed and synthesized by ultraviolet (UV) triggered crosslinking at a low temperature (60 °C). The highly crosslinked network allows for high resistance to organic solvents and high breakdown strength over 2 MV cm-1. The UV-crosslinking capability of the polymers enables them to achieve a high-resolution pattern with a feature size down to 1 μm. Further investigation suggests that the polar cyano pendants in side chains are responsible for increasing the dielectric constant up to 10 in a large-area device array, thereby contributing to a low driving voltage of 5 V and high field-effect mobility exceeding 20 cm2 V-1 s-1 in indium gallium zinc oxide (IGZO) thin-film transistors (TFTs). In addition, the solution-processable high-k dielectric polymers were utilized to fabricate flexible low-voltage organic TFTs, which show highly reliable and reproducible mechanical stability at a bending radius of 5 mm after 1000 cycles. And also, the high radiation stability of the dielectric polymers was observed in a UV-sensitive TFT device, thereby achieving highly reproducible pattern recognition, which is promising for artificial optic nerve circuits.

Wafer-Scale Transfer of MXene Films with Enhanced Device Performance via 2D Liquid Intercalation.

Wafer-scale transfer processes of 2D materials significantly expand their application space in scalable microelectronic devices with excellent and tunable properties through van der Waals (vdW) stacking. Unlike many 2D materials, wafer-scale transfer of MXene films for vdW contact engineering has not yet been reported. With their rich surface chemistry and tunable properties, the transfer of MXenes can enable enormous possibilities in electronic devices using interface engineering. Taking advantage of the MXene hydrophilic surface, a straightforward, green, and fast process for the transfer of MXene films at the wafer scale (4-inch) is developed. Uniform vdW stacking of several types of large-area heterojunctions including MXene/MXene (Ti3C2Tx, Nb2CTx, and V2CTx), MXene/MoS2, and MXene/Au is further demonstrated. Multilayer support is applied to minimize damage or deformation in the transfer process of patterned Ti3C2Tx film. It allows us to fabricate thin film transistors and manipulate the MXene/MoS2 interface through the intercalation of various 2D liquids. Particularly noteworthy is the significant enhancement of the interfacial carrier transfer efficiency by ≈2 orders of magnitude using hydrogen iodide (HI) intercalation. This finding indicates a wide range of possibilities for interface engineering by transferring MXene films and employing liquid-assisted interfacial intercalation.

Viable Approach of Tuning Oxide Semiconductor Thin Films in Solution‐Processed Heterojunction Thin Films Transistors for Both Higher Performances and Stability

AbstractMetal‐oxide thin‐film transistors (TFTs) have garnered much attention because of their advantages such as high transparency, low leakage current, and low processing temperature. However, there is a need to continuously improve their mobility and bias stability for application to next‐generation advanced electronics. In this study, the thickness of bilayer semiconductors is finely controlled to enhance the charge transport characteristics and bias stability in solution‐processed heterojunction oxide TFTs. The thicknesses of the top and bottom layers in the bilayer are individually adjusted by controlling solution molarity. The introduction of a bilayer channel improved the electrical performance of oxide TFTs via effective charge transport. However, trap‐limited conduction becomes dominant in the bilayer with an excessively thick top layer, thereby leading to a significant reduction in mobility and positive bias stability. Meanwhile, although increasing the bottom layer thickness contributes to improved mobility and reliability, it causes a serious negative shift in threshold voltage (VTH). TFTs with an optimized bilayer structure show high mobility at a VTH close to 0 V and have particularly excellent positive bias stress stability. This study on bilayer channel thickness will be beneficial for developing advanced transistors with optimized bilayer or multilayer channels.

Artificial synapse based on low-voltage Ni-doped CuI thin-film transistors for neuromorphic application

Inspired by the human brain's capacity as a powerful biological computer capable of simultaneously processing a vast array of cognitive tasks, many emerging artificial synapse devices have been developed in recent years. Electric-double-layer (EDL) transistors based on interfacial ion-modulation have attracted widespread attention for simulating synaptic plasticity and neural functions. Here, low-voltage EDL p-type thin-film transistors (TFTs) are fabricated on glass substrates, with Ni-doped cuprous iodide (Ni0.06Cu0.94I) as the channel and chitosan as the dielectric. The electrical performance of the Ni0.06Cu0.94I TFTs is investigated: current on/off ratio of 6.4 × 104, subthreshold swing of 33 mV/dec, threshold voltage of 1.38 V, operating voltage of 2 V, and saturation field-effect mobility of 15.75 cm2 V−1 s−1. A dual in-plane gate OR logic operation is demonstrated. Importantly, by applying single voltage pulses, dual voltage pulses, and multiple voltage pulses to the gate, the Ni0.06Cu0.94I transistors exhibited typical synaptic characteristics, including short-term potentiation, short-term depression, long-term potentiation, long-term depression, paired-pulse facilitation, and spiking-rate-dependent plasticity. Furthermore, the synaptic transistor can also simulate the learning–forgetting–relearning process of the human brain. These remarkable behaviors of voltage-stimulated synaptic transistors have potential for neuromorphic applications in future artificial systems.