Thermal Pad Research Articles

Modular Heat Sinks for Enhanced Thermal Management of Electronics

Abstract Power electronics are vital for the generation, conversion, transmission, and distribution of electrical energy. Improving the efficiency, power density, and reliability of power electronics is an important challenge that can be addressed with electrothermal codesign and optimization. Current thermal management approaches utilize metallic heat sinks (HSs), resulting in parasitic load generation due to different potentials between electronic components on the printed circuit board (PCB). To enable electrical isolation, a thermal interface material (TIM) or gap pad is placed between the PCB and HS, resulting in poor heat transfer. Here, we develop an approach to eliminate TIMs and gap pads through modularization of metallic HSs. The use of smaller modular heat sinks (MHSs) strategically placed on high power dissipation areas of the PCB enables elimination of electrical potential difference, and removal of electrical isolation materials, resulting in better cooling performance due to direct contact between devices and the HS. By studying a gallium nitride (GaN) 2 kW DC–DC power converter as a test platform for electrothermal codesign using the modular approach, and benchmarking performance with a commercial off-the-shelf HS design, we showed identical power dissipation rates with a 54% reduction in HS volume and a 8 °C reduction in maximum GaN device temperature. In addition to thermal performance improvement, the MHS design showed a 73% increase in specific power density with a 22% increase in volumetric power density.

In‐situ graphene alignment in self‐sealing stretchable films for efficient thermal interface materials

AbstractAlthough graphene nanoplatelets (GnPs) and carbon nanotubes (CNTs) are known to have demonstrated significant potential as functional fillers to improve the electrical and thermal properties of polymers, aside from the state of dispersion, the level of improvement has been found to be strongly correlated with the in situ orientation. However, achieving in situ orientation within a polymer presents significant technological challenges. In this paper, we show a simple and repeatable thermoforming process to fabricate high thermal conductive GnP nanocomposite pads using a self‐sealing stretchable film (parafilm, PF). The pads could be sliced and reoriented into vertical stacks and fused into new pads due to self‐sealing nature of PF. Hybrids pads were also constructed with MWCNTs. Vertically aligned hybrids featured thermal conductivities close to 6 W mK‐1 that could be effectively modeled by Maxwell‐Garnett (MG‐EMA) theory. Vertical alignment also improved bulk (volume) electrical conductivity to 0.1 S cm‐1. Moreover, MWCNTs have exceedingly enhanced the ductility and elongation at break values of GnP nanocomposites that justified their incorporation into the nanocomposites. These hybrids can be easily adapted to various thermal management applications either in the form of freestanding thick pads (1‐3 mm) or thermal coatings due to the self‐sealing nature of the matrix.

Precise measurement of junction temperature by thermal analysis of light-emitting diode operated at high environmental temperature

Light-emitting diodes (LEDs) have become a promising solid-state light source in numerous applications. During operation, they are often exposed to high environmental temperatures, resulting in performance and reliability degradation. It is thus important to monitor the temperature at the junction, which is a primary lighting and heat source, especially for an LED operated under a high-temperature environment. In this study, the temperatures at the junction, phosphor, and thermal pad of the LED operated at high temperatures (up to 107.2 °C) are measured and analyzed. The junction temperature is measured by a transient thermal tester at known environmental temperatures and input currents. Moreover, the temperatures at the phosphor and thermal pad are simultaneously measured by using an infrared (IR) thermometer and a thermocouple, respectively. A single highly linear temperature correlation (R2 = 0.997) is found between the junction and phosphor temperatures regardless of the operating conditions. This could aid in precisely estimating the junction temperature by simply measuring the surface temperature of phosphor. On the other hand, the correlation between the junction and thermal pad temperature that is often treated as a single correlation exhibits dependence on the input current over the tested temperature range. The structural thermal analysis on the thermal resistance of the LED package supports the experimental results along with the numerical analysis. The obtained results in this study could provide a set of guidelines for the precise prediction of junction temperature and thermal management of LEDs, which are operated under high-temperature environments.

Influence of a Thermal Pad on Selected Parameters of Power LEDs

This paper is devoted to the analysis of the influence of thermal pads on electric, optical, and thermal parameters of power LEDs. Measurements of parameters, such as thermal resistance, optical efficiency, and optical power, were performed for selected types of power LEDs operating with a thermal pad and without it at different values of the diode forward current and temperature of the cold plate. First, the measurement set-up used in the paper is described in detail. Then, the measurement results obtained for both considered manners of power LED assembly are compared. Some characteristics that illustrate the influence of forward current and temperature of the cold plate on electric, thermal, and optical properties of the tested devices are presented and discussed. It is shown that the use of the thermal pad makes it possible to achieve more advantageous values of operating parameters of the considered semiconductor devices at lower values of their junction temperature, which guarantees an increase in their lifetime.

Development of High Thermally Conductive Die Attach for TIM Applications

Abstract High-power semiconductor applications require a thermal interface die attach material with high thermal conductivity to efficiently release the heat generated from these devices. Current thermal interface material solutions such as thermal grease, thermal pads, and silicones have been industry standards, however may fall short in performance for high-temperature or high-power applications. This article focuses on development of a cutting-edge die attach solution for thermal interface management, focusing on fusion-type epoxy-based Ag adhesive with an extremely low storage modulus and the thermal conductivity reaching up to 30 W/mK, and also very low-modulus, low-temperature pressureless sintering silver die attach with a thermal conductivity of 70 W/mK.

Ultralight covalently interconnected silicon carbide aerofoam for high performance thermally conductive epoxy composites

With the development of highly integrated electronic devices, there are growing demands for high performance thermal management materials with high thermal conductivity and electrical insulation. Herein, we report thermal properties of epoxy-based SiC aerofoam composites. A novel three-dimensional structure of covalently interconnected porous SiC (3D-SiC) aerofoam is successfully fabricated using 3D reduced graphene oxide foam as a template, and it was embedded in epoxy resin and cured to prepare thermoconductive composites. The formation of covalent SiC linkage and presence of interconnected 3D-SiC aerofoam resulted in thermal conductivity of the epoxy composites as high as 10.26 W·m−1·K−1 at 6.52 vol% of SiC, which calculated as thermal conductivity enhancement efficiency per 1 vol% of filler loading equals to 859%. The 3D-SiC/epoxy composites showed an excellent heat dissipation performance compared to that of a commercial thermal pad. The 3D-SiC/epoxy composite is a highly prospective candidate as next generation thermal dissipating material for electronic devices.

Compact Thermal Modeling of Modules Containing Multiple Power LEDs

Temperature is an essential factor affecting the operation of light-emitting diodes (LEDs), which are often used in circuits containing multiple devices influencing each other. Therefore, the thermal models of such circuits should take into account not only the self-heating effects, but also the mutual thermal influences among devices. This problem is illustrated here based on the example of a module containing six LEDs forming on the substrate a hexagon. This module is supposed to operate without any heat sink in the natural convection cooling conditions, hence it has been proposed to increase the thermal pad area in order to lower the device-operating temperature. In the experimental part of the paper, the recorded diode-heating curves are processed using the network identification by deconvolution method. This allows for the computation of the thermal time constant spectra and the generation of device-compact thermal models. Moreover, the influence of the thermal pad surface area on the device temperature and the thermal coupling between LEDs is investigated.

Low-voiding solder pastes in LED assembly

PurposeThis paper aims to investigate voiding phenomena in solder joints under thermal pads of light-emitting diodes (LEDs) assembled in mass production environment by reflow soldering by using seven low-voiding lead-free solder pastes.Design/methodology/approachThe solder pastes investigated are of SAC305 type, Innolot type or they are especially formulated by the manufacturers on the base of (SnAgCu) alloys with addition of some alloying elements such as Bi, In, Sb and Ti to provide low-void contents. The SnPb solder paste – OM5100 – was used as a benchmark. The solder paste coverage of LED solder pads was chosen as a measure of void contents in solder joints because of common usage of this parameter in industry practice.FindingsIt was found that the highest coverage and, related to it, the least void contents are in solder joints formed with the pastes LMPA-Q and REL61, which are characterized by the coverage of mean value 93.13% [standard deviation (SD) = 2.72%] and 92.93% (SD = 2.77%), respectively. The void diameters reach the mean value equal to 0.061 mm (SD = 0.044 mm) for LMPA-Q and 0.074 mm (SD = 0.052 mm) for REL61. The results are presented in the form of histograms, plot boxes and X-ray images. Some selected solder joints were observed with 3D computer tomography.Originality/valueThe statistical analyses are carried out on the basis of 2D X-ray images with using Origin software. They enable to compare features of various solder pastes recommended by manufacturers as low voiding. The results might be useful for solder paste manufacturers or electronic manufacturing services.

Synthesis and analysis of anodic aluminum oxide-nanopore structure on Al substrates for efficient thermal management in electronic packaging

Increased heat generated in high-density electronic devices has intensified the search for advanced thermal management solutions. This urge has prompted various studies in thermal pad, liquid thermal interface material, gap fillers, and thermal coating, etc., with enhanced thermal performance. In this article, anodic aluminum oxide-nanopore (AAO-np) structure was grown on Al5052 alloy substrate electrochemically using two-step anodization process and it is used for efficient electronic packaging applications. It is observed that AAO-np substrate shows significant impact in thermal resistance (Rth) and junction temperature (Tj) of an electronic package. At 3.5 W input power with 14, 29, and 43 psi pressure condition the experimental results of AAO-np substrate resulted 15.11%, 14.58%, and 13.89% reduction in thermal resistance (ΔRth) and 15.53%, 14.85%, and 14.26% reduction in junction temperature (ΔTj) compared to bare Al5052 substrate. This enhanced thermal performance of AAO-np layer are due to high crystallinity, honeycomb-like morphology, nanopore oxide layer, and 0.35 µm rough surface which are effectively acting towards directional heat transport.

Two-Dimensional Mapping of Interface Thermal Resistance by Transient Thermal Measurement

Bonded interfaces in power converters add thermal resistances to heat dissipation. Under cyclic power, temperature, or chemical loading, these interfaces degrade, raising the thermal resistances. Reliability of the thermal interfaces is especially problematic when the bonded area is large because the larger the area the more likely it is to have preexisting defects from processing. To help qualifying the development of a bonding process and quantifying the interface reliability, it would be desirable to have a simple, reliable, and nondestructive measurement technique to obtain a 2-D map of the interface thermal resistance across a large bonded area. Based on the transient thermal method of JEDEC standard 51-14, in this article, we develop a measurement technique that involves moving a thermal probe discretely across a large-area bonded substrate and acquiring the thermal interface resistance under the probe at each location. The probe is made by custom-packaging an insulated-gate bipolar transistor (IGBT) power device. An analytical thermal model is developed to gain insights into the effects of probe materials and structural parameters on the sensitivity of the measurement technique. To obtain a 2-D thermal resistance map of a bonded substrate, the probe is thermally coupled to the substrate at one location through a thermal pad or grease; the device is powered up to a steady-state junction temperature; the power is cutoff; and then the junction temperature during cool-down is recorded. The recorded temperature data are analyzed to derive a thermal structure function of the multilayer material stack. The process is repeated at other locations until a 2-D map of the interface thermal resistance across the entire substrate is completed. This technique is demonstrated on copper–copper bonded samples using either a thermal grease or sintered silver. The resolution of the 2-D mapping technique is evaluated by a copper–grease–copper stack with defects implanted at the bond line.

Influence of the area of a thermal pad on optical and thermal parameters of LED modules

Purpose The purpose of this paper is to present and discuss the results of measurements illustrating influence of the area of a thermal pad and the kind of the used base on thermal and optical parameters of LED modules. Design/methodology/approach LED modules including six power LEDs are designed. In the layout of these modules, different areas of a thermal pad of each LED are used. These modules are made using the classical FR-4 base and metal core printed circuit board (MCPCB). Thermal and optical parameters of all the tested modules are measured using the method elaborated by the authors. Findings The obtained results of measurements prove that increasing the area of a thermal pad causes a decrease in thermal resistance of the tested LED modules and an increase in power density of the emitted light. The role of the area of a thermal pad is more important for the classical FR-4 base than for MCPCB. Research limitations/implications Investigations were performed for only two values of the area of thermal pads and selected values of LEDs forward current. Originality/value The presented results of investigations show how the used layout and type of the used base of these modules influence optical and thermal parameters of LED modules. Changing the base of a module can cause even a double decrease in thermal resistance and a double increase in power density of the emitted light.

Impact of aluminum oxide nanopowder on thermal, optical and surface properties of polysiloxane-aluminum oxide composites as elastomeric thermal pad for light emitting diode application

ABSTRACTVirgin polysiloxane and aluminum oxide nanopowder (10%–50%) reinforced polysiloxane composite films were prepared and its thermal, optical, surface properties were investigated. Polysiloxane/aluminum oxide (Al2O3) (50%–50%) composite film sample exhibit high thermal conductivity (k – 0.26 W/mK) and UV absorption, decreased junction temperature (ΔTJ = 25.69°C at 700 mA) and thermal resistance (∆Rth-tot = 12.41 K/W at 700 mA) compared to virgin polysiloxane film. Overall, the prepared composites can be used as an alternate elastomer thermal pad for efficient thermal management as well as UV blocking encapsulant for future UV-free LED application development.

Integrated thermal dissipation micro structures for CDFP optical module

400 Gbit/s optical module will soon be commercially deployed on a large scale due to the need for high capacity information transmission. It has much higher power density than that of 100 Gbit/s and 40 Gbit/s and therefore the thermal management still remains an obstacle. Microscale and nanoscale thermal management technology emerges and blooms. Concentrating on the thermal design of CDFP optical module, we propose two integrated thermal dissipation micro structures (ITDMS). The first is graphene thermal pad (GTP)-based one, the second is Ω-typed (OMEGA). Based on basic heat transfer equations and by SOLIDWORKS Flow Simulation software, the ITDMS are numerically validated for effective heat dissipation of CDFP optical modules and hence have great prospects for solving the heat dissipation problem of high-speed broadband optical modules due to the thermal integration solutions.

Preparation of boron nitride nanosheets using a chemical exfoliation method as a thermal conductive filler for the development of silicone thermal pads: Part II: Optimization of process parameter design on the development of a silicone thermal pad

This study developed a silicone thermal pad with high thermal conductivity and high mechanical properties. Boron nitride nanosheets (BNNSs) with different lamella thicknesses were prepared in Part I and Al2O3 was filled with silicone rubber to prepare silicone thermal pads. The silicone thermal pads were prepared using the Taguchi method and the elimination and choice translating reality method. BNNSs with different lamella thicknesses, BNNS loading level, and Al2O3 loading level were set as control factors for the experiment. The effect of the three sets of control factors on the thermal conductivity, tensile property, and hardness of the silicone thermal pads was discussed so as to determine the optimum product optimization process parameters. According to the experimental results, the optimum experimental combination was BNNSs with lamella thickness (B24), a BNNS loading level of 20 wt%, and an Al2O3 loading level of 60 wt%. The thermal conductivity of the silicone thermal pads prepared by thermosetting was 5.25 W/mK, the maximum tensile strength was 7.55 kg/cm2, and the Shore hardness was 65.2 (Shore A). Under identical conditions, the thermal conductivity and tensile strength were higher than that of commercially available silicone thermal pads by 34.48% and 20.26%, respectively. The control factor influencing the thermal conductivity and tensile strength of silicone thermal pads was the BNNS loading level, with contribution degrees of 34.66% and 50.13%, respectively. Accurate parameter settings could be obtained for silicone thermal pad processes.

Thermal Modeling and Design Optimization of PCB Vias and Pads

Miniature power semiconductor devices mounted on printed circuit boards (PCBs) are normally cooled by means of PCB vias, copper pads, and/or heatsinks. Various reference PCB thermal designs have been provided by semiconductor manufacturers and researchers. However, the recommendations are not optimal, and there are some discrepancies among them, which may confuse electrical engineers. This paper aims to develop analytical thermal resistance models for PCB vias and pads, and further to obtain the optimal design for thermal resistance minimization. First, the PCB via array is thermally modeled in terms of multiple design parameters. A systematic parametric analysis leads to an optimal trajectory for the via diameter at different PCB specifications. Then, an axisymmetric thermal resistance model is developed for PCB thermal pads where the heat conduction, convection, and radiation all exist; due to the interdependence between the conductive/radiative heat transfer coefficients and the board temperatures, an algorithm is proposed to fast obtain the board-ambient thermal resistance and to predict the semiconductor junction temperature. Finally, the proposed thermal models and design optimization algorithms are verified by computational fluid dynamics simulations and experimental measurements.

STUDY ON TEMPERATURE CHARACTERISTICS OF HIGH LOAD PRESS

Based on the finite element analysis software ABAQUS, the steady and transient temperature field of the high load press is analyzed, and the temperature field distribution characteristics of the ejector cylinder, the moving beam steel wire layer and the frame steel wire layer are obtained. The results show that the heat source can be effectively blocked by adding thermal insulation pad between the mold and the upper mold seat, which is better than the scheme of adding thermal insulation pad at both ends of the ejector cylinder, and the temperature control effect is obvious. The improvement of the surface heat transfer coefficient and the local surface heat transfer coefficient is not obvious for the improvement of the oil temperature.

Water immersion cooling of high power density electronics

Thermal management of power electronic systems is a key bottleneck to power densification. Single phase cooling is limited to low heat transfer coefficients (<2 kW/(m2 K)) while two-phase cooling such as flow boiling suffers from hydrodynamic instabilities. Immersion cooling has emerged as a potential solution to overcome these barriers by enabling the boiling of a cooling fluid directly from electronic components, thereby removing thermal interface materials and packaging constraints encountered in the aforementioned approaches. State-of-the-art (SOA) immersion cooling systems utilize dielectric heat transfer liquids due to electrical considerations, which presents fundamental disadvantages related to the relatively low boiling point, low critical heat flux (<20 W/cm2), and relatively poor thermophysical properties such as thermal conductivity, latent heat, and surface tension, when compared to higher performance fluids such as water. In this study, we propose an approach that uses immersion cooling directly in water. We use the electrically insulating nature of Parylene C coatings to insulate the printed circuit board (PCB) and electronic devices from the water. We demonstrate experimentally the effectiveness of conformal layers of Parylene C as thin as 1 μm in preventing current from leaking between the electronic components and the surrounding water when the system is subjected to voltages up to 200 Volts. Furthermore, we provide the heat flux and convection heat transfer coefficient obtained in 3 M Novec 72DE and 7300 dielectric fluids, water, and a 50/50 in volume mixture of water and ethylene glycol (WEG) as a function of hot-spot-to-fluid temperature difference in both natural convection and nucleate pool boiling regimes. Gallium Nitride (GaN) transistors with different board-mounting techniques and thermal pad locations are used as heat sources. Heat fluxes up to 562 W/cm2 are measured in water. As a proof of concept, water immersion cooling is tested successfully on a 2 kW power converter operating at 97.2% efficiency in deionized water. This study not only demonstrates immersion cooling in water of high-power density electronics, but also develops design guidelines for cooling of electronic components through the use of novel electrically insulating coatings coupled with attractive electrically conducting cooling media.

Preparation of boron nitride nanosheets using a chemical exfoliation method as a thermal conductive filler for the development of silicone thermal composites Part I: effect of single- and hybrid-filler additions on the silicone composite performance

This study developed a nano-size filler as a thermally conductive filler for a silicone thermal pad (STP) by exfoliating hexagonal-boron nitride ( h-BN) with the chemical exfoliation-free radical polymerization method to produce boron nitride nanosheets (BNNSs). We used N,N-dimethylacrylamide as the intercalation agent. After polymerization, it became poly( N,N-dimethylacrylamide) to exfoliate the h-BN layer. BNNSs were taken as a single-filler and hybrid-fillers with Al2O3 and then compared with h-BN to investigate their effect on the silicone composite properties. As the free radical polymerization reaction time increased, the interlayer distance of BNNSs lengthened to 0.35 nm, while the thickness of h-BN sheets decreased. The X-ray diffractometer results showed how the h-BN (002) crystal plane was enhanced and displaced. The Fourier transform infrared spectra showed that the characteristic peaks of 1372 and 812 cm−1 were enhanced, and the Raman results showed that the E2 g displacement and full width at half maximum increased, thus validating the successful preparation of BNNSs. Based on the scanning electron microscope-transmission electron microscope results, BNNSs with 24-hour reaction time offered the best results with a thickness of 5 nm. The highest thermal conductivity reached 3.66 W m−1 K−1 with the addition of 50 wt% BNNSs, and tensile strength of up to 11.30 kg/cm2. Hybrid-fillers showed enhancement of thermal conductivity to 5.28 W m−1 K−1 and tensile strength to 7.32 kg cm−2. Finally, the STP showed that the volume resistance (&gt;1010 Ω cm), withstand voltage (&gt;10 kV mm−1), and flame resistance (V-0) of the STP prepared by this study comply with the industrial application specifications.

Development of High Thermally Conductive Die Attach for TIM Applications

Abstract High power semiconductor applications require a Thermal Interface Die Attach Material with high thermal conductivity to efficiently release the heat generated from these devices. Current Thermal Interface Material solutions such as thermal grease, thermal pads and silicones have been industry standards, however may fall short in performance for high temperature or high-power applications. This presentation will focus on development of a cutting-edge Die Attach Solution for Thermal Interface Management, focusing on Fusion Type epoxy-based Ag adhesive with an extremally low Storage Modulus and the Thermal Conductivity reaching up to 30W/mK, and also Very Low Modulus, Low-Temperature Pressureless Sintered Silver Die Attach with the Thermal Conductivity of 70W/mK.

Carbon nanotube/graphene composites as thermal interface materials for electronic devices

A thermal interface composite comprised of carbon nanotubes and graphene has been used to construct thermally conducting pads as thermal management devices for dissipating heat in electronic devices. These thermal pads exhibit high thermal conductivities (∼T1692708 W/mK), with a series of experiments in commercial smartphone devices resulting in improved heat dissipation performance relative to commercial thermal silicone grease. Incorporation of these thermal composite pads into a continuously operating smartphone significantly reduced the temperature of its CPU and back cover over time, resulting in a reduction in energy consumption that enhanced battery lifetime by as much as 21 min.