Thermal Annealing Step Research Articles

Structures and properties of Pb(Zr,Ti)O3 thin films by metallo-organic compound decomposition process

Structures and properties of Pb(Zr0.5Ti0.5)O3 thin films by metallo-organic compound decomposition (MOD) process have been investigated. PZT thin films with thickness of 0.6 μml m were deposited by repeating spin-coating precursor solutions and thermal annealing steps on sapphires and (111) Si wafers with or without an Al2O3 buffer layer and a bottom platinum electrode. The structures and morphologies of the PZT films are affected strongly by thermal treatment and substrates. PZT films have good dielectric-frequency characteristics, and their dielectric constant and loss tangent are 480 and 1.1% at 1 kHz respectively. PZT films with remnant polarization Pr of 11.4 μml C/cm2 and coercive field Ec of 80 kV/cm have been obtained

Comparison of Al/SiN/a-Si:H and Al/SiO 2/a-Si:H top gate structures under thermal bias stresses

Two kinds of insulators, PECVD silicon nitride (SiN) and DECR silicon dioxide (SiO 2), are compared using top gate metal/insulator/semiconductor structures based on amorphous silicon (a-Si:H). The comparison is based on quasistatic capacitance measurements following several thermal bias annealing steps at different bias-anneal voltages V ba. For positive bias annealing, both Al/SiN/a-Si:H and Al/SiO 2/a-Si:H structures show similar behaviour with increasing V ba, indicating changes in the a-Si:H bulk defect density. For negative bias annealing, the two kinds of structures behave differently owing to their different interfaces. Experimental results indicate the presence of a bump in the interface trap level density at the SiN/a-Si:H interface, which is not observed at the SiO 2/a-Si:H interface.

Local atomic structure and electrical properties of nitrided SiSiO 2 interfaces produced by low-temperature plasma processing and rapid thermal annealing, and explained by ab-initio quantum chemistry calculations

This paper discusses the effectiveness of nitrogen (N-) atom incorporation at SiSiO 2 interfaces in improving device reliability. N-atoms are introduced by a low thermal budget process that includes: (i) a 300°C plasma-assisted oxidation/nitridation; (ii) a 300°C plasma-assisted deposition of the dielectric layer; and (iii) a 900°C post-deposition anneal, either as a separate 30 s rapid thermal annealing (RTA) step, or during dopant activation of the gate electrode. The amount of incorporated-N has been varied at the monolayer range by using N 2 O O 2 mixtures for the oxidation step, and has been measured by Auger electron spectroscopy (AES), secondary ion mass spectrometry (SIMS), and optical second harmonic generation (OSHG). A model, based on ab-initio calculations, is used to explain the role of N-atoms in improving device reliability, e.g. in reducing H-atom induced generation of positively-charged defects, the so-called anomalous positive charge (APC).

Bond switching, Si-H cluster formation and hydrogen effusion upon thermal annealing in hydrogenated amorphous silicon thin films

Hydrogenated amorphous silicon (a-Si:H) thin films deposited by the reactive-sputtering technique and, in some cases, indashsitu annealed were subjected to further thermal annealing steps to 600 °C. Elastic recoil detection analysis measurements indicate that annealing up to 300 °C did not cause a major fraction of bonded hydrogen to evolve. For samples with varying bonded hydrogen contents and structures, bonding configurations, and microstructures, our results show that bonded hydrogen moved and effused from the amorphous network in different ways, depending on particular film structures. Infrared spectroscopy results indicate that bond switching and/or monohydride clustering might have taken place upon thermal annealing, since the 2000 cm −1 infrared peak (usually assigned to the monohydride vibration) was the first, in almost all cases, to decrease upon heat treatment in the range 200–600 °C.

A technology oriented model for transient diffusion and activation of boron in silicon

We propose a model for point-defect-assisted transient diffusion and activation of high-dose boron implants in silicon. To model transient diffusion, a nonlinear equilibrium clustering model for point defects is used. The activation of boron is modeled as a Fermi-level-dependent transformation of inactive dopant clusters to substitutional atoms. Comparison with experimental data shows that this approach can provide a description of both rapid thermal annealing and long-time furnace annealing steps, with an excellent predictive capability for both chemical and electrically active profiles.

In-Line Temperature Monitoring of Rapid Thermal Annealing Processes

AbstractProcess control for rapid thermal annealing (RTA) steps in silicon integrated circuit manufacturing is highly dependent on the repeatability of wafer annealing temperatures. The heating lamps in RTA ovens are controlled by an infrared pyrometer in a feedback-control loop. Methods currently in production allow some variability in annealing temperature, owing to the variability of wafer backside emissivities and the fixed emissivity value used for each process recipe. To provide an independent in-situ temperature sensor with potentially improved accuracy, an RTA oven equipped with a ripple pyrometer was used for passive data collection. Results obtained over extensive wafer processing indicate that the ripple temperatures have a correlation with electrical tester data and that the ripple pyrometer repeatability is better than 3°C at 1 standard deviation.

High-resolution definition of buried InGaAs/InP wires by selective thermal intermixing

Buried InGaAs/InP wire structures with widths down to 30 nm by using a new and simple fabrication technique have been developed. The key point is the local removal of the InP top barrier layer of an InGaAs/InP quantum well using high-resolution electron-beam lithography and selective wet chemical etching. The patterned sample is then subjected to a rapid thermal annealing step. The InGaAs surface quantum wells, formed in the etched parts of the samples, display an enhanced interdiffusion compared to conventional quantum wells covered with an InP cap layer. This leads to a local increase of the band gap, which confines the carriers to the InP covered regions. The wires show sharp photoluminescence emission bands even for the smallest wire widths and a significant increase of the emission intensity due to carrier capture from the vertical and lateral barriers.

Pd-Ge contact to n-GaAs with the TiW diffusion barrier

Pd-Ge based ohmic contact to n-GaAs with a TiW diffusion barrier was investigated. Electrical analysis as well as Auger electron spectroscopy and the scanning electron microscopy were used to study the contact after it was subjected to different furnace and rapid thermal annealing and different aging steps. All analyses show that TiW can act as a good barrier metal for the Au/Ge/Pd/n-GaAs contact system. A value of 1.45 × 10−6 Ω-cm2 for the specific contact resistance was obtained for the Au/TiW/Ge/Pd/n-GaAs contact after it was rapid thermally annealed at 425°C for 90 s. It can withstand a thermal aging at 350°C for 40 h with its ρc increasing to 2.94 × 10−6Ω-cm2 and for an aging at 410°C for 40 h with its ρc increasing to 1.38 × 10−5 Ω-cm2.

Si3N4/Si/Ge/GaAs metal-insulator-semiconductor structures grown by in situ chemical vapor deposition

The in situ, heteroepitaxial growth of Ge films grown on (100) n-GaAs, followed by in situ deposition of a Si3N4/Si insulator to form a Ge metal-insulator-semiconductor structure, is reported. The growth of the Ge, Si, and Si3N4 is carried out in an ultrahigh vacuum, chemical vapor deposition system which is vacuum connected to an adjacent III-V molecular beam epitaxy machine in which the GaAs is grown. The Ge is grown at low temperature (250 °C) using GeH4 and excited He from a remote plasma. After a rapid thermal annealing step, a marked reduction in hysteresis is observed in the capacitance-voltage characteristics and the density of interface trap states at the Si3N4/Si/Ge interface, as determined from the magnitude of the conductance peak, is found to decrease by a factor of 5, to 1×1011 eV−1 cm−2.

Behaviour of a silicon spring fabricated by wire electro-discharge machining

A silicon spring/frame combination has been fabricated laterally out of a (100) silicon wafer, using wire electro-discharge machining (WEDM) in a one-dimensional measurement problem. After a thermal annealing step and an isotropic etching process the crystalline structure of the silicon wafer could be restored. Exposing the spring to over three-million working cycles yielded no detectable fatigue at all. A high-resolution X-ray diffractometer was used to measure the strain in the wafer. This is an accurate, non-destructive microscopic method newly applied in this field to obtain quantified results on the crystalline disorder. The method is applied to the microfabricated spring after annealing and etching steps.

Monitoring of Heavy Metal Contamination during Chemical Cleaning with Surface Photovoltage

This paper presents surface photovoltage (SPV) applications for the monitoring of chemical cleaning and purity of chemicals through mapping of minority carrier diffusion length, Fe concentration in the bulk, and surface contamination (surface charge and surface recombination). The noncontact, wafer‐scale character of the new SPV approach and refined apparatus make this technique uniquely suited for heavy metal monitoring. This method was used to monitor Cu contamination in BHF by measurement of its effect on surface recombination and Fe contamination through it effect on bulk recombination after the rapid thermal annealing step used to drive Fe deposited at the surface during cleaning into the bulk. Fe surface contamination was measured down to the level while the detection limit of this approach is. Different Fe contamination levels (1 to 13 ppb) present in different grades of were easily distinguished. This procedure should allow one to monitor Fe contamination in at the 1 ppt level. Cleanliness of incoming chemicals is not always a limiting factor and often is not related to the cleanliness of chemicals at the point of use (in the cleaning station).

Reactive ion etch damages in inverted, trilayer thin-film transistor

Plasma damages on the inverted, trilayer a-Si:H thin-film transistor from an n+ RIE process have been detected. These damages include a high threshold voltage, a high off current, and the divergence of the transfer characteristic curves under different drain voltages. Both the bulk of the films and the film-film interfaces were damaged by the plasma. The former was proved by the relation between the threshold voltage shift and the gate dielectric layer thickness and materials. The latter was demonstrated by the plasma radiation exposure experiment. Plasma radiation, instead of the charge buildup on devices, is the major cause of the thin-film transistor’s abnormality. All damages were easily repaired with a thermal annealing step.

MOVPE growth of (Al)GaAs on GaAs and Si for photovoltaic applications

GaAs-AlGaAs heterostructures were grown by low-pressure metalorganic vapour phase epitaxy (MOVPE) and characterized by electrical and optical means. Time resolved photoluminescence revealed purely radiative recombination with carrier lifetimes of about 2 μs in GaAs/Al 0.3Ga 0.7As double heterostructures, whereas shorter lifetimes were observed in structures with higher Al contents due to nonradiative processes. Layers grown with a novel Al precursor showed somewhat better results due to lower Si incorporation as measured by SIMS and DLTS. GaAs on Si could be successfully grown with dislocation densities around 7 × 10 6 cm −2 by applying a two-step growth process and a thermal annealing step. Solar cell structures grown on GaAs showed good electrical properties, whereas similar structures grown on Si still suffered from cracks due to the large thickness of the whole structure.

Suppression of nucleation during crystallization of amorphous thin Si films

The ability to selectively suppress crystal nucleation during the crystallization of amorphous Si films is often desirable, but is not generally possible. We demonstrate that a periodic two-step process−involving intermediate temperature ion irradiation followed by high-temperature isothermal annealing−can suppress nucleation in amorphous regions without destroying existing crystals or inhibiting crystal growth. When interpreted in the context of transient nucleation theory, our results indicate that the size distribution of critical and subcritical-sized clusters is modified by exposure to intermediate temperature high-energy ion irradiation. The reduction in the population of critical-sized clusters, which presumably occurs via an interfacial amorphization process, in turn leads to a prolonged incubation period in the subsequent thermal annealing step during which nucleation is negligible but crystal growth is substantial.

Rapid thermal annealing of dual Si and P implants in InP

In this study we evaluate the effects of dual implantation with different doses of Si and P on dopant activation efficiency and carrier mobility in InP:Fe. The implants were activated by a rapid thermal annealing step carried out in an optimized phosphoruscontaining ambient. For high dose implants (1014–1015 cm−2), which are typically employed for source/drain regions in FETs, dual implantation of equal doses of Si and P results in a higher sheet carrier concentration and lower sheet resistance. For 1014 cm−2 Si implants at 150 keV, the optimal P co-implant dose is equal to the Si dose for most anneal temperatures. We obtain an activation efficiency of ∼70% for dual implanted samples annealed at 850° C for 10 sec. The high activation efficiencies and low sheet resistances obtained in this study emphasize the importance of stoichiometry control through the use of P co-implants and a phosphorus-containing ambient during the thermal processing of InP.

Growth of GaAs on High Temperature Hydrogen Pretreated (100) Si Substrates by Molecular Beam Epitaxy

High-quality GaAs epitaxial layers have been grown by molecular beam epitaxy on nominally (100) oriented silicon substrates that were previously annealed in a hydrogen ambient at 1250°C. The growth procedure involves an in situ thermal annealing step after the initial deposition of a thin GaAs buffer layer. Rutherford backscattering and channeling of 2.1 MeV He+ ions, interference optical microscopy, transmission electron microscopy, and X-ray diffraction techniques have been used to characterize these layers. Comparative studies indicate that the epitaxial layers grown on hydrogen-ambient annealed substrates have a superior surface morphology and a lower interface disorder than those on the chemically cleaned nominal silicon (100) substrates. Furthermore, a significant reduction in the density of microtwins is observed in layers grown on the preannealed substrates. This improvement in crystalline quality may be attributed to a lower degree of disorder at the silicon surface that was achieved by high temperature hydrogen-ambient annealing. However, dislocation densities were comparable and the presence of antiphase domain boundaries were observed in both cases.

Heteroepitaxy of GaAs on Si: The effect of i n s i t u thermal annealing under AsH3

This letter shows that an in situ thermal annealing step in AsH3/H2 during the metalorganic vapor phase epitaxy of GaAs on Si(001) improves the crystalline quality. The dislocation density is reduced (below 107 cm−2) without affecting the Si diffusion across the heterointerface or the strain level in the epilayer. The nature of the various near-band-gap recombinations present in the unannealed and annealed samples is discussed in light of selective photoluminescence experiments.

Raman scattering evaluation of lattice damage and electrical activity in Be-implanted GaAs

Systematic Raman scattering experiments were carried out on [001] GaAs implanted with 70-keV Be+ ions both after implantation for samples subjected to fluences spanning the 1013–1015 cm−2 range and after successive isochronal thermal annealing steps performed between 200 and 900 °C for a selected series of Be doses. The implantation-induced damages were observed via the modifications with increasing fluence, of the first-order Raman line parameters (mainly for the LO peak) classified in terms of mode energy softening and linewidth increase. These modifications were quantitatively accounted for within the spatial coherence-length reduction formalism, which makes it possible to evaluate the mean size of unperturbed regions in as-implanted GaAs. Upon successive thermal treatments, the implanted layers were found to recover their crystalline perfection at a temperature as low as 500 °C. Above this temperature the Be electrical activation is evidenced by the sudden and drastic modification of only the ‘‘longitudinal’’ response, which is interpreted as due to the coupling between the LO phonon and an overdamped plasmon. The detailed analysis of the coupled-mode behavior is presented in the case of p-doped GaAs. From the Raman line-shape analysis, including a near-surface free-carrier depleted zone, we have obtained information about the electrical properties of the layer in terms of carrier density and mobility. It is further shown that in the case of strong damping, the ratio ω2p/Γp, where ωp and Γp are, respectively, the plasmon frequency and damping, is a pertinent quantity since it is proportional to the electrical conductivity. All the reported Raman conclusions agree well with results found in the literature that were obtained from direct electrical techniques. Possible mechanisms involved in the electrical activation of Be in GaAs are briefly discussed.

Growth of high quality GaAs layers directly on Si substrate by molecular-beam epitaxy

A study of molecular-beam epitaxy growth conditions that lead to high quality GaAs epitaxial layers grown directly on (100) Si substrates without the use of superlattice buffers is reported. An initial nucleation process which involves a predeposition of As on the Si surface and an in situ thermal annealing step immediately after the initial growth is shown to yield high quality GaAs layers with only a thin buffer layer. The effect of the growth initiation temperature is investigated and an optimal value for this temperature is found that results in smooth GaAs surface morphology. GaAs layers with relatively thin buffer layers grown under optimum conditions exhibit considerably improved electrical and optical properties, with Hall mobility and photoluminescence linewidth similar to those of homoepitaxial GaAs layers.

Application of O+implantation in inverted InGaAs/InAlAs heterojunction bipolar transistors

Deep O+ implantation has been used to create a high-resistivity layer buried beneath the Be+ -implanted extrinsic base-emitter junction region of In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.52</inf> Al <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.48</inf> As/In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</inf> Ga <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</inf> As inverted (emitter-down) heterojunction bipolar transistors (HBT's). The O+ -implanted layer remains highly resistive even after a rapid thermal annealing step at 700°C to activate the Be+ implants. With the O+ implantation, the forward current of the extrinsic base-emitter diode is significantly reduced. HBT's with Be+ - and O+ -implanted extrinsic base regions exhibit current gains of ≃ 100 at a collector current density in excess of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Another benefit from the deep O+ -implanted layer is a dramatic reduction in the junction capacitance of the extrinsic base-emitter diode.