Temperature Humidity Bias Test Research Articles

Electrochemical Metallic Ion Migration Property of Multi-Layer Ceramic Capacitor for Car Electronics

As the use of electrical components in automobiles increases, the occurrence of electorchemical metallic ion migration (ECM), which is one of the causes of various failures in electrical components, is also increasing. Therefore, in this study, 1608 MLCC chip components were used for temperature-humidity-bias (THB) tests at 65℃/85%R.H., 65℃/95%R.H., and 85℃/85%R.H. Three types of THB tests were conducted for 2,934 h. For the THB test, voltages of 3.3, 12 and 24 V were applied, and real-time resistance of MLCCs were measured at every 40 mms intervals. During the ECM test, the ECM occurrence time was measured by monitoring the insulation resistance of between the electrode of MLCC under each THB test conditions. The failure criteria for ECM occurrence were 106 Ω or less, and the time when it occurred more than twice was judged as the ECM failure criteria. Based on the ECM occurrence time, the mean life time of ECM occurrence according to temperature, humidity and applied voltage conditions was derived through Weibull statistical analysis. Finally, we compared and analyzed the sensitivity of MLCC components to ECM generation under use environment of automotive electronics.

High-Voltage Temperature Humidity Bias Test (HV-THB): Overview of Current Test Methodologies and Reliability Performances

The high voltage temperature humidity bias test (HV-THB) has become increasingly popular for evaluating the performances of power semiconductor devices. Given the new challenges of the power semiconductor industry, several applications and devices need to be designed to withstand harsh environments during working operations, with a remarkable focus on high-humidity conditions. The HV-THB test allows one to activate and study different failure mechanisms which were not highlighted by the standard low voltage THB test, enabling new designs in several energy conversion fields, such as energy harvesting, industry and automotive applications. After a brief introduction of current test standards, this work goes through the current methodologies and state-of-the-art of the HV-THB test. The following sections are then dedicated to the knowledge about the failure mechanisms and the models for accelerated testing. Eventually, there is a section devoted to the main passivation materials in order to understand their effects on the HV-THB capabilities of the devices.

Surface modification of thermoplastics by low-pressure microwave O2 plasma treatment for enhancement of the adhesion of the interface box/encapsulating resin and the influence on film capacitors operating under extreme humidity conditions

A low-pressure microwave O2 plasma is applied on the plastic boxes of the metallized film capacitors to strengthen the interfacial adhesion of thermoplastic box/encapsulating resin. The effectiveness of the plasma is reported by analyzing Scanning Electron Microscopy (SEM) micrographs, X-Ray Photoelectron Spectroscopy (XPS) spectra, and contact angle and roughness measurements. An enhancement of the polar character and total free surface energy in both thermoplastics (polybutylene terephthalate (PBT) and polycarbonate (PC)) are determined. Hence, a better wettability of the plastic boxes with the encapsulating epoxy resin is achieved after the plasma application. During the Temperature-Humidity Bias Test (THB), the metallized film capacitors with PC box improves the performance after being plasma treated. Additional capacitor interfaces seem to play a key role in the performance of the device according to the loss of capacitance determined during the THB Test.

Multilayer film passivation for enhanced reliability of power semiconductor devices

Automotive requirements are becoming ever more severe in terms of device operation under high stress and in harsh working conditions. In this context, passivation layers play a fundamental role in determining electrical performance and reliability. This study focuses on the primary and secondary passivation layers applied to the state-of-the-art power devices and their influence on reliability. Power diodes assembled in standard module packages are used as test vehicles, and high-voltage temperature humidity bias tests are performed to stress the structures. A complete failure mode analysis highlights the phenomena behind the degradation of the passivation layers. Different passivation schemes are evaluated through the application of specific inorganic and organic combinations of layers. Finally, a summary of the typical degradation mechanisms and interactions is presented.

High Voltage Temperature Humidity Bias Test (THB) customized system and methodologies for reliability assessment of power semiconductor devices

High Voltage Temperature Humidity Bias Test (THB-HV) is currently the state of the art test method for reliability evaluation of power devices in high humidity environments at high voltage. These conditions have become especially significant in the case of power modules for the automotive industry and other applications in harsh environments. In this research work, a custom system for active monitoring of THB-HV testing is developed and customized, in order to evaluate different testing methodologies, intercept device degradation in real time, and allow for a controlled and more accurate failure analysis of the DUTs.

A comparison of the Cu electrochemical migration behavior between Cu lines with 5 um L/S realized by conventional Semi Additive Process (SAP) and an innovative Excimer Laser Damascene Process

Abstract The technological evolution regarding multi-chip integrated Fan-Out packages and chip scale packages (CSPs) with high amounts of I/O demands for even higher routing densities. Conventional used technologies and materials like mask aligner and photosensitive polymers used for semi additive process (SAP) in the BEOL have reached its limits to push the resolution down to two um. New materials and technologies are necessary to overcome these limits. As the routing density increases, so does the reliability requirements. The electrochemical migration between Cu lines cannot be neglected and need to be analyzed as the distance between the Cu lines is decreasing. A new approach for fine-line multi redistribution layers (RDL) realized by an excimer laser dual damascene process was presented in the past, using laser ablation and Cu chemical mechanical planarization (CMP) to realize embedded Cu lines. This approach has several advantages regarding the processing but one of the most important characteristics of the damascene approach is the improved electrochemical migration behavior. The Cu lines are partially cladded by the Ti part of the seed layer due to the way of processing. The Ti acts as a barrier layer and inhibits the Cu migration into the surrounding polymer. RDL structures realized by conventional SAP have Ti only under and not between the Cu lines. In this study different test samples with interdigital structures (resp. interdigital capacitor IDC) with five um line and space width (L/S) were realized to analyze the electrochemical migration behavior between the fingers of the IDC. The samples were realized by SAP and by the excimer laser damascene process and were subsequently tested by the temperature humidity bias (THB) test resp. biased High Accelerated Stress Test (bHAST). With the help of this work, we were able to compare the reliability of both process variants and to demonstrate and prove the reliability of embedded copper lines realized by the excimer laser damascene process.

Miniature environmental chambers for temperature humidity bias testing of microelectronics.

Environmental chambers are commonly used for reliability testing of microelectronics and other products and materials. These chambers are large, expensive, and limit electrical connectivity to devices under test. In this paper, we present a collection of ten small, low-cost environmental chambers, with humidity control based on mixtures of water and glycerol placed inside the chambers. We demonstrate relative humidities from 44% to 90%, at temperatures from 30 to 85 °C, enabling industry-standard testing at 85% humidity and 85 °C. The division of samples between ten separate chambers allows different conditions to be applied to each sample, in order to quickly characterize the effects of the environment on device reliability, enabling extrapolation to estimate lifetimes in working conditions.

Preparation and Evaluation of a Zirconia/Oligosiloxane Nanocomposite for LED Encapsulation.

A zirconia/oligosiloxane nanocomposite encapsulant has been developed and tested in a high-power LED package against commercial silicone resins. The composite was a marriage of zirconia nanocrystals modified with butyric acid (BA) and 3-methacryloxy propyl trimethoxysilane (MPTMS) and a high-index methacryloxy-oligosiloxanes resin made from MPTMS plus dimethyl, diphenyl, and triphenyl silanes. The modified zirconia had an index of 1.762 (@589 nm) and was dispersible in many solvents. The oligosiloxane resin, however, had an index of 1.5413 with good encapsulation properties and low viscosity allowing the incorporation of more zirconia. The final nanocomposite showed a refractive index of 1.625 with high transparency and a wavelength-independent scattering, both desirable for the light extraction from LED. When tested in a high-power LED package, the composite encapsulant resulted in 13% more light output compared to the commercial encapsulant (OE-6630, Dow Corning Corp.) and showed longer than 1000 h of lifetime (L70) under the steady-state Temperature Humidity Bias (THB) test.

Temperature–humidity–bias testing on insulated‐gate bipolartransistor modules – failure modes and acceleration due to high voltage

The temperature–humidity–bias (THB) test is the standard for accelerated stress testing with respect to corrosion and other humidity driven degradation mechanisms. Usually, 1000 h tests at 85°C and 85% relative humidity are used to predict up to 25 years of operation. The bias is usually limited to 80 V in order to fulfil the respective standards. Nevertheless, THB tests on 1700 V insulated-gate bipolar transistor (IGBT)-modules have shown that higher bias is a more severe test condition. The failure analysis confirmed Cu- and Ag-dendrites and corrosion of the aluminium (Al)-chip-metallisation as the relevant failure mechanisms. To determine the acceleration factor due to voltage, 1200 V IGBT modules were tested in THB at 780 V (65% of V CES) and 1080 V (90% of V CES). A characteristic degradation consisting of three phases has been identified. The second phase seems to be determined by Al corrosion and an acceleration factor of about two has been estimated from 780 to 1080 V. Within the third phase, the devices stabilised probably due to localised self-heating. Thus, this degradation mechanism is kind of self-limiting, but the higher leakage also increases the risk of thermal runaway especially when biased close to the rated collector–emitter voltage.

Reliability of Manganese Dioxide and Conductive Polymer Tantalum Capacitors under Temperature Humidity Bias Testing

Despite being highly reliable under steady state operating conditions, manganese dioxide (MnO2) tantalum capacitors are prone to catastrophic exothermic failures under surge current conditions. Such failures can be mitigated by the use of conductive polymers in place of MnO2. However, these polymers are more susceptible to failure at elevated humidity levels. In this paper, the electrical performances of both MnO2 and polymer tantalum capacitors are compared by subjecting them to temperature humidity bias testing at 85°C and 85% RH. The test population consists of tantalum capacitors with two voltage ratings (50V and 16V). At each of these voltage ratings, two sets of tantalum capacitors, one each with MnO2 and conductive polymer electrodes, were tested. The voltage levels used to bias the capacitors were periodically increased in multiples of the rated voltage to accelerate degradation. The performance of the capacitors was tracked by monitoring their capacitance, dissipation factors and leakage currents, both in-situ and at room temperature. The degradation trends are discussed in light of the differences in voltage ratings and electrode types. These trends are also mapped to fundamental failure mechanisms within the capacitors.

Reliability studies of vertical GaN devices based on bulk GaN substrates

There is great interest in wide band-gap semiconductor devices and most recently in vertical GaN structures for power electronic applications. In this paper initial reliability studies of vertical p–n diodes and vertical junction field effect transistors fabricated on pseudo bulk low defect density (104 to 106cm−2) GaN substrates are discussed. Homoepitaxial MOCVD growth of GaN on its native substrate and being able to control the doping in the drift layers in GaN has allowed the realization of vertical device architectures with drift layer thicknesses of 6 to 40μm and net carrier electron concentrations of 2×1015 to 2×1016cm−3. This parameter range is suitable for applications requiring breakdown voltages of 1200V to 5kV with a proper edge termination strategy. Measured devices demonstrate power device figure of merit of differential specific on-resistance (Rsp) of 2.8mΩ-cm2 for a breakdown voltage of 4.1kV. The improvement in the substrate quality over the last few years has resulted in the fabrication of diodes with areas as large as 16mm2, with breakdown voltages exceeding 1200V, and pulsed (100μs) currents of 100–400A. Furthermore, impact ionization based avalanche breakdown has been demonstrated in GaN for the first time due to the high quality of the crystals grown on the native substrates. With these key demonstrations firmly in place, it is necessary to evaluate the reliability performance of vertical GaN devices on bulk GaN substrates. The results of high temperature reverse bias (HTRB), high temperature operating life (HTOL), temperature humidity bias (THB), temperature cycling (TC), and inductive avalanche ruggedness tests conducted on vertical GaN devices packaged in standard power packages are reported. It is observed that fundamental failure mechanisms are almost always traced back to the starting substrate material quality, substrate miscut angle, and surface morphology post epi growth. No observation of Rds drift is made for vertical diodes or transistors fabricated on bulk GaN substrates under the stress conditions mentioned above once a suitable back metal and die attach process is developed.

고온고습 전원인가 시험에서 Cl에 의한 이온 마이그레이션 불량

By the trends of electronic package to be more integrative, the fine Cu trace pitch of organic PCB is required to be a robust design. In this study, the short circuit failure mechanism of PCB with a Cl element under the Temperature humidity bias test (<TEX>$85^{\circ}C$</TEX>/85%RH/3.5V) was examined by micro-structural study. A focused ion beam (FIB) and an electron probe micro analysis (EPMA) were used to polish the cross sections to reveal details of the microstructure of the failure mode. It is found that <TEX>$CuCl_x$</TEX> were formed and grown on Cu trace during the <TEX>$170^{\circ}C$</TEX>/3hrs and that <TEX>$CuCl_x$</TEX> was decomposed into Cu dendrite and <TEX>$Cl_2$</TEX> gas during the <TEX>$85^{\circ}C$</TEX>/85%RH/3.5V. It is suggested that Cu dendrites formed on Cu trace lead to a short circuit failure between a pair of Cu traces.

Electrical and Reliability Performance of Molded Leadless Package for High-voltage Application

This paper investigates the influence on electrical and reliability performance of molded leadless package for high-voltage power integrated circuit application. Semiconductor devices are mostly encapsulated by using epoxy molding compounds which act as protection for the ICs from damage to the harsh environment. Quad Flat No Lead was selected since the application requirement for compact AC to DC portable adapter charger and more input and output pin. High-voltage package was designed based on the IPC-2221 standard specification and creepage distance was calculated under external component lead, uncoated. Two epoxy molding compounds were used namely as type A and B. Key properties of EMCs were identified such as ionic content, glass transition temperature and volume resistivity. The electrical tested at room temperature on high-voltage leakage current at 700V showed EMC B has no failure compared with EMC A. On top of that, electrical parametric distribution showed that the Cpk of EMC B was extremely robust compared with EMC A. Reliability test was conducted for high temperature operating life test at 115˚C and EMC B was passed up to 1000hours while EMC A was failed. Meanwhile, High Temperature Storage Life test at 150˚C and Temperature Humidity Bias Test at condition 85˚C, 85% relative humidity showed that EMC B was passed for 1000hours but EMC A was failed at 168hours. However, both compounds A and B were passed delamination criteria tested by scanning acoustic tomography technique before and after subjected to moisture sensitivity level 1.

Reliability of Multi-Layer Wiring Board Embedded with Two Dies in Stacked Configuration

As electronic devices decrease in size and increase in functionality, their surface-mount components grow in number. This trend created a need for securing appropriate space in and on a wiring board to accommodate necessary components. Conventionally, dies are mounted on a wiring board. Much effort is spent for space savings. We have come up with a structure to include dies inside a wiring board and succeeded in fabricating the board in which two dies are embedded in a 3D stacked configuration. This new structure shrinks the foot print size and thus contributes to higher density and functionality of a semiconductor package and SiP. In addition, since the base material is polyimide, this board is as thin as 0.45 mm with two WLP (Wafer Level Package) dies (3 mm x 3 mm x 0.085 mm) embedded between any of 9 wiring layers. The module level warpage on the both sides of this board is 0.035 mm, so it is possible to mount components on the both sides. This board was fabricated based on our WABE technologyTM (Wafer and Board level Embedding technology) that includes a single step co-laminating process and embedded technology using conductive-paste-filled vias for establishing z-axis interlayer electrical connections. The conductive paste formed intermetallic compound with the copper foil and the via showed stable electrical connections by metallic bonding. Copper pads were fabricated on the dies by a wafer level process in advance. The polyimide-based films were laminated with adhesive and the dies were embedded. At the same time, electrical connections were established. This method enables the production of an embedded board by one-time curing after the alignment and fixing of necessary layers. We applied this method to the new structure that includes two dies in a 3D configuration to achieve a simple fabrication process using the single step co-lamination process. We evaluated the reliability of this board as below. The electric resistance was measured after various reliability tests including Temperature Cycle Test, Temperature Humidity Bias Test and Highly Accelerated Stress Test following a moisture sensitive reflow test (based on IPC/JEDEC J-STD-020 Level 3). From the results, there were no major defects observed in the test boards, either visually or functionally. This two-die embedding technology helps to realize the miniaturization and contribute to higher functionality of semiconductor packages and SiPs.

Reliability Analysis and Accelerated Statistical Model of CNC PCB for Electrochemical Migration

The effect of conductor spacing and applied voltage on the insulation performance of printed circuit board (PCB) has been investigated under temperature-humidity-bias (THB) conditions in this paper. Based on the electrochemical migration failure mechanism, this paper proposes an accelerated statistical model, which includes a life-stress relationship model and a life distribution model. The accelerated statistical model can effectively quantify the effect of concurrent conductor spacing and applied voltage on the characteristic life of the PCB. Because THB test can produce less life data in limited test period, an accelerated degradation theory is applied for the modeling research. In addition, a methodology on how to verify the accelerated statistical model for the CNC PCB is introduced. In the case of small samples, the least square regression method is applied for parameter calculation due to its high precision. Furthermore, the residual analysis is carried out to check the fitting effect. The results show that the accelerated statistical model can describe the life characteristics of CNC PCBs preferably under the comprehensive action of conductor spacing stress and applied voltage stress.

Superhydrophobic Nanocomposite Coating for Reliability Improvement of Microelectronics

We developed superhydrophobic (SH) silica/epoxy nanocomposite coating as an encapsulant to improve device reliability. The SH surface was generated by spin-coating of a silica/epoxy nanocomposite, followed by an oxygen reactive ion etching that exposes silica nanostructures for high surface roughness, and a subsequent hydrophobic treatment for low surface energy. As a result, a water contact angle of 161.2° and a contact angle hysteresis of 1.7° were achieved under an optimized condition. Such SH coating showed good stability under humidity at elevated temperatures and was applied on the triple track resistor (TTR) test coupons. It is found that the self-cleaning encapsulant successfully improves the test device reliability, and the coated TTR showed less degradation of resistance and leakage current in the temperature humidity bias test. In addition, the effect of different types of epoxy resin on reliability improvement was studied.

Reliability of Embedded Planar Capacitors With Epoxy–$\hbox{BaTiO}_{3}$ Composite Dielectric During Temperature–Humidity–Bias Tests

In this work, the reliability of an embedded planar capacitor with epoxy-BaTiO3 composite dielectric was investigated under temperature-humidity-bias (THB) conditions. The temperature and humidity conditions were selected as 85°C and 85% RH, respectively. In order to investigate the effect of an applied bias, one set of capacitors was kept unbiased, and the other set of capacitors was biased at 5 V. Capacitors of two different sizes were used to investigate the effect of area on reliability under these conditions. Three parameters-capacitance, dissipation factor, and insulation resistance-were monitored in situ every hour during the THB test, which lasted for 2000 h. Data analysis and the physical explanation of change in the electrical parameters under THB conditions are presented in this paper.

Performance of MEMS Vibratory Gyroscope under Harsh Environments

Microelectromechanical systems (MEMS) gyroscope is a sensor that measures the rate of change in an angular position of an object. MEMS vibratory gyroscopes are increasingly used in applications ranging from consumer electronics to aerospace and are now one of the most common MEMS products after accelerometers.With advances in fabrication technologies, the low-cost MEMS gyroscope has opened up a wide variety of applications with environmental conditions ranging from medium to harsh. Despite their widespread use, the performance of MEMS gyroscopes in harsh environments is still under question. While some studies have been conducted to understand the effects of high mechanical shock, high frequency vibration and high frequency acoustic environment on the MEMS gyroscopes,the effects of sustained exposure to temperature combined withother harsh environment stresseshave not been well researched.Thus, it is necessary to quantify MEMS vibratory gyroscope performance under such conditions.This research reviews current harsh environment studies anddemonstrates the effects of an elevated temperature and sustained exposure to temperature combined humidity on the MEMS vibratory gyroscope. In order to quantify such effects, several tests have been performed. A short-term temperature effect on MEMS gyroscope was examined through temperature characterization test forfive thermal cycles at wider temperature ranges. A long-term temperature effect on the MEMS gyroscope was inspected through 500 thermal cycles; while, combined effects of temperature and humidity was studied through temperature humidity bias(THB) test and highly accelerated stress test (HAST).

The effect of relative humidity, temperature and electrical field on leakage currents in piezo-ceramic actuators under dc bias

A key advantage of piezo-ceramic technology is the extremely low power consumption that can be achieved compared to electromagnetic technology. However leakage currents through the ceramic limit the minimum power consumption achievable particularly when exposed to harsh environments. This paper presents a systematic study of temperature, humidity and electrical field on the electrical resistance of soft PZT ceramics under dc bias. Temperature–humidity bias testing methods are used to assess electrical resistance changes in soft PZT beams. Results show that changes in electrical resistance occur in two stages. The first stage shows little dielectric change and that its duration is dependent on the ambient relative humidity. The second stage is characterized by a much more rapid fall in ceramic resistance and is not as dependent on the relative humidity. Evidence is presented showing that the leakage currents are caused by an ionic migration process. Mathematical models are presented to describe the degradation process and to predict the onset of resistance. These models are shown to give good agreement with experimental results. The role of electrode materials and ceramic microstructure in the development of leakage currents is discussed.

Micro-computer tomography—An aid in the investigation of structural changes in lead zirconate titanate ceramics after temperature-humidity bias testing

Lead zirconate titanate ceramic actuators are extensively used in electronic and electro-mechanical devices. Under humid conditions with a d.c. bias leakage currents increase power consumption In some materials the increasing leakage current is accompanied by the evolution of features on the anode surface, but little is known of any changes to the internal structure of the material. This research applies an advanced imaging technique (micro-computer tomography) to non-destructively investigate these features. This allows the evolution of internal features over time to be studied. The findings reveal that the microstructure of the ceramic was significantly altered during environmental testing.