System Of Affine Recurrence Equations Research Articles

A specialized hardware device for the protein similarity search

AbstractThis work presents the architecture of PROSIDIS, a special purpose processor designed to search for the occurrence of substrings similar to a given ‘template string’ within a proteome. Similarity is determined by means of a weighting matrix which measures the degree of similarity between any two amino acids.The paper recalls the basis of the PHG (Parallel Hardware Generator) tool, developed in the framework of the HADES project (Hardware Design for Scientific Applications). Through PHG it is possible to design, in a nearly automatic way, a parallel hardware which efficiently implements an algorithm described through recurrence equations; PHG is able to generate a synthesizable VHDL which represents a parallel system derived from the System of Affine Recurrence Equations (SARE) describing the problem.In this work we illustrate the advantages derived from designing a special purpose processor to face the protein similarity discovery problem. Some preliminary results are given, reporting the time spent by several conventional computing architectures and by the PROSIDIS processor hosted by a personal computer to solve the same protein analysis problem. The results show that PROSIDIS, implemented on a Xilinx XV1000 FPGA, gives speedup figures ranging from 5.6 up to 55.6. Copyright © 2004 John Wiley & Sons, Ltd.

Algorithm transformations for the data broadcast elimination method

VLSI technology has had tremendous success in revolutionizing computer design with processor arrays. Local communication and interconnection is a constraint that dictates the design of processor arrays. The shared bus and global access to memory are now no longer used, since they lower the speed. Consequently, parallel algorithms must be designed according to these constraints. One of the problems that must be resolved for the above mentioned constraints is data broadcast elimination. Algorithms must be transformed into a form that uses data propagation instead of data broadcast. Here systems of affine recurrence equations are analyzed and data broadcast is denned in context of the definition of data dependence and affine recurrence equations. A method for data broadcast elimination is introduced in [1] and expands the system of affine recurrence equations into new recurrence equations, that define data propagation and eliminates the data dependences where data broadcast occurs. Parallel algorithms are usually given as a set of similar tasks repetitively performed on different data. The iteration form of presenting the algorithms is most common. Several techniques are introduced to transform the algorithm to a single assignment form of recurrence equations. Some improvements of these techniques are presented to make the application of the data broadcast elimination method easier and more straight forward. The presented techniques are classified as the transformation of iterative algorithms to a recurrence form, the transformation of recurrence form to a single assignment form, and fulfilling the index forms of the algorithms. A system of affine recurrence equations with the data broadcast property is always obtained by applying these procedures. The method of data broadcast elimination successfully transforms this system of affine recurrence equations into a system of uniform recurrence equations which can be used for parallel implementation on VLSI processor arrays.

Elimination of the computational broadcast in systolic arrays: an application to the qr decomposition algorithm

Two types of broadcast in algorithms are determined: (1) a data broadcast, where one data value is used for more than one computation and (2) a computational broadcast where one variable is computed in more then one computation. Both types of broadcast are preferred to be eliminated when a processor array implementation is desired by using VLSI technology. When the algorithm computes only one variable value for each index vector then the computational broadcast can be eliminated in a straight forward manner by introducing counter values resulting in a single assignment code. However in cases when the algorithm computes two or more variable values that are specified by a different computational broadcast, has not been considered. As far as is known it has been solved by deriving localized algorithms in single assignment code heuristically. In this paper we define this problem in terms of a system of affine recurrence equations and analyze the data dependencies introduced. Then we show a synthesis procedure that eliminates the computational broadcast and a few examples of implementation are shown. The QR decomposition algorithm is also presented in a localized single assignment code by using the proposed method and several different parallel implementations are discussed.

Algorithm transformations for computational and data broadcast

Problems that must be resolved for the constraints imposed by VLSI technology are computational and data broadcast. Algorithms must be transformed into a form that uses data propagation instead of data broadcast. The techniques introduced here are classified as the transformation of iterative algorithms to a recurrence form, the transformation of recurrence form to a single assignment form, the transformation of the recurrences in iterative algorithms and fulfilling the index forms of the algorithms. Systems of affine recurrence equations are analyzed here and computational and data broadcast are defined in context of the definition of data dependence and affine recurrence equations. A method for data broadcast elimination is introduced in [1, 2] and expands the system of affine recurrence equations into new recurrence equations, that define data propagation and eliminates the data dependencies where computational or data broadcast occurs. Some improvements of these techniques are presented to make the applic ion of the broadcast elimination method easier and more straight forward. A system of affine recurrence equations with broadcast property is always obtained by applying these procedures. The method of broadcast elimination successfully transforms this system of affine recurrence equations into a system of uniform recurrence equations which can be used for parallel implementation on VLSI processor arrays.

Converting affine recurrence equations to quasi-uniform recurrence equations

Most work on the problem of synthesizing a systolic array from a system of recurrence equations is restricted to systems of uniform recurrence equations. Recently, researchers have begun to relax this restriction to include systems of affine recurrence equations. A system of uniform recurrence equations typically can be embedded in spacetime so that the distance between a variable and a dependent variable does not depend on the problem size. Systems of affine recurrence equations that are not uniform do not enjoy this property. A method is presented for converting a system of affine recurrence equations to an equivalent system of recurrence equations that is uniform, except for points near the boundaries of its index sets. Necessary and sufficient conditions are given for an affine system to be amenable to such a conversion, along with an algorithm that checks for these conditions, and a procedure that converts those affine systems which can be converted.The characterization of convertible systems brings together classical ideas in algebraic geometry, number theory, and matrix representations of groups. While the proof of this characterization is complex, the characterization itself is simple, suggesting that the mathematical ideas are well chosen for this difficult problem in array design.

New linear systolic arrays for digital filters and convolution

The algorithm transformation techniques described in [1] and the data broadcast elimination method from [2] are used to represent the algorithm as a system of uniform recurrence equations. Usually the algorithms are given in iterative form, i.e. as a repetitive operation on data. The procedure A transforms these algorithms into a recursive form. The algorithm is then transformed to a single assignment code presentation by procedure B. The problem of recurrences defined in the iteration is solved by procedure C. Then the full index form of the algorithms are obtained by applying procedure D. By applying these algorithm transformation techniques a system of affine recurrence equations with the data broadcast property is obtained. The data broadcast elimination method is used to transform the algorithm into a system of uniform recurrence equations. The reader is referred to [3–9] for a description of the data dependence method and linear transformations. In this paper we will use the notation proposed in [1,9]. The folding transformations, described in [10], are used to obtain more efficient processor array implementations for both the MA and AR filters. The ARMA filter is a composition of these two implementations that have an interlocking property. However the systolic array designed by H.T. Kung in [11] is rather straight forward solution resulting in cells with double complexity according to the inner product step processors. A much better solution is obtained by using a translation and the interlocking property of the partial implementations in the composition.

New linear systolic arrays for the string comparison algorithm

VLSI technology has achieved tremendous success in revolutionizing computer design with processor arrays. Foster and Kung, in [1] propose a linear systolic array for the string comparison algorithm. This solution is based on a regular movement of the pattern and the input string in opposite directions keeping the results (1 bit values) resident in the array. A special technique, requiring two wires is applied to unload the result array in a pipeline with the input string so no extra time is required. Disadvantages of this approach are 50% maximum processor efficiency and intensive memory access when string sizes are greater then the array size. We use several algorithm transformation techniques to transform the algorithm into a system of Affine Recurrence Equations (ARE), [2] and then apply the data broadcast elimination method [3]. A system of Uniform Recurrence Equations (URE) is resulted and then mapped [4] on VLSI processor arrays. The folding transformation [5], is then applied to establish the optimal implementations by selecting the plane achieving maximum symmerty and the vector of interlocking property with minimal norm. The implementations obtained result in more efficient VLSI processor arrays.

Synthesis aspects in the design of efficient processor arrays from affine recurrence equations

Efficient implementation of problems on processor arrays requires dedicated compiling techniques. This paper proposes synthesis techniques in the design of processor array architectures from system of affine recurrence equations. They implement the spacetime mapping which determine the scheduling of the calculations and the allocation of these calculations to a surface of processors. The paper emphazises the two-steps space mapping which is composed of a classical linear allocation followed by the application of two specific partitioning techniques. These techniques reduce the number of processors and therefore result in more efficient parallel solutions. The paper is illustrated with the Cholesky factorization.

Decoupling the dimension of a system of affine recurrence equations

Most work on the problem of synthesizing a systolic array from a system of recurrence equations is restricted to systems of uniform recurrence equations. In this paper, this restriction is relaxed to include systems of affine recurrence equations. A system of uniform recurrence equations typically can be embedded in space-time so that the distance between a variable and a dependent variable does not depend on the problem size. Systems of affine recurrence equations which are not uniform do not enjoy this property. However, a method has been presented in another paper for converting a system of affine recurrence equations to an equivalent system of recurrence equations that is uniform, except for points near the boundaries of its index sets. In this paper a procedure is presented for decoupling the dimensions of the system of affine recurrence equations, thereby simplifying the conversion to an equivalent system that is uniform (except for points near the boundaries).

Scheduling a system of nonsingular affine recurrence equations onto a processor array

Most work on the problem of scheduling computations onto a systolic array is restricted to systems of uniform recurrence equations. In this paper, this restriction is relaxed to include systems of affine recurrence equations. In this broader class, a sufficient condition is given for the system to be computable. Necessary and sufficient conditions are given for the existence of an affine schedule, along with a procedure that constructs the schedule vector, when one exists.