Synthetic quasi-TEM Transmission Line Research Articles

A Dual-Band 10/24-GHz Amplifier Design Incorporating Dual-Frequency Complex Load Matching

This paper presents a comprehensive theory of a dual-frequency complex load-matching technique based on transmission lines. The theoretical analysis is insightfully described, and the applicable regions of the design equations are specified. To substantiate the theory, a corresponding methodology is proposed to design a dual-band 10/24-GHz amplifier, which is fabricated by standard 0.13-μm 1P8M CMOS technology. This amplifier involves synthetic quasi-TEM transmission lines to build the dual-frequency matching circuits. The comparisons between simulations and on-wafer measurements are reported to establish the feasibility and flexibility of the presented technique in microwave applications.

Highly integrated three-dimensional synthetic transmission line design on silicon substrate

This letter presents a highly integrated three-dimensional synthetic quasi-TEM transmission line (TL) design with high slow-wave factor (SWF).By following the summarized design guidelines, the prototype provides a high flexibility to adjust the structural parameters of the TL for synthesizing the desired guiding properties. Two typical examples of the 35- and 70-Ω synthetic TLs based on the standard 0.18-μm 1P6M CMOS technology reveal that the SWFs achieve 2.90 and 2.78 at 20.0 GHz, respectively, indicating the increases of 45.0 and 39.0% over than theoretical limit of the quasi-TEM TL. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:2604–2607, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26337

Comparative Layout Study of Stacked CMOS Synthetic Quasi-TEM Lines Separated by the Meshed Ground Shield and its Application to 180$^{\circ}$ Hybrid Design

This work investigates the coupling phenomena of the synthetic quasi-TEM transmission lines (TLs) with the differential layout in multilayer structure. The numerical method based on the normal mode parameters calculates the couplings between two stacking TLs shared with a common mesh ground plane. The theoretical investigations show that the TL in the orthogonal layout has the lowest coupling. This result is applied to design a 60 GHz 180 ° hybrid using the standard 0.18 μm 1P6M CMOS process. The prototype is realized by the TLs with an orthogonal stacked layout in a size of 180 μm × 240 μm without the contact pads. Both measurements and the simulations show the return loss lower than 15 dB and the isolation higher than 20 dB at the frequency between 55 and 65 GHz. Two insertion losses (|S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">31</sub> | and |S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</sub> |) are 4.9 ±0.2 dB and 5.4 ±0.3 dB, respectively. From 56 to 64 GHz, the phase difference between two output ports is about 180° ±10°.

Design of Synthetic Quasi-TEM Transmission Line for CMOS Compact Integrated Circuit

This paper presents the design guidelines of the synthetic quasi-TEM transmission line (TL) based on standard 0.18 mum one-poly six-metal complementary metal-oxide-semiconductor (CMOS) technology. The synthetic quasi-TEM TL, also called the complementary-conducting-strip transmission line (CCS TL), is composed of five structural parameters to synthesize its guiding characteristics. Twenty-four designs of CCS TL are reported, with the following unique attributes. First, a characteristic impedance range of 8.62-104.0 Omega is yielded. Second, the maximum value of the slow-wave factor is 4.79, representing an increase of 139.5% over the theoretical limit of the quasi-TEM TL. Third, the ratio of the area of the CCS TL to its corresponding quality factor ( factor) can help to estimate the cost of the loss for the circuit miniaturizations. Additionally, the important CMOS manufacturing of metal density is for the first time involved in the reported TL designs. By following the proposed design methodologies, a practical design example of a -band CMOS rat-race hybrid is reported and experimentally examined in detail to reveal the feasibility of the proposed design guidelines to synthesize the CMOS CCS TL. The chip size without contact pads is 420.0 mum 540.0 mum. The measured loss and isolation of the hybrid at 36.3 GHz are 3.84 and 58.0 dB, respectively.

A Ka-Band CMOS Wilkinson Power Divider Using Synthetic Quasi-TEM Transmission Lines

This work presents a Ka-band two-way 3 dB Wilkinson power divider using synthetic quasi-transverse electromagnetic (TEM) transmission lines (TLs). The synthetic quasi-TEM TL, also called complementary-conducting-strip TL (CCS TL), is theoretically analyzed. The equivalent TL model, whose production is based on the extracted results, is applied to the power divider design. The prototype is fabricated by the standard 0.18 mum 1P6M CMOS technology, showing the circuit size of 210.0 mumtimes390.0 mum without contact pads. The measurement results, which match the 50 Omega system, reveal perfect agreements with those of the simulations. The comparison reveals the following characteristics. The divider exhibits an equal power-split with the insertion losses (S21 and S31) of 3.65 dB. The return losses (S11, S22 and S33) of the prototype are higher than 10.0 dB from 30.0 to 40.0 GHz.

Miniaturized microwave passive filter incorporating multilayer synthetic quasi-TEM transmission line

This paper presents a novel approach to miniaturizing a transmission-line (TL)-based bandpass filter (BPF). The BPF is miniaturized by incorporating multilayer stacked synthetic quasi-TEM TLs made of complementary conducting strip (CCS) metal surfaces. The stacked CCS TLs are separated by a meshed ground plane, whose coupling effect was experimentally shown negligibly to affect desired circuit performance. A brief description of the symmetric third-order TL filter synthesis procedure is reported to map such an idealized BPF to the prototype made of the stacked synthetic CCS TLs. Excellent agreement is obtained by comparing the experimental and theoretical filter frequency responses showing a 2.46-dB insertion loss, a -16.8-dB return loss with under 5% offset of low-side out-band transmission zeros, and a 2% offset of center frequency. A quick estimate of the proposed miniaturized filter design based on synthetic quasi-TEM lines shows that the particular filter prototype approaches the process limit.