Synchronous Buck Converter Research Articles

Voltage control for variable speed wind turbine using buck converter based on PID controller

Currently, energy diversification is needed to overcome the limitations of fossil energy as a fuel for electricity generation. In Indonesia, one source of renewable energy that has great potential is wind energy. Wind energy conversion system is an environmentally friendly electricity generator with unlimited availability. However, the electrical energy produced depends on the fluctuating wind speed so that it produces a fluctuating voltage. Variable speed wind turbine is one of the most widely used wind turbine types because it has better efficiency but requires control to overcome the fluctuations in the voltage generated. This paper presents voltage control on a prototype variable speed wind turbine with a permanent magnet synchronous generator (PMSG) and buck converter. The output voltage generated by the PMSG will be rectified by a three-phase uncontrolled rectifier. Voltage control is done through the duty cycle settings on the buck converter that is connected to the battery for energy storage. PID controller is used to set the duty cycle of PWM pulses with a switching frequency of 31.5 kHz. The Propotional Integrator Differensiator (PID) controller is embedded in the microcontroller. Based on the test results, the resulting output voltage can be held constant at 14V by providing variations in wind speed changes which are simulated through PMSG speed changes. Transient responses with the fastest settling time of 1.2 s were obtained with the PID controller parameter values Kp = 0.6, Ki = 0.15 and Kd = 0.6.

Data-driven disturbance observer-based control: an active disturbance rejection approach

In this paper, a data-driven method for disturbance estimation and rejection is presented. The proposed approach is divided into two stages: an inner stabilization loop, to set the desired reference model, together with an outer loop for disturbance estimation and compensation. Inspired by the active disturbance rejection control framework, the exogenous and endogenous disturbances are lumped into a total disturbance signal. This signal is estimated using an on-line algorithm based on a data-driven predictor scheme, whose parameters are chosen to satisfy high robustness-performance criteria. The above process is presented as a novel enhancement to design a disturbance observer, which constitutes the main contribution of the paper. In addition, the control strategy is completely presented in discrete time, avoiding the use of discretization methods for its digital implementation. As a case study, the voltage control of a DC-DC synchronous buck converter affected by disturbances in the input voltage and the load is considered. Finally, experimental results that validate the proposed strategy and some comparisons with the classical disturbance observer-based control are presented.

Reliability of p-GaN Gate HEMTs in Reverse Conduction

Synchronous buck converter comprises a low side (LS) and a high side (HS) switch, where the HS switch works in the first quadrant (forward conduction) whereas the LS switch works in the third quadrant (reverse conduction). However, the reliability of the p-GaN gate high electron mobility transistor (HEMT) in reverse conduction is unclear. In this work, a comprehensive evaluation of this conduction mode for 200-V HEMTs was conducted. First, devices were subjected to time-dependent breakdown (TDB) measurements. By comparing different device configurations, the time to failure (TTF) was found to only scale with the number of gate fingers instead of the gate width ${W}_{G}$ , proving the critical spots are the intersection of gate fingers over the N implantation isolation. The reverse operation voltage of ${V}_{DS}$ for ten years lifetime was extrapolated to be −5.4 V, corresponding to a failure of 0.01% and 100 gate fingers. Second, the devices were submitted to 200-V ${V}_{DS}$ OFF-state stress for 10 s, after which the reverse drain current saw a negligible degradation. Third, the reverse conduction of the HEMTs only showed a very limited deterioration after a long-time bias temperature instability (BTI) stress at ${V}_{DS} = - 5.5$ V and ${V}_{GS} = 0$ V. This work proves the p-GaN gate HEMTs bear a high reliability in reverse conduction, which can simplify the design of synchronous power system.

Optimizing PWM Control for Efficiency and Reduction of False Turn-On Events in Synchronous Buck GaN Converters

Half-bridge GaN power converters are susceptible to false turn-on events, which can lead to shoot-through and potentially device-damaging currents. There are three main parameters that can be adjusted in PWM schemes to reduce the likelihood of false turn-on events: negative gate bias, gate resistance, and deadtime. However, these PWM parameters also affect converter efficiency in the inverse way, meaning less false turn-on events must be balanced with lowered efficiency. The novelty of this paper is to investigate the trade-off between reducing GaN false turn-on events (by reducing the transient peak of gate to source voltage) and maximizing the power converter efficiency, which has not been done in prior work. This paper investigates this trade-off using a synchronous buck converter over numerous operating points with variation of the three key PWM parameters. Six converter scenarios are considered with input voltage of 200/400V, switching frequency of 50/100kHz, and output power of 500W/1kW. For each scenario, negative gate bias is set to ™4.4V and −5V, gate on-resistance is set to $10\Omega $ and $12.5\Omega $ , and deadtime is varied at 60ns, 80ns, and 110ns. The results are organized into Pareto plots to find optimal points for efficiency and reduction of false turn-on events. The experimental results show that a further negative gate bias (−5V) most significantly reduces the false turn-on voltage peak and still achieves very high efficiency with appropriate selection of gate resistance and deadtime.

A Current-Mode Four-Phase Synchronous Buck Converter With Dynamic Dead-Time Control

A current-mode four-phase synchronous buck converter with a dynamic dead-time control (DDTC) method is presented in this work. A brief analysis of the multiphase buck converter power efficiency in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) is performed to provide design guidelines for minimizing power losses. In synchronous converters, the power efficiency can always be improved by optimizing the dead-time. Therefore, a gate driver with DDTC is designed to optimize the dead-time in every switching cycle, thereby improving power efficiency particularly under heavy load conditions. The proposed buck converter has the ability to deliver a maximum load current of 6.0 A at a typical output voltage of 1.2 V from a power supply of 3.0 V. A power efficiency improvement of over 1.0% is achieved when the load current is over 2.0 A, and an improvement of about 2.4% is obtained at a load current of 4.0 A. A peak power efficiency of 92.8% is measured at an output voltage of 1.8 V.

A simplified zero‐voltage switching detection circuit and switching loss dynamic optimisation method for synchronous buck converter

A simplified zero‐voltage switching detection circuit and switching loss dynamic optimisation method for synchronous buck converter

Common-Mode EMI Mathematical Modeling Based on Inductive Coupling Theory in a Power Module With Parallel-Connected SiC MOSFETs

Parallelization of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) could significantly improve the current capability and power rating of power converters. However, the inductive coupling effect of parasitic inductance between the paralleled branches is a critical challenge for the mathematical modeling of electromagnetic interference (EMI) in a power module with parallel-connected SiC MOSFETs (PMPSM). In this article, first, an EMI source generation mathematical modeling method for PMPSM is proposed. The quantitative analysis of EMI interference source caused by inductive coupling of PMPSM is introduced. Second, a common mode (CM) interference propagation mathematical modeling method for PMPSM is proposed. Through the equivalent CM interference source and equivalent impedance model, the strong and weak inductive coupling theory of CM interference equivalent circuit based on parallel-connected SiC MOSFETs is proposed. Third the effect of different decoupling capacitance values on EMI source is compared and analyzed and the influence of changing the ratio of coupling inductance inside and outside the decoupling branch on EMI source of parallel-connected switches is analyzed. Finally, a self-made 1.2-kV 160-A PMPSM based on EMI optimized layout is proposed and tested via an experimental platform of synchronous buck converter, which can verify the feasibility and validity of the proposed power module and the theoretical analysis.

An Accurate Datasheet-Based Full-Characteristics Analytical Model of GaN HEMTs for Deadtime Optimization

The gallium nitride high electron mobility transistors (GaN HEMTs) are a superior candidate for the new-generation power electronics systems with higher efficiency and power density. However, due to the unique reverse characteristics, the reverse voltage drop of GaN HEMTs is much higher than that of diode. The deadtime loss in GaN-based bridge converters will be comparable to switching losses if the deadtime is not optimized. To optimize the deadtime for higher efficiency, this article proposes an accurate analytical model of GaN HEMTs, including circuit's parasitic inductances, the nonlinear capacitances, the unique reverse characteristics, etc. Taking a GaN-based synchronous buck converter as the example, the proposed model is realized, which fully uses the datasheet to avoid additional experiments. In order to accurately measure the switching current for validation, a novel parasitics-based current measurement method is proposed. The proposed model is verified by simulation in LTspice and experiment, and good agreement is shown. Based on the accurate analytical model, the deadtime is optimized for different load currents to improve the efficiency within the full load range. Compared with the fixed deadtime of 15 ns, the increase of efficiency can be up to 8%. This work will promote the high-frequency application of GaN HEMTs.

Design of a 1.2 kW Interleaved Synchronous Buck Converter for Retrofit Applications in Aviation Systems

Design of a 1.2 kW Interleaved Synchronous Buck Converter for Retrofit Applications in Aviation Systems

Demonstration of a System Identification on Real Step-Down Power Converters

System identification is a scientific field with a wide range of applications, including transport and transportation systems. Automotive industry has a growing trend of power converters implementation. In addition, intelligence of converters is developing. Thus, the power electronics and autotronics are application areas where identification can also be applied. Since buck (step-down), boost (step-up) and buck-boost are the most common topologies of the converters in automobiles, this article aims to demonstrate possibilities of using the identification procedure on the synchronous buck converter. The objective is to obtain a parametric model that could be further useful in analysis and other work with the converter.

Study on Characteristics of Enhancement-Mode Gallium-Nitride High-Electron-Mobility Transistor for the Design of Gate Drivers

An enhancement-mode gallium-nitride high-electron-mobility transistor (E-mode GaN HEMT) operated at high frequency is highly prone to current spikes (di/dt) and voltage spikes (dv/dt) in the parasitic inductor of its circuit, resulting in damage to the power switch. To highlight the phenomena of di/dt and dv/dt, this study connected the drain, source, and gate terminals in series with inductors (LD, LS, and LG, respectively). The objective was to explore the effects of di/dt and dv/dt phenomena and operating frequency (fS) on drain-to-source voltage (Vds), drain-to-source current (Ids), and gate-to-source voltage (Vgs). The experimental method comprised two projects: (1) establishment of a measurement system to assess the change of electrical characteristics of the E-mode GaN HEMT and (2) change of the fS and the inductances (i.e., LD, LS, and LG) in the circuit to measure the changes in Vds, Ids, and Vgs, thus summarizing the experimental results. According to the experimental results on electrical characteristics, a gate driver circuit may be designed to drive and protect the E-mode GaN HEMT while being actually applied to a 120-W synchronous buck converter with an output voltage of 12 V and an output current of 10 A.

Digital current‐limited sliding‐mode control for synchronous buck converter with curved switching surface

SummaryIn this paper, a digital current‐limited sliding‐mode control (DCLSMC) for synchronous buck converter with curved switching surface is proposed. First, by discretizing the derivatives of a hybrid switching surface (SS) (consisting of second‐order and first‐order SS) and utilizing the reaching law method, a discrete‐time sliding‐mode control (SMC) is derived. Then, this SMC is integrated with a current‐limited control to construct the DCLSMC. Simulation results show that it can provide a current‐limited near‐time‐optimal dynamic response. The proposed SMC is implemented by pulse‐width modulation (PWM) technique, so it can provide a fixed switching frequency and has a low sampling requirement. The reachability of the SS for the proposed SMC and the stability of the quasi‐sliding mode motion is proven. Moreover, an additional PI control is introduced to eliminate the steady‐state error, and some implementation issues are discussed. Experimental results are given to verify the high dynamic performance and practical value of the proposed method.

Researching the efficiency of buck converter synchronous rectifier

The object of study is synchronous buck-voltage converter with digital control system. One of the most problematic things is energy changing and transmission in converters to reach certain numerical range with minimal losses in the components of the electrical circuit. An enormous calculated parameters of electrical scheme. There was advised and described both structure and electrical scheme of synchronous converter, which, thanks to digital system, provides dates with more accuracy connected with an impact on working scheme. There was shown detailed analysis example with a numerical value for the certain elements of electrical scheme. It’s a fundament in order to choose certain parts of electrical scheme according to the certain categories.During research there was used selection of hardware and software tools: elements for buck-converter – key, diode and capacitor; certain voltage and frequency range for microcontroller; control of the power keys of the circuit with the corresponding operating parameters for driver. There was analyzed and calculated all over the possible losses during the process bucking of the voltage to the certain level, an enormous losses in the components of the converter electrical scheme – induction coil, keys and capacitors. It’s an important part of synchronous buck-converter. There was calculated power losses and efficiency through the received graphics of keys commutation in electrical scheme. There were received graphic dependence of converter efficiency on output power; time characteristics of the control signal pulse-width modulation (PWM) and output voltage; dependence on the commutation losses. This is because advised synchronous converter has a set of features. Particularly analog to digital converter in the capacity of feedback, digital regulation system with a discrete step and rectification by replacing diodes with actively controlled switches. There are keys of low-side and high-side levels according to the passing voltage and current values. Therewith provides possibility for receiving more accuracy value. In comparison with analogic buck-converters, this converter has voltage parameter with fractional error.

Robust Constrained Predictive Fault-Tolerant Control With Generalized Input Parameterization and Event-Triggered Regulation: Design and Experimental Results

This article proposes some new improvements to the traditional constrained predictive fault-tolerant control (FTC) method by enlarging the maximal fault-tolerant admissible region and reducing the online computational complexity. In general, the generalized parameterization of predictive input and event-triggered predictive regulation are integrated into a framework of fault compensation-based dual-mode tube predictive FTC. This predictive FTC scheme has three notable characteristics: 1) The dual-mode FTC consisting of fixed-mode fault compensation and freely predictive adjustments allows most of the calculations to be predetermined offline, while only a simple optimization problem requires to be solved online; 2) the fault-tolerant ability is enhanced by utilizing generalized parameterization of predictive inputs to enlarge the region of attraction of a faulty system; 3) the real-time computational effort of predictive FTC is further reduced by constructing an event-triggered condition to avoid unnecessary online predictive optimization. A case study of a practical synchronous dc-dc Buck converter is given to validate the effectiveness of the proposed predictive FTC method.

Design of LQR controller for GaN based Buck converter

Abstract:This paper presents a design procedure of a switched-mode power converter, the well-known synchronous buck converter: the calculating method, and how to choose the parts of the converter are presented in detail, like the inductor, the capacitor and the semiconductors as well as the design of the state feedback. During the design process the efficiency and the high switching frequency are very important: the switching semiconductors are Gallium Nitride based. Then, a linear-quadratic regulator is designed and applied to the particular case of a buck converter.

Ultra‐high step‐down ZVS synchronous buck converter with low switch voltage stress

In this study, a new zero voltage switching (ZVS) synchronous buck converter with ultra-high step-down conversion ratio is introduced. By combining coupled inductors and energy-transferring capacitors, operating duty cycle is significantly extended while the voltage stress across the switches is reduced. Thereby, extremely low voltage gain can be achieved and the conduction loss is reduced owing to using switches with lower voltage rating. Also, by applying the interleaved method and complementary pulses for switches, the current stress and the output current ripple are reduced. In the proposed converter, soft switching condition is achieved for all switches without any auxiliary circuit. As a result, the overall efficiency of the introduced converter is improved. The converter operation and its design considerations are discussed. Experimental results are presented to validate the theoretical analysis.

Design and Control a High Gain Synchronous Buck Converter for a Solid State Distribution Transformer

A Conventional distribution transformer consists of bulky windings, cores and coolant liquid hence it is weighty and large in size. Now days, supporting by development of power semiconductor devices, the idea to develop distribution transformers using switching power converter technology becomes viable. This paper proposed a new structure of a solid state transformer (SST) for power electrical distribution system. The proposed SST works without utilizes high frequency isolating transformer. Instead, high gain cascaded Buck converters are used. The design of Buck Converters involves calculation of the applied components such as Inductors and Capacitors. Simulation result verifies that Buck Converters work well to reduce DC voltage of 25 kV DC voltage to 620 V DC without excessive ripple. The proposed SST is successfully operated to step down 20 KV of AC voltage to 400 V with THD of output voltage less than 2 %.

A ZVT-ZCT PWM Multiphase Synchronous Buck Converter with an Active Auxiliary Circuit for Low Voltage High Current Applications

A ZVT-ZCT PWM Multiphase Synchronous Buck Converter with an Active Auxiliary Circuit for Low Voltage High Current Applications

“Limiting power cycling stress in power MOSFETs by active thermal control”

In this work we propose a system which is able to actively control the temperature of a power MOSFET, in order to limit the temperature swing and hence to reduce the power/thermal cycling effect. To this purpose a dedicated driving circuit, allowing to control the gate voltage of the switching device under investigation, is used in a synchronous buck converter. Therefore, power losses can be modulated in order to reach the desired temperature through self-heating effects. The implemented control system is able to compensate the non-linear relationship between the gate voltage and the on-resistance. Moreover, to improve the response of the system, a predictor has been implemented, having the capability of on-line tuning the thermal resistance of the device. Experimental results are reported to demonstrate the suitability of this solution to control the temperature in the semiconductor device. The reduction of temperature swing under power and thermal cycling is also demonstrated.

A High-Input Voltage Two-Phase Series-Capacitor DC-DC Buck Converter

A high-input voltage 2-phase series-capacitor (2-pscB) DC-DC buck converter is theoretically analyzed, designed, and implemented. A new design approach for an automatic current sharing scheme was presented for a 2-phase series-capacitor synchronous buck converter. The series-capacitor voltage is used to achieve current sharing between phases without a current sensing circuit or external control loop as each phase inductor charges and discharges the series capacitor to maintain its average capacitor voltage constant. A novel isolated gate driver circuit to accommodate an energy storage capacitor is proposed to deliver isolated gate voltages to the switching transistors. An I2 control scheme that uses only one feedback path control for the four gate drivers is proposed to enable higher voltage conversion. An experimental 110-12 V 6 A load prototype converter was designed, and its current sharing characteristics were experimentally verified.