Symmetrical Multilevel Inverter Research Articles

A novel reliability estimation methodology towards the design and implementation of symmetric multilevel inverter for long run applications

AbstractMultilevel inverters (MLIs) are gaining attention in numerous applications due to their better performance attributes. Still, their utility in long‐run applications remains a critical concern due to the reliability issues. This work proposes a novel reliability estimation methodology tailored specifically for MLIs. The proposed reliability method employs advanced simulation techniques and statistical models to estimate the failure probabilities of critical components within the MLI. The proposed methodology provides a more optimal assessment of the MLI's expected reliability over time. This enables designers and engineers to make informed decisions regarding component selection, system configuration, and maintenance schedules to enhance the long‐term reliability of the MLI. Considering the drawbacks of the existing MLIs, this work has proposed a new symmetrical 7‐level inverter with promising functional and reliability traits. The proposed topology appears to surpass existing topologies in several key metrics, including switching losses, reliability, THD, and component count. The performance of the proposed MLI has been validated through hardware results. These results show that the reliability methodology implemented can accurately estimate the MLI's reliability across various scenarios, enabling the identification of potential failure points and the formulation of strategies to mitigate reliability risks.

Retraction Note: A novel design and performance improvement of symmetric multilevel inverter with reduced switches using genetic algorithm

Retraction Note: A novel design and performance improvement of symmetric multilevel inverter with reduced switches using genetic algorithm

Performance analysis for induction motor fed by reduced switch symmetrical multilevel inverter topology

Due to its capacity to supply more voltage levels than conventional 2-level inverters, multilevel inverters have attracted a lot of attention in recent years. Multilevel inverters may produce output waveforms that nearly approximate sinusoidal waveforms because to this characteristic, which also significantly lowers harmonic distortion. In many different power conversion systems, the introduction of reduced switch symmetrical multilevel inverter topologies has drawn significant interest. Numerous benefits, such as higher output voltage quality, reduced harmonic distortions, and increased power conversion efficiency, are provided by these novel topologies. The inclusion of these inverters in the feeding of induction motors is one of their many prominent uses. In this paper, a generalized topology is presented that generates nine levels using nine switching devices. To reduce complexity, switching pulses are generated using a low frequency pulse width modulation technique. MATLAB/Simulink is used to analyze the performance assessment of a unique three-phase symmetric cascaded multilevel inverter-based reduced switch symmetrical inverter fed induction motor drive, brushless DC (BLDC) motor and grid has been verified. According to the findings the total harmonic distortion (THD) is found to be 15% for a three-phase system and as the number of levels increases to 17 level the THD is 7.10%.

Solar PV based seventeen level reduced switch symmetrical multilevel inverter topology fed induction motor

Multilevel inverters have received a lot of interest in recent years due to their ability to deliver more voltage levels than typical two-level inverters. Because of this property, multilevel inverters can produce output waveforms that closely resemble sinusoidal waveforms, lowering harmonic distortion dramatically. The emergence of reduced switch symmetrical multilevel inverter topologies has developed the curiosity of many different power conversion systems. These new topologies offer numerous advantages, including greater output voltage quality, fewer harmonic distortions, and increased power conversion efficiency. The inclusion of these inverters in the feeding of induction motors is one of their many prominent uses. A 17 levels of multi-level inverter (MLI) topology is presented with reduced switch count and harmonic reduction for power quality improvement. The inverter is fed by isolated equal photovoltaic panels which act as direct current or DC source. To reduce complexity, switching pulses are generated using hybrid pulse width modulation technique which is designed as controller. Through the use of MATLAB/Simulink, the performance assessment of a unique cascaded multilevel inverter-based reduced switch symmetrical inverter feeding an induction motor drive has been verified. The harmonic distortion with reduced switches obtained is 7.47% which is comparatively less than when compared with conventional cascaded H-bridge topology.

An open circuit fault-tolerant seven-level inverter with symmetric sources and reduced switch count

In this study, a new structure of symmetrical multilevel inverter is proposed. The proposed structure offers fewer controlled switches, power diodes, DC sources voltage stress across switches and losses compared with classical and a few recently proposed topologies in the literature. This paper presents a fault-tolerant (FT) seven-level inverter to provide uninterrupted supply to the connected load under open circuit fault in any single switch of the presented configuration. This configuration uses only six unidirectional and one bidirectional switch for any switch fault-tolerant operation. The phase opposition disposition sinusoidal pulse width modulation (POD-SPWM) and phase disposition sinusoidal pulse-width modulation (PD-SPWM) scheme are used for proper DC link utilisation in seven-level output voltage. The proposed symmetrical 7-level topology requires fewer power components and offers reduced voltage total harmonic distortion (THD) compared to other multi-level inverter (MLI) topologies. This MLI is investigated in MATLAB and validated using hardware in the loop platform of OPAL-RT. The obtained results are presented to demonstrate the successful FT operation under any single switch open circuit fault.

Performance improvements of power converters for high power induction motor drive

This paper deals with a reliable transformer configuration with simple wiring and less number windings for twenty-four pulse AC-DC converter, which is used in medium voltage drive system so that it can adverse the effects produced by harmonics currents fed into the grid by converters that do not affect other consumers connected to the same electrical grid. Apart from this, a five-level symmetrical multilevel inverter configuration is used by cascading four two-level voltage source inverters. It is designed with less quantity of components counts like; power switches, diodes and electrolytic capacitors. Because power quality impacts the suitability of electrical power for consumer electronics, an attempt is made in this work to improve power quality through the connecting high-pulse converter at the grid end instead of 12-pulse and modified level-shifted pulse width modulation for a multi-level inverter at the drive end. Performance of the described topology is verified in the laboratory using a drive-through MATLAB/Simulink environment and a prototype at a reduced scale. The feasibility and effectiveness of the proposed topology are demonstrated by a comprehensive comparison with recently reported schemes. Promising results validate this new concept.

Design and Performance Analysis of New Multilevel Inverter for PV System

Multilevel inverters (MLIs) have recently attracted more attention in medium-voltage and high-power applications as they can provide an effective interface with photovoltaic (PV) systems. Conventional MLIs are used to generate higher voltage levels, which improve power quality and reduce the requirement for passive filters. However, recent research has focused on designing new MLI topologies using reduced switch counts and less voltage stress. This study, as such, proposes a new nine-level symmetric MLI for PV systems with a minimum number of switches. This decrease in the number of switches reduces the voltage stress across the switches and the number of driving circuits, which lowers the complexity of the control circuit and, as a result, lowers the cost and size of the system. This article compares the proposed MLI with other topologies based on the DC sources, switches count, gate driver circuits (Ngd), total standing voltage per unit (TSVPU), cost function (CF), and components count per level (CC/L). The proposed topology is integrated with the PV system. MATLAB software is used to evaluate the performance of MLI at step change in irradiance and under variable load conditions. The total harmonic distortion (THD) of the proposed topology is reduced with the implementation of phase disposition pulse width modulation (PD-PWM). In addition, PD-PWM is compared with phase opposition disposition pulse width modulation (POD-PWM) and alternative phase opposition disposition pulse width (APOD-PWM) modulation techniques. The simulation results reveal the improved performance of the proposed topology at variable irradiance and under varying load conditions. The comparison results reveal minimum (TSVPU), CC/L, CF, and switch count compared to existing topologies. Hence, the proposed topology of MLI is cost-effective and superior in all aspects compared to other topologies. In summary, it offers overall improved performance, and thus, it is feasible for the PV system.

Real time implementation of a new seven level multilevel inverter with design considerations for feasible and reliable operation

SummaryFuture power electronics is moving towards compact, economical, feasible, and reliable inverters for integration with renewable energy sources and energy efficient drive schemes. Multilevel inverters (MLIs) are becoming more prominent candidates for such medium and high power applications. Though their attractive performance offers a better choice, the real time implementation of MLIs suffer with higher part count, compatibility of bidirectional switches, complementary conditions, number of transitions, polarity conversion module, and reliability. In order to bridge this gap, this work has come up with a new seven level symmetric MLI for utility applications. The abovementioned design parameters have been considered in the proposed MLI that promotes feasible and reliable operation for real time implementation. To defend this proposed topology, recent symmetric seven level MLI topologies have been compared and the results are compiled from constructional, operational, and performance aspects using Matlab/SIMULINK. The performance indices quantified for the analysis include part count, total harmonic distortion (THD), complementary conditions, number of transitions, polarity conversion module, switching losses, and reliability in terms of failure rate. The proposed topology has been validated through real time hardware implementation in which Atmega 2560 microprocessor is deployed for pulse generation.

Reduced Device Count for Self Balancing Switched-Capacitor Multilevel Inverter Integration with Renewable Energy Source

In this study, a new switched-capacitor-based seven-level inverter topology with a photovoltaic system is presented. The proposed topology requires a smaller number of devices and has the ability to self-balance the voltage across the capacitor. The proposed topology configuration is simple and has the ability to extend to higher levels of voltage. This multilevel inverter topology is suitable for low- and medium-voltage applications with photovoltaic (PV) system integration. To improve the PV system efficiency as an input of a DC–DC boost converter, a Fuzzy logic-based maximum power point controller technique is used. A PV system with a DC–DC boost converter integrates with the proposed seven-level inverter topology. The anti-predatory particle swarm optimization (APSO) technique is used to solve the non-linear transduction equations of the seven-level PV switched-capacitor-based multilevel inverter (7L−PV−SCMLI) topology. The proposed APSO is described to minimize the harmonics in the multilevel inverter (MLIs), which is a complex optimization problem involving a non-linear transcendental equation. Furthermore, APSO can be applied in order to solve non-linear transcendental equations for all symmetrical and asymmetrical MLIs that have equal and non-equal DC sources. The APSO-based selected harmonic elimination (SHE) technique obtained the best switching angle value, and the optimized obtained switching angles reduced the total harmonic distortion (THD) of 7L−PV−SCMLI.

Modelling and design of new multilevel inverter for renewable energy systems with less number of unidirectional switches

This paper presents, a unique topology for multilevel inverter based totally on cascaded connection of fundamental modules. The proposed circuit is able to operate for both symmetrical and asymmetric inverter, which can be used for fuel cell and photovoltaic systems. The magnitude of two dc sources in basic module can be adopted for symmetrical and asymmetrical structure. In the symmetrical multilevel inverter, the magnitude of dc source is identical for each module. However, the magnitude of dc source for basic modules is unequal in asymmetrical configuration and their magnitudes are achieved from binary and trinary progression. Comparison results prove that the proposed circuit requires a fewer number of components, reduced power loss and improve the efficiency of the inverter. Moreover, the total standing voltage on switches is acceptable compare to contemporary topologies. The proposed inverter can be implemented to low-medium power renewable energy systems. Simulation and experimental results for 11, 15 and 19-level inverters are analysed to validate the operation and performance of proposed topology.

An Adaptive Hybrid Control of Reduced Switch Multilevel Grid Connected Inverter for Weak Grid Applications

Grid-connected inverters have a very significant role in the integration of renewable energy resources with utility grids. However, in recent studies, it is revealed that grid-connected inverters are vulnerable to instability when the nature of the grid changes from strong to weak, which produces uncertainty and performance degradation. An increase in grid impedance decreases stability margins, tremendously increases total harmonic distortion after a certain limit, and amplifies the voltage harmonics in the grid. A cascaded reduced switch symmetrical multilevel inverter along with an adaptive hybrid control technique is proposed for injecting power generated from distributed energy resources efficiently and stably to the utility grid. This research contributes twofold: a multilevel inverter topology and the other is its control method. The multilevel inverter reduces total harmonic distortion and size of the filter while increasing power handling capability. The control unit of the proposed system further consists of two parts: one is the synchronous frame current controller, and the other is stationary frame adaptive harmonic compensators. The grid current controller which is working in a synchronous reference frame ensures regulated current injection to the grid. It is not favorable to implement a harmonic compensator in a synchronous reference frame due to computation complexities. Therefore, the stationary reference frame controllers are used for harmonic compensations. But the resultant harmonic compensators have narrow bandwidth. Thus, these are not robust against variation in grid frequency. In this research, this problem is resolved by adding the adaptive features within the harmonic compensators which shift its passing band according to the frequency of the grid while remaining with the same bandwidth. The proposed design of the hybrid frame controller is validated by considering a nine-level inverter connected with a weak grid.

Online Unified Solution for Selective Harmonic Elimination Based on Stochastic Configuration Network and Levenberg–Marquardt Algorithm

In this article, an online unified solution based on stochastic configuration network (SCN) and Levenberg– Marquardt (LM) algorithm is proposed to generate optimal switching angles for selective harmonic elimination (SHE) in both the symmetric and asymmetric cascaded H-bridge (CHB) multilevel inverters (MLIs). Different from the traditional neural network framework for SHE, this unified solution uses SCN to only generate initial values of the switching angles online, which significantly reduce the precision demand on training SCN and avoids the local optima problem of gradient descent algorithm. After obtaining the initial values from SCN online, the LM algorithm can be used to rapidly solve the exact switching angles for SHE, which guarantees the solving efficiency and precision of the final solutions. Moreover, the stability of the proposed method is proved via Newton-like convergence theory. Compared with intelligent search algorithms and look-up table method, the proposed solution can not only online generate optimal theoretical switching angles but with much fewer data storage space. Experimental results of both symmetric and asymmetric MLI cases are presented to validate the correctness and online applicability of the proposed solution.

Review and design of modular multilevel inverter with modified multicarrier PWM techniques for solar PV applications

PurposeThese implementations not only generate excessive voltage levels to enhance the quality of power but also include a detailed investigating of the various modulation methods and control schemes for multilevel inverter (MLI) topologies. Reduced harmonic modulation technology is used to produce 11-level output voltage with the production of renewable energy applications. The simulation is done in the MATLAB/Simulink for 11-level symmetric MLI and is correlated with the conventional inverter design.Design/methodology/approachThis paper is focused on investigating the different types of asymmetric, symmetric and hybrid topologies and control methods used for the modular multilevel inverter (MMI) operation. Classical MLI configurations are affected by performance issues such as poor power quality, uneconomic structure and low efficiency.FindingsThe variations in both carrier and reference signals and their performance are analyzed for the proposed inverter topologies. The simulation result compares unipolar and bipolar pulse-width modulation (PWM) techniques with total harmonic distortion (THD) results. The solar-fed 11-level MMI is controlled using various modulation strategies, which are connected to marine emergency lighting loads. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by using SPARTAN 3A field programmable gate array (FPGA) board and the least harmonics are obtained by improving the power quality.Originality/valueThe simulation result compares unipolar and bipolar PWM techniques with THD results. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by a SPARTAN 3A field programmable gate array (FPGA) board, and the power quality is improved to achieve the lowest harmonics possible.

Modified cascaded multilevel inverter for renewable energy systems with less number of unidirectional switches

This study presents, a novel topology for multilevel inverter based on series connection of basic modules. The suggested topology is utilize for symmetrical and asymmetric source system, which can be used for fuel cell and photovoltaic systems. In the symmetrical multilevel inverter, the values of input dc are equal. However, the magnitude of dc supplies for basic modules are unequal in asymmetrical multilevel inverter and their magnitudes are achieved from binary and trinary progression. Comparison results prove that the proposed topology needs a less components, reduced power loss and improve the efficiency of the inverter. Moreover, the peak-inverse-voltage on switches is also lower in proposed circuits. A detailed analysis of the suggested circuit is explained through the example of a 11-level, 15-level and 19-level inverter. The performance of the proposed circuit topology is analysed through MATLAB/SIMULINK environment and validated via experiment conducted on a laboratory prototype with real time controller dSpace 1104. The proposed inverter can be implemented for low-medium power in renewable energy systems.

A Reduced Switch Count Symmetric T-type Multilevel Inverter with Single and Multiple Switch Open Circuit Fault Tolerant Capabilities

In this paper, a nine-level inverter topology is proposed with the least number of switches and other components for fault tolerant (FT) operation. The proposed fault tolerant topology requires only one additional switch to execute the fault tolerant operation. The proposed topology also results in reduced total harmonic distortion (THD) as compared with other reported fault tolerant topologies for a 9-level output. A detailed analysis of the topology is presented and the fault tolerant operation is demonstrated under any single, double, triple, and quadruple switch faults using MATLAB/ Simulation and OPALRT hardware in loop (HIL) real time simulator. The proposed concept is validated for single and multiple switch faults and R-L load variation on a low scale laboratory hardware set-up.

An Asymmetric Switched-Capacitor Multicell Inverter With Low Number of DC Source and Voltage Stress for Renewable Energy Sources

Asymmetric multilevel inverters generate high-quality output voltage using the same number of components as symmetric multilevel inverters. The main drawback of these topologies is that they require many DC voltage sources, and the power switches must endure high voltage stress. In this paper, a switched-capacitor sub-module inverter topology is proposed to reduce the number of DC voltage sources and the voltage stress on the switches of asymmetric multilevel inverters. The proposed sub-module inverter can generate 15 voltage levels by using two DC power supplies and a capacitor. The voltage of the capacitor can be automatically charged at half of the input DC power supply without the need for any sensors. In addition, the capacitor charging operation does not produce an inrush current because it is charged by the direction of the output current; this is an advantage over switched capacitor multilevel inverters. A modular topology is also presented based on the proposed sub-module inverter to achieve high voltage levels while reducing the number of elements. A comprehensive comparison between the proposal and other multilevel inverter topologies is performed to validate the design of the proposed inverter. In addition, thermal and loss distribution simulations of the proposed sub-module inverter are performed. Finally, the performance, efficiency, and accuracy of the proposed inverter are confirmed through laboratory prototyping.

Cascaded Transformer Symmetric Single-Phase Multilevel Converters With Two DC Sources

This article investigates three families of symmetric single-phase multilevel converters with two dc links for inverter applications. The proposed configurations are based on cascaded cells formed by two-level legs and injection transformers that are connected to a basic cell formed by two half H-bridges with shared-legs. Three types of cells are proposed: cell <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$U$</tex-math></inline-formula> , composed of three legs and two transformers; cell <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V$</tex-math></inline-formula> , composed of four legs and three transformers; and cell <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$W$</tex-math></inline-formula> , composed of six legs and four transformers. The topologies operate in the nonisolated condition (with one less transformer). The generalized system model equations of proposed topologies are discussed. The transformer turns ratios and the dc-link voltages are determined in order to improve the system symmetry and generate the output voltage with low harmonic contents. An unidimensional pulsewidth modulation technique is presented to control the switches of the converters. Harmonic distortion analysis, number of components, rating of the semiconductor devices, power semiconductor losses, IGBT and diode temperature analysis, and transformer ratings are used to compare the proposed configurations with a modular symmetric multilevel inverter formed by three-leg modules cascaded thought injection transformers. The proposed converters present advantages as higher quality of output voltages, and lower semiconductor power losses using the same or lower number of circuit components. Experimental results are shown to demonstrate the feasibility of the systems.

A Reduced Switch Count Seven Level Symmetrical Inverter with Low Distortion

Various types of new structures in multilevel inverters are evolving day by day. One among those is the reduced switch count type multilevel inverters. This inverter consists of low number of switches, gate driver components, and other switches like auxiliary switches. Depending on the value of the voltage sources we have symmetrical and asymmetrical multilevel inverters. In this paper, the seven level symmetrical inverter design is shown for seven levels in its output. The output voltage waveform is plotted and its FFT is performed and the THD values are shown. The inverter is simulated in SIMULINK software. Index Terms: Seven level MLI, inverter, and Modular Inverter.

Design and Development of N-Level Symmetrical Multilevel Inverter Topology with Reduced Switches

In this paper, 11-level multilevel inverter with reduced power switch configuration is developed and investigated. This proposed configuration can be extended for [Formula: see text] levels with the required number of power switches. Comparative analysis between the proposed multilevel inverter topology and well-known existing multilevel inverter topologies is carried out. Fundamental switching angle calculation for the power switches of the proposed topology has been optimized using black widow optimization algorithm technique and also the proposed topology has been tested with the classical multicarrier alternative phase opposition disposition PWM technique. To test the effectiveness of the proposed topology, different tests have been conducted such as testing with different modulation indexes, DC input voltages, load settings and voltage ride-through capabilities. This paper presents various simulation and experimental results under various operating conditions to prove the performance of the proposed multilevel inverter topology.

Harmonic Elimination in Multilevel Inverter Using TLBO Algorithm for Marine Propulsion System

Abstract Stringent environmental regulations and increasing oil prices showcase the need for renewable energy sources like solar in marine transportation. The application of solar energy in electric propulsion systems is growing tremendously. Power electronics-based inverters help in harvesting direct current (DC) power into alternating current (AC) power. A multilevel inverter (MLI) is a popular power electronic converter producing the desired output voltage from several DC input voltage sources like batteries, supercapacitors, and solar panels. An MLI consists of several switches whose action results in severe harmonic issues. Specific harmonic elimination in MLI is a challenging job and is resolved conventionally by the Newton-Raphson method. However, nowadays, soft computing techniques are used to solve nonlinear equations optimally. In this manuscript, minimization of total harmonic distortion in MLI has been taken as an optimization problem and is solved using teaching-learning‐based optimization (TLBO). The TLBO algorithm is applied to compute the optimum switching angles for MLI to produce the required fundamental output voltage with less harmonic distortion. As it does not require any algorithm-specific parameters, TLBO is an effective method to obtain optimum MLI solutions. A 21-level symmetric MLI is simulated and is used to evaluate the performance of the TLBO algorithm. The simulation results are validated using an experimental model of proposed MLI with a Xilinx Spartan-SA field programmable gate array‐based controller. This research outcome bears testimony to TLBO optimization's efficiency in improving the quality of the power generated in ships using renewable sources.