Inverter Switching Losses Research Articles

Introduction and Advantage of Space Opposite Vectors Modulation Utilized in Dual Two-Level Inverters With Isolated DC Sources

In this paper, space opposite vectors modulation (SOVM) is proposed to decrease common-mode voltage (CMV), and also improve inverter switching losses compared to pulsewidth modulation 7 (PWM7) for dual two-level inverters (DTLI). Employing the control simplicity of DTLI to achieve multilevel winding voltages, the two conventional two-level inverters of DTLI are independently controlled; consequently, the capability of adjusting phase difference between the carriers (PDC) of two inverters is established. To mathematically evaluate and compare the performance of DTLI driven by SOVM and PWM7, CMV and losses for different PWMs are formulated. Moreover, contour, three- and two-dimensional analyses are conducted to investigate the effects of PDC and modulation index on CMV, voltage total harmonic distortion (THD), voltage weighted THD and switching losses. All theoretical bases, simulation results from MATLAB/Simulink and experimental results conducted by a DTLI prototype validate the superiority of SOVM over PWM7.

Implementation Hardware of single phase H-Bridge Inverter with Selective Harmonic Elimination Pulse Width Modulation Technique

Recently the use of high power Voltage Source Inverter is increased but the problem of harmonic and switching losses in inverter are also increased because of the use of power electronic switches, which are used for fast and efficient operation. In this paper, for eliminating the harmonics presented in H Bridge inverter during switching operation of the power electronic switches the Selective Harmonic Elimination Pulse Width Modulation (SHEPWM) Technique is used. For H-Bridge operation specific switching angles are calculated by solving nonlinear equation using Newton Raphson method. The result of H-bridge single phase inverter are implemented on hardware with and without SHEPWM technique for eliminated specific 3rd,5th,7th,9th,11th,13th voltage harmonics are obtained. Comparison of harmonic analysis of H bridge inverter with and without SHEPWM technique is done. In this paper Modulation index (m) is varied to control output voltage amplitude and the results are observed for maximum modulation index.

A Novel Discontinuous PWM Strategy to Control Neutral Point Voltage for Neutral Point Clamped Three-Level Inverter With Improved PWM Sequence

In order to reduce switching loss of neutral point clamped three-level inverter (NPC TLI), generally discontinuous pulsewidth modulation (DPWM) is used. But it can result in dc offset and ac ripple on neutral point (NP) voltage. So a novel pulse sequence DPWM (NPSDPWM) is proposed to reduce switching loss and control NP voltage simultaneously in this paper. NP voltage is controlled by choosing proper clamping modes. To avoid unexpected switching action during changing clamping mode, an improved pulse sequence is also presented. The switching loss and NP voltage ripple of NPSDPWM, traditional and proposed DPWM in previous literature are compared, respectively. The experimental results show that NPSDPWM has well NP voltage control ability and the switching losses are reduced effectively.

A PWM Scheme for Five-Level H-Bridge T-Type Inverter with Switching Loss Reduction

In this paper, a new pulse width modulation (PWM) scheme using an offset function to reduce switching loss in the five-level H-bridge T-type inverter (5L-HBT2I) is proposed. The proposed modulation technique is implemented with a third harmonic offset voltage function. A new control voltage, that is adding the offset voltage into the initial control, is shifted to the top or bottom position of the carrier, simultaneously—where the absolute value of its load current is high or medium in comparison to other phase load currents. Due to reducing the intersection between a control voltage and the carriers, the number of switch commutations of the inverter is reduced. As a result of reducing the number of commutation count with a high current at the non-switching position, the switching losses of the inverter are decreased. Analysis and comparison of switching losses on the two-level and three-level inverters, which are components of 5L-HBT2I are presented. The power loss analysis on the 5L-HBT2I is performed. The proposed technique implements the switching loss reduction strategy based on setting the operation of the two-level inverter in six-step mode. PSIM software is used to clarify the proposed technique. The simulation results show that the total switching losses of the proposed technique in 5L-HBT2I reduce in comparison to the conventional sine PWM technique. A prototype is built to validate the proposed scheme. Simulation and experimental results match the analysis.

Cost Effective Single-Phase DSTATCOM for Low Power Applications

In this article, a single-phase Distribution Static Compensator (DSTATCOM) with reduced dc-link voltage is proposed for power quality improvement in a distribution system. Generally, the dc-link voltage of DSTATCOM is maintained twice the peak of Point of Common Coupling (PCC) voltage by voltage regulation loop. But, the dc-link voltage is maintained itself without voltage regulation loop in the proposed method. For this case, the required dc-link voltage magnitude is less when compared to conventional method. Under predefined load conditions such as agriculture pump set loads, this less voltage is sufficient to give satisfactory performance. Therefore, the rating of DSTATCOM is reduced and thereby the cost of system is reduced. The proposed method enables compensation of reactive power and mitigation of source current harmonics in a distribution system for low power applications. The advantages of the proposed method are elimination of dc voltage sensing elements, minimization of switching loss of Voltage Source Inverter (VSI) and cost effective. The proposed single-phase DSTATCOM performance is demonstrated through MATLAB/simulink and validated by experimental results with agriculture pump set load.

A Voltage-Edge-Rate-Limiting Soft-Switching Inverter Based on Auxiliary Resonant Pole

To increase switching frequencies while limiting switching losses in voltage-source inverters, power switches have been made significantly faster with achievable switching times now less than 100 ns. However, faster switches generate larger inverter output voltage edge rates ( ${dv/dt} $ ) and result in deleterious effects in variable-speed drive systems including transient overvoltages at motor terminals, electromagnetic interference, and bearing failures due to microarcs. A common approach for limiting peak ${dv/dt} $ involves using a ${dv/dt} $ filter. However, the ${dv/dt} $ filter introduces extra power losses and increases the overall size and weight of the system. Soft-switching circuits, which were originally developed to reduce switching losses, can help reduce ${dv/dt} $ , but using soft-switching to accurately control ${dv/dt} $ has not been fully explored. In this paper, a new soft-switching circuit, entitled the auxiliary resonant soft-edge pole (ARSEP), is set forth. ARSEP improves the available soft-switching circuits so that ${dv/dt} $ can be accurately controlled through the circuit parameter design. An ARSEP inverter prototype was designed, simulated, and constructed to verify its performance and benefits. Compared to a conventional hard-switched inverter with a ${dv/dt} $ filter, the ARSEP inverter prototype results in a significant reduction in overall power loss, inductor volume, and weight.

Analytical compensation of harmonics caused by 60° flat‐top modulation

The 60° Flat-Top PWM modulation method (also called DPWM1, two-phase, or 60° bus-clamp) is widely used by the industry to reduce switching losses in three-phase inverters by connecting one of the three-phase legs to the positive or the negative DC rail continuously for 60°of the fundamental period. It is widely known that - compared to the most used SVM modulation - the Flat-Top modulation increases switching frequency current components. The actual amount is highly dependent on the modulation index. It is a lesser known fact that - at each switch-over happening at every 60°, because of the change of the phase in the switching frequency current component - low-order harmonics are produced as well. The effect of these can become especially significant, if one of the produced frequencies falls near to the resonant frequency of the LC or LCL filter. A modification of the original Flat-Top method has been developed, that corrects the duty ratios around the edges of the zero-sequence voltage signal. This way the filtered output voltage remains sinusoidal, while keeping the efficiency advantage of the Flat-Top. Experimental results on two different inverters show that the novel method significantly decreases the current THD.

Implementation of a Novel Hybrid UPQC Topology Endowed With an Isolated Bidirectional DC–DC Converter at DC link

This paper introduces an original hybrid unified power quality conditioner (HUPQC) topology as an alternative solution to electrical power quality problems. The proposed HUPQC consists of the shunt hybrid active power filter (SHAPF), the dynamic voltage restorer (DVR), and the isolated bidirectional dc-dc converter (BiDC) located at the common dc link. The SHAPF enables reduction in the voltage rating of the dc-link capacitor, helps to reduce the cost and the size of the dc link, and hence reduces switching losses of the voltage source inverter. Besides the novelty of its topology, dynamic reactive power compensation capability is realized for the first time in the literature within HUPQC concept by achieving adaptively controlling dc-link voltage. The BiDC not only provides isolation and bidirectional power flow between the DVR and the SHAPF but also operates to keep the dc-link voltage of DVR constant against adaptively changing dc-link voltage of the SHAPF. In addition to these, a new hybrid voltage sag/swell detection algorithm based on the combination of the improved Clarke transformation and the enhanced phase-locked loop is developed and introduced. In order to verify the viability and effectiveness of the proposed HUPQC topology, experimental studies are carried out.

Adapted near‐state PWM for dual two‐level inverters in order to reduce common‐mode voltage and switching losses

In this paper, a near-state pulse-width modulation (NSPWM) algorithm is proposed and implemented on dual-two-level voltage-source inverters (D2L-VSIs) in order to reduce the common-mode voltage (CMV), the inverter switching losses, the current total harmonic distortion, and the side effects of bearing currents --compared with space vector modulation (SVM) and PWM7. To gain these goals, two conventional two-level inverters of the D2L-VSI are controlled, separately, with specific switching sequences and an adjusted phase difference between the carriers of two inverters. For evaluating and comparing these PWM techniques mathematically, both CMV root mean square generated and switching losses of the D2L-VSI are formulated as a function of the power factor of the D2L-VSI, which is driven by the methods detailed in this study. Eventually, theories and analysis, as well as simulations and experimental results --which are generated by MATLAB/Simulink environment and a 300 W scaled-down D2LVSI prototype, respectively --authenticate the superiority of the proposed NSPWM over both SVM and PWM7.

An Overall Minimized Switching Loss Discontinuous PWM Strategy for Neutral Point Clamped Three Level Inverters

Aim at reducing switching loss (SL) of neutral-point clamped three-level inverter (NPC TLI) as much as possible, a novel SL minimized discontinuous pulse width modulation (SLMDPWM) strategy is proposed in this paper. The core of SLMDPWM is that the specific maximum or middle phase current is clamped to positive bus, NP or negative bus according to modulation index and power factor angle. The realization of SLMDPWM based on carrier-based PWM (CBPWM) is revealed to simplify the calculation process. The performance characteristics of SLMDPWM and DPWM I-IV in term of the output voltage, SL and NP voltage ripple are compared by simulation and experimental results, and conclusion can be acquired that the SL of SLMDPWM is reduced significantly.

Investigation of Switching Sequences on a Generalized SVPWM Algorithm for Multilevel Inverters

This paper investigates the various switching sequences on a generalized 60[Formula: see text] distributed coordinate system-based space vector pulse width modulation (SVPWM) algorithm for multilevel inverters. The main focus of this work is to improve the inverter output voltage profile by taking advantage of the redundancy inverter switching states. With the help of SVPWM algorithm, the three nearest vectors have to find out the synthesis of the [Formula: see text] location and then by applying the various optimum switching sequences, the inverter produces less harmonic content in the output voltage compared to the conventional switching sequence. All the switching sequence designs are developed with the help of minimum change detector (MCD) by using switching redundancies in order to reduce inverter switching loss. Simulation results to analyze various sequences on the general SVPWM algorithm are presented in the seven-level cascaded H-bridge (CHB) inverter. To validate the results, hardware results are presented on the seven-level CHB inverter.

Loss Minimization Control of Linear Induction Motor Drive for Linear Metros

The linear induction motor (LIM) drive in linear metros suffers heavily from low efficiency due to its large air-gap length and the partial load conditions, where high loss appears in both the LIM and the inverter when a constant excitation current is generally required. Worse still, the end-effects, including both the transversal edge-effect and longitudinal end-effect, would lead to the decrease of magnetizing inductance and the increase of secondary resistance, resulting in extra loss and further deterioration of drive efficiency. To reduce the loss of the LIM drive, this paper proposes a novel loss model based loss minimization control (LMC) scheme for LIM drives. First, in the equivalent circuit and the mathematical model of LIM, four coefficients are introduced to evaluate the influence of the end-effects. Based on a thorough analysis of the LIM copper and core losses, together with the inverter conduction and switching losses, a novel integrated loss model of LIM drive is then developed, and an improved LMC scheme to obtain the optimal solution online is proposed to minimize the loss of the LIM drive. The proposed control method is successfully implemented in a 3-kW LIM drive prototype. The effectiveness of the proposed method is validated by the experimental results.

Industrial Approach to Design a 2-kVa Inverter for Google Little Box Challenge

Uninterruptible power system, photovoltaics inverters, home appliances, motor drives, and automotive systems require highly efficient, reliable, and compact single-phase inverters. This paper presents different industrial design approach and experimental performance of high power density (100 W/in3) single-phase inverter with power output of 2 kVA that was presented for Google Little Box challenge. Multiple technical challenges were addressed, different methodologies described to achieve high power density and high efficiency reliable design. High power density was achieved by using the combination of optimized forced air cooled heatsinks, fully digital control, optimized component packaging, and by the introduction of a series active filter that enabled to reduce the size of dc bus capacitors. Low-loss high flux density magnetic materials such as Amoflux powder iron for power inductors and nanocrystalline magnetic materials for electromagnetic interference filter were also used. To minimize inverter switching losses, SiC devices operating at low switching frequency were adopted. Also, an innovative ground current control strategy is devised to minimize the ground leakage currents.

Space Vector Pulse Width Modulation Method to Reducing a Switching Loss in Inverter

In This paper proposed an area space vector PWM technique that reduces switch victims of an electrical converter mainly efficiently by two-phase modulation technique. This technique chooses the most favorable one that minimizes a replacement switch (SW) defeat judgment supported lessening belongings in switch period allowing for section currents in numerous lessening patterns. This paper proposes an basic curved PWM technique . The planned technique created it attainable to scale back range of switch of the biggest or second major present section . And it will mechanically acclimatize to weight circumstances with varied power factors. Calculated switch wounded area unit condensed to regarding 50% by the planned technique.

Hybrid-Modulation-Based Bidirectional Electrolytic Capacitor-Less Three-Phase Inverter for Fuel Cell Vehicles: Analysis, Design, and Experimental Results

This paper presents a novel six-pulse low-frequency (LF) fluctuating high-voltage dc-bus-based power system architecture for fuel cell vehicles (FCVs) application. A novel hybrid modulation scheme consisting of six-pulse modulation at LF scale and modified secondary modulation and 33% pulse width modulation at high-frequency (HF) scale is proposed. Three-phase ac waveforms for the propulsion system of FCVs are generated from LF fluctuating high-voltage dc bus. The proposed modulation technique significantly reduces the switching losses of the bidirectional dual-stage inverter: 1) soft-switching of both sides of the front-end current-fed full-bridge converter is realized; and 2) at any moment, only one leg of back-end three-phase inverter is switched at HF, while the other two legs are kept in on or off states. This tremendously reduces the bidirectional inverter's switching losses and improves the system efficiency. The LF fluctuating high-voltage dc bus allows the elimination of large electrolytic dc-link capacitor, which contributes to a more reliable and compact design. This paper presents the operation, analysis, and design of a bidirectional inverter implementing the proposed hybrid modulation technique. Simulation results obtained from power electronics simulation software PSIM and experimental results from the lab prototype clearly validate the effectiveness of the proposed modulation technique.

Electrolytic Capacitorless Current-Fed Single-Phase Pulsating DC Link Inverter

This paper proposes a current-fed single-phase inverter without constant intermediate DC link. It eliminates electrolytic capacitor from the DC-link and introduces an intermediate pulsating DC bus. The proposed topology is modular with three full-bridges making it scalable for high-power applications. New pulsating-DC-modulation for back-end pulsating DC-link inverter and secondary modulation (SM) for front-end DC-to-pulsating DC converter is proposed. Soft-switching and device voltage clamping of both primary side and secondary side devices of front-end current-fed full-bridge converter is realized. A rotating partial hybrid pulsewidth modulation has been introduced. One leg of inverter is commutated at a low switching frequency, while the other leg is operated at a high switching frequency for partial period of a line frequency cycle. Thus, switching losses of the back-end inverter are considerably reduced. Rotating mechanism is used to equalize the switching losses of four switches of the inverter. This paper presents detailed operation and analysis of the topology with a proposed modulation scheme. Simulation and experimental results validate the effectiveness and accuracy of the proposed modulation scheme as well as soft-switching and performance of the converter.

Power Sharing and Voltage Vector Distribution Model of a Dual Inverter Open-End Winding Motor Drive System for Electric Vehicles

A drive system with an open-end winding permanent magnet synchronous motor (OW-PMSM) fed by a dual inverter and powered by two independent power sources is suitable for electric vehicles. By using an energy conversion device as primary power source and an energy storage element as secondary power source, this configuration can not only lower the DC-bus voltage and extend the driving range, but also handle the power sharing between two power sources without a DC/DC (direct current to direct current) converter. Based on a drive system model with voltage vector distribution, this paper proposes a desired power sharing calculation method and three different voltage vector distribution methods. By their selection strategy the optimal voltage vector distribution method can be selected according to the operating conditions. On the basis of the integral synthesizing of the desired voltage vector, the proposed voltage vector distribution method can reduce the inverter switching frequency while making the primary power source follow its desired output power. Simulation results confirm the validity of the proposed methods, which improve the primary power source’s energy efficiency by regulating its output power and lessen inverter switching loss by reducing the switching frequency. This system also provides an approach to the energy management function of electric vehicles.

A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI)

Since last decades, the pulse width modulation (PWM) techniques have been an intensive research subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter output current/ voltage total harmonic distortion (THD), inverter maximum output of DC bus voltage. The Sinusoidal PWM is generally used to control the inverter output voltage and it helps to maintains drive performance. The recent years have seen digital modulation mechanisms based on theory of space vector i.e. Space vector PWM (SVPWM). The SVPWM mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with the reduction in the harmonics of inverter output voltage and reduced communication losses. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the performance and reliability of microprocessors has increased. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSPs. From the recent study, analysis gives that use of Field Programmable Gate Arrays (FPGA) can offer more efficient and faster solutions. This paper discusses the numerous existing research aspects of FPGA realization for voltage source inverter (VSI) along with the future line of research.

Subfundamental Cycle Switching Frequency Variation for Switching Losses Reduction of a Two-Level Inverter Traction Drive

This paper proposes a method to vary the switching frequency within a fundamental cycle to reduce the switching losses of a two-level inverter while maintaining the peak–peak current ripple within a predefined limit. Unlike conventional strategies, the proposed technique utilizes precomputed switching frequency variation factors without relying on prediction or optimization techniques, since the peak–peak current ripple follows a definite trajectory within a fundamental cycle. Moreover, the variation in switching frequency is further controlled based on the operating carrier ratio and modulation index. The proposed strategy has been validated through both the simulation and experimental results on a permanent magnet synchronous motor drive for the space vector and discontinuous pulsewidth modulation patterns, and the results demonstrate that it reduces the two-level inverter switching losses up to 15%.

A new strategy of efficiency enhancement for traction systems in electric vehicles

The inverter-motor drive system is the main traction force in electric vehicles (EVs). The overall efficiency of inverter-motor will directly determine the energy consumption of EVs. In this paper, aiming at improving the overall efficiency of inverter-motor, a novel methodology is proposed. Firstly, the iron loss, copper loss and stray loss of motor, as well as the devices’ conduction loss and switching loss in inverter are modeled. Afterwards, based on previous loss model strategy and gold section search strategy, a novel hybrid efficiency-optimization control strategy is proposed. The proposed method combines each benefit in loss-model and gold section search, and can realize high efficiency operation of the inverter-motor system in large power range. Additionally, the proposed method manifests faster search speed and better accuracy compared to conventional methods. Experiment results validated the effectiveness of the proposed hybrid control strategy. Meanwhile, the impact of the efficiency improvement on the driving cycle is further investigated through Advanced Vehicle Simulator (ADVISOR) simulations.