Design Of Switching Circuits Research Articles

New approach to the design of thyristor and transistor switching circuits

The paper gives a new approach to the design of power electronic circuits. Time periodic functions of excitation and response are required as input data for the design. A sequence of the linear time-invariant circuits is found on the basis of these data. As a result of the synthesis method new switching structures are obtained. The synthesis method presented can be applied to create new thyristor and transistor arrangements, particularly thyristor compensators.

Book Review: Analog and Switching Circuit Design Using Integrated and Discrete Devices

Book Review: Analog and Switching Circuit Design Using Integrated and Discrete Devices

Power MOSFET dynamic large-signal model

A large-signal dynamic circuit model for the double-diffused vertical power MOSFET is reported. The model is physically based and its parameters are readily determined from static curve tracer measurements and small-signal measurements using simple data-reduction techniques. The equivalent circuit can be implemented in general purpose nonlinear circuit analysis computer programs, such as SPICE 2, for use in the analysis and design of switching circuits. The accuracy of the model is verified by the excellent correlation obtained between detailed simulated and measured switching characteristics on an experimental high-speed switching circuit.

Potential Significance to Neurophysiology of Design Algorithms for Digital Computers

A set of algorithms has been developed within the computer industry that aids in the design and comparison of large switching circuits. To apply these algorithms to the nervous system in a realistic way, it is necessary to find neurons where (a) the electrophysiological data exist to allow construction of a plausible model; and where (b) the behavior of the neuron is not dependent on its distant past, so that the cell may be approximated by a switching circuit. It is also necessary to find areas of the nervous system whose structure resembles that of so-called regular designs; a regular design is a logic circuit in which feedback loops are constrained to take certain simple forms. In cases where local feedback loops are an intricate part of the design (as is true in virtually all areas of the mammalian central nervous system), this constrains one to analyze the behavior of the area in question only over time intervals sufficiently short so that such feedback loops can be ignored. Certain areas, such as the retina, are excluded because the individual neurons behave nondiscretely and are intimately coupled together (i.e., the retina does not resemble a regular design).

Application of the optimization program AOP to the design of memory circuits

The memory cycle time of an IGFET read-only memory cell is designed using AOP, a program for automated and interactive optimization of electrical networks. It is shown how AOP allows the user to specify multiple performance objectives and to request analysis, and/or adjoint sensitivity computation, and/or automated optimization for networks described in the ASTAP input language. A. procedure is given for applying optimization to switching circuit design, and a summary is given of the hard experience gained from applying AOP to a practical problem in LSI design.

Subnanosecond-transient detector using emitter-coupled logic gates

It is shown that tunnel-diode circuits can be made directly compatible with emitter-coupled logic gates. This enables the design of subnanosecond threshold switching circuits with standard logic-gate output levels to be simply achieved. The switching speed of the tunnel diode under these circuit conditions can be calculated, and suitable graphs are given.

NOR and NAND operators in Boolean algebra applied to switching circuit design

NOR and NAND operators in Boolean algebra applied to switching circuit design

Techniques for the optimal design and synthesis of switching circuits

The variational approach to the optimal design of high-speed switching circuits is explored. The approach implements the variational calculus to obtain an expression for the vector sensitivity of a scalar performance function (e.g., delay, or switching time) to changes in the vector of design parameters. Gradient methods are established for using the vector sensitivity to iteratively update the parameter vector and obtain an optimal design. It is shown that the variational approach retains, typically, an M-fold computational advantage over conventional step-and-repeat methods in determining the sensitivity of a scalar performance function to M design parameters. The approach is shown to be well adapted for incorporation into package analysis programs with matrix formulations, and vested with sufficient generality to be applicable to a wide range of switching circuit problems (e.g., low-power or large-scale integrated circuits). It is further shown that subsumed in the general class of nonlinear parameter-value synthesis problems is the class of delay-minimization problems, and that the switching time minimization problem is a special case of the classical time-optimal problem.

Iterative synthesis of threshold functions

Iterative procedure for determining linear separability of Boolean function and threshold functions for logical switching circuit design

A Prewired Storage Unit

A flexible and economical form of prewired semi-permanent storage with a capacity of 4096 words of 40 bits is described. A cycle time of 1 μsec can be readily achieved. The information is prepared by threading wires onto plates which are then placed over an array of ferrite rods. The sense in which a wire passes around the rod determines whether a current pulse in the wire will induce a positive or negative voltage in an output winding wound around the rod. Eight plates, each with 512 words, can be used. The plates can be removed from the store, allowing the information held in the store to be changed quickly and easily. The application of this form of storage to the design of sequential switching circuits is briefly discussed.

Functional Decomposition and Switching Circuit Design

Previous article Next article Functional Decomposition and Switching Circuit DesignRichard M. KarpRichard M. Karphttps://doi.org/10.1137/0111022PDFBibTexSections ToolsAdd to favoritesExport CitationTrack CitationsEmail SectionsAbout[1] R. L. Ashenhurst, The decomposition of switching functions, Ann. Comput. Lab. Harvard Univ., 30 (1959), 0201.48601 Google Scholar[2] Arthur W. Burks, , Robert McNaughton, , Carl H. Pollmar, , Don W. Warren and , Jesse B. Wright, Complete decoding nets: general theory and minimality, J. Soc. Indust. Appl. Math., 2 (1954), 201–243 10.1137/0102014 MR0069770 LinkGoogle Scholar[3] S. Caldwell, Switching Circuits and Logical Design, John Wiley and Sons, New York, 1961 Google Scholar[4] H. Allen Curtis, A functional canonical form, J. Assoc. Comput. Mach., 6 (1959), 245–258 MR0141566 0092.13302 CrossrefISIGoogle Scholar[5] H. Allen Curtis, A generalized tree circuit, J. Assoc. Comput. Mach., 8 (1961), 484–496 MR0143678 0103.34603 CrossrefGoogle Scholar[6] H. A. Curtis, A New Approach to the Design of Switching Circuits, Van Nostrand, Princeton, 1962 Google Scholar[7] E. N. Gilbert, Lattice theoretic properties of frontal switching functions, J. Math. Physics, 33 (1954), 57–67 MR0062650 0055.20109 CrossrefISIGoogle Scholar[8] R. M. Karp, Minimization of cryotron transfer trees, IBM Internal Memorandum, SR-1.44, 1960 Google Scholar[9] R. M. Karp, , F. E. Mcfarlin, , J. P. Both and , J. R. Wilts, A computer program for the synthesis of combinational switching circuits, Proc. Second Annual Symposium on Switching Circuit Theory and Logical Design, A.I.E.E., 1961 Google Scholar[10] D. Muller, Complexity in electronic switching circuits, Trans. I.R.E., EC-5 (), Google Scholar[11] G. N. Povarov, On functional separability of Boolean functions, Doklady Akad. Nauk SSSR (N.S.), 94 (1954), 801–803 MR0063350 Google Scholar[12] G. N. Povarov, A mathematical theory for the synthesis of networks with one input and k outputs, Ann. Comput. Lab. Harvard Univ., 30 (1959), 0201.33403 Google Scholar[13] John Riordan, An introduction to combinatorial analysis, Wiley Publications in Mathematical Statistics, John Wiley & Sons Inc., New York, 1958xi+244 MR0096594 0078.00805 Google Scholar[14] V. Roginsbij, A graphical method for the synthesis of multi-terminal contact networks, Ann. Comput. Lab. Harvard Univ., 30 (1959), Google Scholar[15] J. Paul Roth, Minimization over Boolean trees, IBM J. Res. Develop., 4 (1960), 543–558 MR0141538 CrossrefISIGoogle Scholar[16] J. Paul Roth and , E. G. Wagner, Algebraic topological methods for the synthesis of switching systems. III. Minimization of nonsingular Boolean trees, IBM J. Res. Develop, 3 (1959), 326–344 MR0114693 CrossrefISIGoogle Scholar[17] J. Paul Roth and , R. M. Karp, Minimization over Boolean graphs, IBM J. Res. Develop., 6 (1962), 227–238 MR0141565 CrossrefISIGoogle Scholar[18] Warren L. Semon, Characteristic numbers and their use in the decomposition of switching functions, Proceedings of the Association for Computing Machinery, Pittsburgh, 1952, Richard Rimbach Associates, Pittsburgh, Pa., 1952, 273–280 MR0057028 Google Scholar[19] Claude E. Shannon, The synthesis of two-terminal switching circuits, Bell System Tech. J., 28 (1949), 59–98 MR0029860 CrossrefISIGoogle Scholar[20] R. A. Short, A theory of relations between sequential and combinational realizations of switching functions, Technical Report, 098-1, Stanford Electronics Laboratories, 1960 Google Scholar[21] T. Singer, The decomposition chart as a theoretical aid, Report, BL-4, Harvard Comput. Lab., 1953, 1–28 Google Scholar[22] T. Singer, Some uses of truth tables, Ann. Comput. Lab. Harvard Univ., 30 (1959), 0136.13602 Google Scholar[23] E. H. Sussenguth, An algorithm for automatic design of logical cryogenic circuits, Trans. I.R.E., EC-10 (1962), Google Scholar[24] R. O. Winder, Single stage threshold logic, First Annual Symposium on Switching Circuit Theory and Logical Design, A.I.E.E., 1960 Google Scholar Previous article Next article FiguresRelatedReferencesCited byDetails Dynamic Programming is Optimal for Nonserial Optimization ProblemsArnon Rosenthal31 July 2006 | SIAM Journal on Computing, Vol. 11, No. 1AbstractPDF (1671 KB) Volume 11, Issue 2| 1963Journal of the Society for Industrial and Applied Mathematics History Submitted:18 April 1962Published online:13 July 2006 InformationCopyright © 1963 Society for Industrial and Applied MathematicsPDF Download Article & Publication DataArticle DOI:10.1137/0111022Article page range:pp. 291-335ISSN (print):0368-4245ISSN (online):2168-3484Publisher:Society for Industrial and Applied Mathematics

A new approach to the design of switching circuits

A new approach to the design of switching circuits

Minimization Over Boolean Graphs

This paper presents a systematic procedure for the design of gate-type combinational switching circuits without directed loops. Each such circuit (Boolean graph) is in correspondence with a sequence of decompositions of the Boolean function which it realizes. A general approach to functional decomposition is given and, in terms of a convenient positional representation, efficient tests for the detection of decompositions are derived. These results are employed in the development of an alphabetic search procedure for determining minimum-cost Boolean graphs which satisfy any given design specifications.

Nuclear Protective System Design for Reliability

With respect to three developments (the widespread use of solid state components as active circuit elements, the acknowledgment that the electronic protective system problem was a switching circuit and logic design problem, and the desire to reduce the probability of reactor shutdown to instrument failures and introduce the two of three coincidence or majority decision concept) system design concepts for reliability enhancement are provided, and system building blocks for a practical realization of these concepts are presented. Although the ideas presented are pointed toward nuclear reactor protective systems, it is felt that the same approaches can be applied to general systems design. (P.C.H.)

On the Application of the Base Charge Concept to the Design of Transistor Switching Circuits

This paper describes a new method of measuring the effective decay time of excess minority carriers in the base of junction transistors, the results of which show an approximately exponential decay with time. The relation between the decay-time constant and the normal and inverse transistor parameters is discussed, and it is shown how the experimental measurements can be directly applied to the design of transistor pulse circuits. Using the Ebers and Moll equivalent circuit for a saturated transistor, an analysis is made of the effect on the charge storage caused by the passage of a collector current when the base connection is open circuit. The case of a transient collector current is also examined, and it is concluded that for typical alloy junction transistors the passage of a collector current plays little part in determining the charge storage. Thus, the storage time with open-circuit base is determined by the initial excess charge, the collector current existing when the transistor enters the active region, and the decay time constant for minority carriers. A simple equivalent circuit for determining the decay of stored charge when a reverse base current is applied is also discussed.

The numerical-graphical method in the design of multiterminal switching circuits

Up to the present time there has been no satisfactory direct method for designing multiterminal switching circuits. A common approach is to consider each output individually and derive a 2-terminal network for it. An attempt is then made to change the form of the individual 2-terminal networks, if possible, so that combinations between paths may be facilitated. This may be done, for example, by algebraic manipulation of the switching functions describing the 2-terminal networks. Extreme care must be taken in any case so that the individual outputs remain disjunctive.

On an Application of Dynamic Programming to the Synthesis of Logical Systems

In this paper we wish to initiate the study of the application of dynamic programming to the domain of problems arising in the synthesis of logical systems. In a number of fields one encounters the problem of converting a system in one state into another state in a most efficient fashion—in mathematical economics, in the theory of control processes, in network theory, and in trajectory processes. Here we wish to consider a type of question which arises in the design of computers and switching circuits. We shall first treat the problem in general terms, and then consider a special example to illustrate the methods.

New methods of simplifying Boolean functions

ECONOMY IS ONE of the most important considerations in the design of any system. Maximum savings can be achieved in the design of switching circuits by performing the desired logic in the simplest minimum form applicable to the equipment utilized. Boolean algebra is often used to express the functions of switching circuits and these Boolean expressions generally appear in the final form of a sum of products or a product of sums. The form that presents the most economical application is determined by the equipment. It is therefore necessary to be able to transform and simplify Boolean functions so that they will appear in the predetermined form that will yield the maximum savings.

Application of Boolean Algebra to the Design of Switching Circuits

AbstractApplication of Boolean algebra to the logical design of switching circuits is discussed. It is pointed out that for the design of a circuit requiring the minimum number of elements the Boolean function must be minimized by either an algebraic or a graphical method. A graphical method developed at the Institute of Mathematical Machines, Czechoslovakia, for minimizing a Boolean function is described.

The measurement of transistor transient switching parameters

New parameters for use in the design of switching circuits are defined. These parameters relate the charge in the base region of the transistor to the terminal currents at given collector-base voltages.The relation of these parameters to small-signal parameters and rise-and-fall times is summarized, and methods of measurement using either normal small-signal techniques or transient techniques are described and discussed. The transient tests involve driving the transistor in the common-emitter configuration, through a parallel RC coupling circuit, by means of a square-wave generator. Under certain conditions the coupling capacitances and resistances yield values of the switching parameters.