Ethernet Switch Research Articles

A Versatile Readout System for Small to Medium Scale Gaseous and Silicon Detectors

This paper presents the design and performance of a readout system for gaseous and silicon detectors built for the Minos nuclear physics experiment. A major constraint was to provide a multi-thousand channel, high performance readout system with low manpower effort and tight cost. This was achieved by the re-use of some earlier ASIC and front-end card (FEC) developments, the design of a new digital readout card, called the Feminos, and the use of commercial off-the-shelf components. The proposed system fully exploits the capability of the existing 72-channel AFTER chip designed for the T2K experiment and allows seamless migration to the 64-channel AGET chip, a pin-compatible evolution under production by the GET collaboration. The Feminos is a low complexity card designed to read out a FEC equipped with four AFTER chips (T2K model) or a newly assembled FEC populated with four AGET chips. The trigger clock module (TCM) is a synchronization board that allows system scaling up to 6912 channels with 24 Feminos and FECs, a commercial Gigabit Ethernet switch, and a data acquisition PC. The design of the Feminos hardware, firmware and embedded software are detailed and it is explained how high performance, rapid development and low cost were reached. System operation and data acquisition throughput scaling with multiple Feminos are investigated.

Using OPNET to Model and Evaluate the MU Performance based on IEC 61850-9-2LE

The growth of IEC61850-9-2 process bus as a high data rate communication network have a great improved the capability of substation automation system (SAS). This paper discuss a modelling concept of intelligent electronic devices (IED) using OPNET modeller simulation tool. Simulation tool provides a comprehensive development environment for the specification modelling, system simulation and also facilitate performance evaluation of the system under study with different topologies that guide the SAS network engineers based on planning and design. Several testing has been made based on the modelled merging unit (MU) IED within two scenarios. The behaviour of the Ethernet switches with the sampled value (SV) traffic stream has been discussed within the first scenario. It shows that the first Ethernet switch experienced more latency than the subsequent switches based on it serialized the bunched SV frames whereas the subsequent switches experienced less latency in which that may facilitate the design of the large SAS that consist more than one Ethernet switch to reduce the cabling between switchyard and control station. SV traffic stream latencies have been evaluated to assess the limits and capacity of the process bus network critical components and shows that the overall of the 19 MUs latency is within the acceptable latency range (250μs). However based on adding MUs 20-23 the latency has been increased significantly within scenario two.

Source-Timed SDN Video Switching of Packetized Video

The broadcast industry is considering a move from serial digital interface (SDI) infrastructure to a computer-networked infrastructure. Professional media networking will enhance flexibility and agility of the broadcast plant, reduce and simplify cabling, provide for format-agnostic transport, and allow media organizations to benefit from the economies of scale of commercial off-the-shelf (COTS) networking hardware. One key element of video processing is synchronous (“clean”) switching between video sources. The accuracy of the switch point recommended by SMPTE Recommended Practice (RP) 168 is on the order of 10 μs. Unfortunately, the current speed of networking switch flow rule changes using software-defined networking (SDN) is on the order of 1 to 10 ms, and the speed of rule changes is not highly deterministic. To solve this problem, source-timed video switching separates the actions of updating SDN flow rules from the timing of the actual video switch. This technique first adds new SDN flow rules to the networking switch that match a packet header value that is not currently being transmitted. Then, the video source changes its output's packet header value to the new value in the flow rule at the precise RP 168 video switch point. The new packet header value matches the new flow rules; thus, the effect of these two steps achieves precisely timed synchronous video switching (which can be compared with the actions of “preview” and “take” on a video switcher). Fox has developed a proof-of-concept of source-timed video switching using live high-definition SDI sources packetized using SMPTE 2022-6 and synchronously switched on a COTS 10 Gbit/sec Ethernet switch.

Traffic load-based LPI control mechanism in ethernet access network

IEEE802.3az working group has recommended LPI based Energy Efficient Ethernet standard in order to efficiently reduce unnecessary waste of energy that might occur while there is no data to be transmitted. This paper proposes an enhanced LPI control mechanism to improve energy efficiency between terminal equipment and Ethernet switch in an EEE environment. The proposed mechanism measures the amount of traffic coming to the terminal during specific period of time. According to the measured traffic amount, ON and OFF duration for the following basic cycle will be decided. The performance evaluation results indicate that the suggested mechanism improves the overall performance in a way of significant reduction of energy consumption while it maintains an average packet delay to similar levels compared to the traditional method.

HP-DAEMON: High Performance Distributed Adaptive Energy-efficient Matrix-multiplicatiON

The demands of improving energy efficiency for high performance scientific applications arise crucially nowadays. Software-controlled hardware solutions directed by Dynamic Voltage and Frequency Scaling (DVFS) have shown their effectiveness extensively. Although DVFS is beneficial to green computing, introducing DVFS itself can incur non-negligible overhead, if there exist a large number of frequency switches issued by DVFS. In this paper, we propose a strategy to achieve the optimal energy savings for distributed matrix multiplication via algorithmically trading more computation and communication at a time adaptively with user-specified memory costs for less DVFS switches, which saves 7.5% more energy on average than a classic strategy. Moreover, we leverage a high performance communication scheme for fully exploiting network bandwidth via pipeline broadcast. Overall, the integrated approach achieves substantial energy savings (up to 51.4%) and performance gain (28.6% on average) compared to ScaLAPACK pdgemm() on a cluster with an Ethernet switch, and outperforms ScaLAPACK and DPLASMA pdgemm() respectively by 33.3% and 32.7% on average on a cluster with an Infiniband switch.

Providing Infrastructure Functions for Virtual Networks by Applying Node Plug-in Architecture

Although nodes in a network-virtualization infrastructure, which is called a virtualization node, usually contain a switch or a router with sophisticated and high-performance functions such as Ethernet switching, VLAN, and IP routing, most of such infrastructure functions cannot be reused as program components by slices. Accordingly, a method for providing such functions to slices on a virtualization node (VNode) infrastructure, by applying the previously proposed plug-in architecture, is proposed. This architecture defines two types of plug-ins, i.e., control plug-ins and data plug-ins, and interfaces for them. As for the proposed method, the switch or router in the VNode is regarded as a data plug-in, and a control plug-in that allocates and isolates the switch/router resources was developed. The data plug-in interface was customized to handle a data plug-in, i.e., a layer-3 switch in a VNode, and a control plug-in and the interfaces for providing layer-3/VLAN switch functions to slices were designed, implemented, and evaluated. The evaluation result shows that instead of specifying a routing/switching program or method, specifying only an additional 8 to 25 lines in a slice definition enables slice developers to use routing and switching functions.

Delay analysis of networked control systems based on 100 M switched Ethernet.

For the delay may degrade the performance of networked control systems, networked control systems based on 100 M switched Ethernet are proposed in this paper. According to the working principle of Ethernet switch, the formulas of the upper bound delay of the single-level switched Ethernet and the multiple-level switched Ethernet are deduced by the timing diagram method, and the values of the upper bound delay are also given. The key factors that influence the upper bound delay of switched Ethernet are analyzed; then, the characteristics of the upper bound delay are presented, which show that the delay induced by the single-level 100 M switched Ethernet has little effect on the performance of control systems, while the delay induced by the multiple-level 100 M switched Ethernet may meet the time requirements of all classes of control systems if the numbers of levels and the numbers of nodes connecting to switches are set properly. Finally, the performance of networked control systems is simulated by TrueTime, and the results further show the feasibility and superiority of 100 M switched Ethernet based networked control systems without modification of the network protocols.

Synchronizing Adaptive LPI Control Mechanism for Improving Energy Efficiency in Ethernet Switch

Ethernet is one of the most widely-deployed and utilized local-loop networking technology across the world, and IEEE 802.3az working group has confirmed EEE(Energy Efficient Ethernet) standard proposal based on LPI (Low Power Idle) mode. This paper suggests Synchronizing Adaptive LPI Control Mechanism in a bid to improve the energy efficiency between interfacing terminals on Ethernet network and the Ethernet switches. This mechanism determines ON and OFF durations of consecutive cycles based on the measured incoming traffic quantities from the terminals. It keeps transferring cycle information which is the most proximate to the traffic bursting cycles while resting in idle is left to LPI mode by conveying the corresponding information to the switch. This paper conducts the performance evaluations with simulations on Poisson distribution traffic and burst traffic. The result has shown that the suggested mechanism in this paper improves the overall performance by reducing the energy consumption rate compared to the existing mechanism, keeping the average packet delay to the similar state as before.

Behaviour Evaluation of GOOSE Message Traffic between Power Substations: A POTT Scheme Case Study

The aim of this paper is to evaluate the behaviour of GOOSE message traffic between two power substations using Ethernet technologies for POTT (permissive overreaching transfer trip) schemes. Moreover, a loss of messages between publisher and subscriber is closely monitored. Two main operation scenarios were defined and for each one of them some parameter variation took place, such as traffic intensity, as well as logical changes. Taking this into account, a practical laboratory was set up in order to carry out these experiments. This practical apparatus mainly consists of three digital relays, Ethernet switches, media converters, IBM personal computers, 20 km fibre optic cable, as well as support software. The results have been shown that the GOOSE messages can be applied for inter-substation communication, delivering a transfer time around 4.4 ms. Besides, traffic condition and switch configuration can heavily influence the time behaviour and loss of GOOSE messages used for POTT schemes in power systems.

Thermal Management of Ethernet Switch Box

In this study, thermal analysis for the design of a complex electronic enclosure, Ethernet switch box is designed. The Ethernet Switch in iDEN EBTS (integrated Digital Enhanced Network Enhanced Base Transceiver System) is required for deployment of quad two way BR (Base Radio). Most of the devices in the base case are above the allowable temperature limit without any air vents and heat enhancing devices. Hence suggested to provide heat sink that enhances heat transfer on the critical components and operating well below the allowable temperature. In this paper, the investigations are carried for the improvement of device performance with the help of heat sink and side vents on the enclosure that increases the heat transfer. The complete analysis is carried out with commercial CFD (Computational Fluid Dynamics) software, Fluent V 6.1.22.Keywords: BR - Base Radio, CFD - Computational Fluid Dynamics, PCB - Printed Circuit Board, IC - Integrated Circuit, FR4 - Fire Retardant 4 Grade, BCM - Bus Converter Module.

Study on IGMP for PLC in Intelligent Manufacturing System

This paper discusses a new solution for IGMP (Internet Group Management Protocol) for PLC (Programmable Logic Controller) in intelligent manufacturing system. It is based on the study of a new PLC design with an Ethernet switch device 88E6165 embedded in it. The switch passes IGMP traffic from the external switch ports to the CPU (Central Processing Unit) for snooping and forwarding via the CPU Ethernet interface. The architecture of multi hosts in the intelligent manufacturing system is given in the paper. The use case(s), actors and process are also analyzed to perform the switch operations with IGMP. This process uses a switch manager to perform a manager role to periodically query all devices in the subnet and subsequently. It causes devices to re-join the multicast group of listeners for any stream in which they may be interested.

Design and Implementation of Supporting IEEE1588 Industrial Ethernet Switch

Aiming at the reliability of real-time industrial Ethernet, the L2 Industrial Ethernet switch is designed using VSC7429. With the respect of real-time capacity, it is based on the IEEE1588 standard by adding logic modules between MAC £ ̈Medium Access Control£© layer and PHY £ ̈physical£© layer to process the clock stamp. It eliminates the delay and uncertainty of the protocol stack and provides the accurate synchronous clock. In terms of reliability, dual hot backup power supplies were applied. Owing to the harsh environment of the industrial field, the EMC (Electro Magnetic Compatibility) protection design was considered. The performance of the switch was tested including packet loss rate and bit error rate. Experimental results showed it met the requirement of industrial Ethernet standard.

A New Smart Substation Structure with Single Net and Single Equipment

a new generation of single equipment and single network structure of intelligent substation is proposed in this paper on the basis of the current three layers two network smart substation, the key technology of this kind of new intelligent substation needs are also proposed in this paper, such as port mirroring, VLANs and IEEE1588. Examples of key technologies are presented,using industrial Ethernet switch, providing reference for engineering applications of new smart substation .

Application of Thermal Design Method for Industrial Ethernet Switch

With the rapid development of electronic technology, the integrations of chips and modules become much more complex. Various types of communication equipment with more functions which make the heat of the device to increasingly become a problem. High temperatures may seriously affect the validity and reliability of electronic equipment and components. In order to dissipate the heat to the ultimate sink, thermal design need to design low thermal resistance paths both inside the electronic device and between the electronic device and the external environment. Industrial Ethernet switch runs in harsh environment, and the reliability, stability, security, environmental adaptability requirements higher than that of commercial Ethernet switches, these require a higher standard thermal design.

Switch Technology in Intelligent Substation

As the technology of intelligent substation is developed gradually, the significance of he Ethernet switch in the substation is obvious increasingly.Firstly, the learning and transmitting principle of Ethernet frame are introduced, then the network program of secondary system using the switch in the hierarchial structure is described. And then a detailed analysis of the VLAN, QoS, mirror and ring network is given, also the various technical application scheme are provided according to a variety of IED features and data flow characteristics. On the basis of the different business needs and different message types, the reasonable design of network topology and the flexible use of these switching technology , can support security, stability, reliable transmission of communication message in intelligent substation , therefore the whole substation becomes more strong.

BigStation

Multi-user multiple-input multiple-output (MU-MIMO) is the latest communication technology that promises to linearly increase the wireless capacity by deploying more antennas on access points (APs). However, the large number of MIMO antennas will generate a huge amount of digital signal samples in real time. This imposes a grand challenge on the AP design by multiplying the computation and the I/O requirements to process the digital samples. This paper presents BigStation, a scalable architecture that enables realtime signal processing in large-scale MIMO systems which may have tens or hundreds of antennas. Our strategy to scale is to extensively parallelize the MU-MIMO processing on many simple and low-cost commodity computing devices. Our design can incrementally support more antennas by proportionally adding more computing devices. To reduce the overall processing latency, which is a critical constraint for wireless communication, we parallelize the MU-MIMO processing with a distributed pipeline based on its computation and communication patterns. At each stage of the pipeline, we further use data partitioning and computation partitioning to increase the processing speed. As a proof of concept, we have built a BigStation prototype based on commodity PC servers and standard Ethernet switches. Our prototype employs 15 PC servers and can support real-time processing of 12 software radio antennas. Our results show that the BigStation architecture is able to scale to tens to hundreds of antennas. With 12 antennas, our BigStation prototype can increase wireless capacity by 6.8x with a low mean processing delay of 860μs. While this latency is not yet low enough for the 802.11 MAC, it already satisfies the real-time requirements of many existing wireless standards, e.g., LTE and WCDMA.

Performance Analysis of IEC 61850 Sampled Value Process Bus Networks

Process bus networks are the next stage in the evolution of substation design, bringing digital technology to the high-voltage switchyard. Benefits of process buses include facilitating the use of nonconventional instrument transformers, improved disturbance recording and phasor measurement, and the removal of costly, and potentially hazardous, copper cabling from substation switchyards and control rooms. This paper examines the role a process bus plays in an IEC 61850-based substation automation system. Measurements taken from a process bus substation are used to develop an understanding of the network characteristics of “whole of substation” process buses. The concept of “coherent transmission” is presented, and the impact of this on Ethernet switches is examined. Experiments based on substation observations are used to investigate in detail the behavior of Ethernet switches with sampled value traffic. Test methods that can be used to assess the adequacy of a network are proposed, and examples of the application and interpretation of these tests are provided. Once sampled value frames are queued by an Ethernet switch, the additional delay incurred by subsequent switches is minimal, and this allows their use in switchyards to further reduce communications cabling, without significantly impacting operation. The performance and reliability of a process bus network operating close to the theoretical maximum number of digital sampling units (merging units or electronic instrument transformers) was investigated with networking equipment from several vendors and has been demonstrated to be acceptable.

Thermal Management of Ethernet Switch Box

In this study, thermal analysis for the design of a complex electronic enclosure, Ethernet switch box is designed. The Ethernet Switch in iDEN EBTS (integrated Digital Enhanced Network Enhanced Base Transceiver System) is required for deployment of quad two way BR (Base Radio). Most of the devices in the base case are above the allowable temperature limit without any air vents and heat enhancing devices. Hence suggested to provide heat sink that enhances heat transfer on the critical components and operating well below the allowable temperature. In this paper, the investigations are carried for the improvement of device performance with the help of heat sink and side vents on the enclosure that increases the heat transfer. The complete analysis is carried out with commercial CFD (Computational Fluid Dynamics) software, Fluent V 6.1.22.

A scheduling and synchronization technique for RAPIEnet switches using edge-coloring of conflict multigraphs

In this paper, we present a technique for obtaining conflict-free schedules for real-time automation protocol for industrial Ethernet (RAPIEnet) switches. Mathematical model of the switch is obtained using graph theory. Initially network traffic entry and exit parts in a single RAPIEnet switch are identified, so that a bipartite conflict graph can be constructed. The obtained conflict graph is transformed to three kinds of matrices to be used as inputs for our simulation model, and selection of any of the matrix forms is application-specific. A greedy edge-coloring algorithm is used to schedule the network traffic and to solve the minimum coloring problem. After scheduling, empty slots are identified for forwarding the non real-time traffic of asynchronous devices. Finally, an algorithm for synchronizing the schedules of adjacent switches is proposed using edge-contraction and minors. All simulations were carried out using Matlab.

Towards a bipartite graph modeling of the internet topology

Modeling the properties of the Internet topology aims at generating large scale artificial IP networks that mimic properties of real ones for simulation purposes. Current models typically consider the Internet as a simple graph where edges are point-to-point connections between routers. This approach does not take into account point-to-multipoint connections that exist at lower layers in the network, e.g. layer-2 clouds, such as Ethernet switches or MPLS networks. Instead, such physical point-to-multipoint connections are modeled as several logical IP level point-to-point connections.In this paper, we rely on recent developments in topology discovery based on IGMP probing that allows for revealing part of the network’s layer-2 structure. We take advantage of this additional knowledge for proposing an Internet model based on bipartite graphs considering both point-to-point and point-to-multipoint connections. Our model remains simple: it only takes as input the node degree sequence for both layer-2 and layer-3 nodes, randomly generates a bipartite graph respecting those distributions, and then derives the corresponding layer-3 topology. We show that, despite the simplicity of our model, realistic network properties, such as high local density, emerge naturally. This is in contrast with the now common belief that such properties can only appear with more intricate models or if explicitly injected in random models. Besides, we also provide evidences of how the analysis performed at the bipartite level might shed light on important properties of the real network structure. Finally, we propose and evaluate a bipartite graph generator based on our model that only takes two synthetic node degree distributions as input.