Switched-capacitor DC-DC Converter Research Articles

Analytical Benchmarking of Direct Hybrid Switched-Capacitor DC-DC Converters

Analytical Benchmarking of Direct Hybrid Switched-Capacitor DC-DC Converters

A Hybrid Switched-Inductor/Switched-Capacitor DC-DC Converter with High Voltage Gain Using a Single Switch for Photovoltaic Application

This paper introduces a new high-step-up, non-isolated switched-inductor switched-capacitor DC-DC converter. The proposed converter remarkably integrates switched-capacitor and switched-inductor cells, leading to a significant increase in voltage gain. This unique composite structure not only ensures the continuity of input current, but also successfully minimizes the current ripple and voltage stress across the components, thereby optimizing efficiency. The standout feature of this converter is its singular switch controlled by pulse-width modulation (PWM), which simplifies its operation. A rigorous steady-state operation analysis is conducted, providing a comprehensive understanding of the converter’s performance. For validating the theoretical findings, the paper also details a real-world prototype of the converter. Comparative studies conducted with other similar structures substantiate the superiority of the proposed converter.

A Regulated 400-mV CMOS DC-DC Converter with On-the-Fly Equivalent Output Resistance Tuning

Energy harvesting is a technology that can be applied to IoT systems to eliminate the need for batteries. Many types of energy sources are available for energy harvesting, such as light, thermal, vibration, and electromagnetic energy. Indoors, where most IoT devices are located, artificial light, such as from LED lamps, can be used for energy harvesting in circuits with very ultra-low power consumption. Integrated switch-capacitor DC-DC converters are required for this type of system to convert the harvested energy into a constant output voltage suitable for powering an electronic circuit. The idea of this work is to use a hysteretic feedback control consisting of comparators and a logic system to adjust the switching frequency and the voltage conversion ratio (VCR) of the converter. With this, the equivalent output resistance is tuned to a value that results in a constant output voltage. A new method for modeling the equivalent output resistance based on charge flow analysis is proposed, which also considers the effects of source resistance. An integrated energy-harvesting system consisting of a switched-capacitor DC-DC converter is implemented to obtain an output voltage of 400 mV using a small photovoltaic cell for energy harvesting from indoor light. The proposed system can power an ultra-low-power device between 20 μW and 40 μW with a minimum input voltage of 230 mV. Electrical simulation results show that the implemented converter can achieve a peak efficiency of 81.24% at an input voltage of 260 mV for a 20 μW load.

Performance Analysis of Z-Network Plus Switched-Capacitor Boost DC-DC Converter

A multi-stage conversion is necessary when a basic DC-DC boost converter (BBC) raises the low voltage of PV panels to a high voltage, which is then used as the dc-link voltage of the inverter. The aim can be achieved with this multi-stage power electronic conversion, but more intermediate converters are needed. Additional converters increase the number of components while also lowering overall efficiency, which lowers reliability. The Z-Source Inverter (ZSI) is a practical alternative that not only carries out single-stage power conversion (boosting plus DC-AC conversion), but also successfully gets rid of the drawbacks of the traditional voltage-source and current-source inverters. Switching Inductor (SL) cells are used in place of the Z-Source Inverter (ZSI) inductors to maximize voltage gain. This device replaces one of the inductors of the QZSI with an SL cell (QZSI). The Z-network combined with Switched-Capacitor Boost DC-DC Converter (ZSCBC) with ANFIS Controller is suggested in this project to achieve high gain for a range of duty ratios. The Z-network plus Switched-Capacitor DC-DC Boost Converters with ANFIS controller developed in MATLAB Simulink and also with PI controller. The dynamic performance of the Z-network plus Switched-Capacitor DC-DC Boost Converters with ANFIS controller is compared with that of PI controller. Keywords: Boost converter, Switched-Capacitor, Quasi-Z Source DC-DC Converter, Z-source Inverter.

A New Approach to Improve the Voltage Conversion Ratio in Topological Switched-Capacitor DC–DC Converters Using Negator Stage

This paper provides a simple yet novel structure to achieve voltage conversion ratio (VCR) that exceeds the theoretical attainable VCR of topological switched-capacitor DC-DC converters (SCC). Typically, the SCC terminals are connected to the input voltage, the output voltage, or the ground reference. The proposed structure in this paper utilizes the ground-connected terminals and instead connecting them to negative input voltage provided by a negator stage. Here, two types of SCC are used as case studies: Series-parallel (SPSC) and Fibonacci (FSC). The model for the proposed structure is constructed and verified experimentally using 3-stage SPSC and FSC. The experimental results are in good agreement with the proposed model with an error of less than 5% in all cases. The VCR obtained from the proposed structure exceeds the theoretical limits of conventional topological structures.

An Auto-Reconfigurable Multi-Output Regulating Switched-Capacitor DC–DC Converter for Wireless Power Reception and Distribution in Multi-Unit Implantable Devices

An automatically reconfigurable switched-capacitor DC-DC converter with multiple regulated outputs is presented for wireless-powered multi-unit implantable medical devices (IMDs). In such devices, the main controller unit is powered wirelessly and provides supply voltages to the circuits of the main unit as well as multiple connected sub-units. The proposed DC-DC converter simultaneously generates two regulated voltages for the main unit and two unregulated voltages for the sub-units, which have on-site low-dropout regulators. The converter consists of i) an input-adaptive DC-DC conversion stage with two switched-capacitor (SC) DC-DC converters in series and ii) a regulating stage. In the DC-DC conversion stage, the proposed converter automatically reconfigures the conversion ratio and connection order of the two SC DC-DC converters and selects the output nodes by load selection switches depending on the input level. Thanks to these adaptive configurations, the proposed converter offers high conversion efficiencies over a wide input voltage range even with fewer flying capacitors required for the reconfigurable conversion ratios. Moreover, the selection switches are reused to regulate the output voltages to desired levels, minimizing the overhead for subsequent regulation. The IC fabricated in a 180-nm standard CMOS process achieves a conversion efficiency of 95.5% for the unregulated voltages and up to 77.4% for the regulated voltages over a wide input range of 1 V to 4 V with 0.74-mV output ripple for a load current of 20 mA, while providing four outputs (2 regulated, 2 unregulated).

Fault-Tolerant Modular Switched-Capacitor DC-DC Converter (MSCC) for Fuel Cells

This study presents a new modular switched-capacitor DC-DC converter (MSCC) which is primarily designed with fault-tolerant capability to promote low-voltage applications such as fuel cells and photovoltaics. The converter can increase a low voltage level to a high voltage level by increasing the number of modules and/or the duty ratio. The proposed topology is modular and has high scalability for a high voltage gain. Another key advantage of the converter is its fault tolerance feature with a minimum change to the duty ratio. The proposed topology is first modeled analytically and then simulated in PSIM software with new control algorithms. The circuit architecture, operating principle, voltage/current stress and fault-tolerant operations are verified by using analytical and simulation methods based on a 200-V voltage supply. Moreover, experiments are also carried out on a low-voltage DC-DC prototype converter for validating the voltage ratio, efficiency and reliability. Test results have proved the effectiveness of the proposed topology under normal and fault conditions (open circuit faults of switches and capacitors). In addition to fuel cells, the developed converter can also be applied to photovoltaics and other low-voltage DC power systems which demand high efficiency, voltage output and high reliability.

Multi-stage switched-inductor switched-capacitor high gain DC-DC converter

ABSTRACT This paper presents a Multi-stage Switch Inductor Switch Capacitor High Gain DC-DC Converter for microgrid application designed with integrated Active Switch Capacitor (ASC) and Active Passive Inductor Cell (APIC). The closed loop control of a proposed voltage lift DC-DC converter is performed to ensure the constant output voltage disregarding the change in input voltage. The new high gain extendable DC-DC boost converter topology is capable of providing high-gain voltage with low duty cycle and it is extendable by increasing the number of APIC network. Analytical modelling of the proposed converter is carried out to obtain the technical specifications. The open loop and closed loop simulation model of the proposed converter is developed in the MATLAB/Simulink environment to analyse the performance of the converter. The microcontroller-based hardware model of the proposed converter of power rated 200 W (18/200 V at 50% duty ratio) is developed and tested in open loop to validate the simulation results and experimental set-up results are reported.

A Fully Integrated, Power-Efficient, 0.07-2.08 mA, High-Voltage Neural Stimulator in a Standard CMOS Process.

This paper presents a fully integrated high-voltage (HV) neural stimulator with on-chip HV generation. It consists of a neural stimulator front-end that delivers stimulation currents up to 2.08 mA with 5 bits resolution and a switched-capacitor DC-DC converter that generates a programmable voltage supply from 4.2 V to 13.2 V with 4 bits resolution. The solution was designed and fabricated in a standard 180 nm 1.8 V/3.3 V CMOS process and occupied an active area of . Circuit-level and block-level techniques, such as a proposed high-compliance voltage cell, have been used for implementing HV circuits in a low-voltage CMOS process. Experimental validation with an electrical model of the electrode–tissue interface showed that (1) the neural stimulator can handle voltage supplies up to 4 times higher than the technology’s nominal supply, (2) residual charge—without passive discharging phase—was below 0.12% for the whole range of stimulation currents, (3) a stimulation current of 2 mA can be delivered with a voltage drop of 0.9 V, and (4) an overall power efficiency of 48% was obtained at maximum stimulation current.

Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter

Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation.

Miniaturized Energy Harvesting Systems Using Switched-Capacitor DC-DC Converters

This tutorial brief reviews highly-integrated switched-capacitor (SC) DC-DC converter topologies for miniaturized energy harvesting (EH) IoT systems. Aiming to provide a concise overview of SC converter-based EH interfaces, we first discuss the system level design considerations for energy balancing between source, storage, and load under different environmental conditions. The key factors dominating the energy extraction and power conversion efficiencies, including the source adaptation strategies and SC power stage intrinsic losses, are outlined to establish a fundamental understanding on the EH system performance. After studying different state-of-the-art SC topologies in terms of their rational boost voltage conversion ratio (VCR) generation flexibility, loss characteristics, and implementation tradeoffs, we further introduce two advanced SC converter-based EH system examples, highlighting the SC converter operation in enhancing the EH system functionality and performance. The pros and cons of different SC converter topologies for EH systems will also be discussed.

Design of a High Efficiency Switched-Capacitor (SC) DC-DC Converter

Portable electronic devices and miniaturized devices would require different operating voltages and load current which can be powered through DC-DC converter. In this paper, the proposed converter is based on a multiple topology of DC-DC converter circuit for more than one voltage gain regions using switched capacitor (SC) method. The post layout implementation showed that the high efficiency networks are achieved with low voltage drop and low internal resistance. The efficiency of 95% and 85% are shown, on the networks in the 1/2 and 2/3 voltage gain regions respectively, proving that this method is advantageous compared to other literature papers.

A Continuously-Scalable-Conversion-Ratio Step-Up/Down SC Energy-Harvesting Interface With MPPT Enabled by Real-Time Power Monitoring With Frequency-Mapped Capacitor DAC

An energy-harvesting interface that incorporates a continuously scalable-conversion-ratio (CSCR) switched-capacitor (SC) dc-dc converter with maximum power point tracking (MPPT) is introduced in this paper. By exploiting unique characteristics of a CSCR SC converter, an MPPT based on the hill climbing algorithm is implemented with a real-time power monitoring scheme with a frequency-mapped sampling capacitor DAC, allowing variation-tolerant MPPT for various types of energy sources. The harvestable voltage range is significantly extended by a step-up/down convertible CSCR SC converter, and the voltage conversion efficiency is further improved with matrix-structured and load-mapped power switches. With the test chip fabricated in 28nm FDSOI technology, the proposed energy harvesting interface shows peak conversion efficiency of 89% and average efficiency of > 80% for 60-2, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$794~\mu \text{W}$ </tex-math></inline-formula> . MPPT efficiency of > 97 % is confirmed with energy harvesting measurement with a solar cell.

A CMOS SoC for Wireless Ultrasonic Power/Data Transfer and SHM Measurements on Structures

This paper describes a highly-integrated CMOS system-on-chip (SoC) for active structural health monitoring (SHM). The chip integrates ultrasonic power and bidirectional half-duplex data transfer, a power management unit (PMU), and an ultrasound transceiver to enable wireless ultrasonically-coupled sensor SHM networks on structures. The PMU includes an active bias-flip rectifier with off-delay compensation, a high-efficiency dual-path DC-DC converter with inductor time-sharing, and five switched-capacitor DC-DC converters to generate multi-level spectrally band-limited pulses for guided-wave SHM. The chip was fabricated in a standard 180 nm process and has a die area of 2 × 2 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Test results show power conversion efficiency (PCE) > 85% for the active rectifier, > 70% for the inductive DC-DC converter, and > 60% for the switched-capacitor DC-DC converters. Output pulses have a peak-to-sidelobe ratio (PSL) > 30 dB and worst-case out-of-band emissions < -30 dB, respectively. The SoC was integrated with a low-power microcontroller and passive components to realize miniaturized (15 mm × 30 mm) wireless SHM nodes. A set of nodes was deployed on an SHM test-bed (carbon fiber reinforced polymer sheet) representing an airframe panel. Tests on this wireless network confirm both long-range ultrasound power/data transfer and the ability to detect structural damage.

MMC Based Hybrid Switched Capacitor DC-DC Converter

Aiming to address the growth and the integration of renewable sources and electronic loads, different types of dc-dc topologies with specific features have been proposed, going from medium frequency isolated Modular Multilevel Converter to Switched Capacitor and Hybrid Switched Capacitor topologies. In this paper, a bidirectional Modular Multilevel Converter based Hybrid Switched Capacitor dc-dc converter is presented, featuring transformerless structure, automatic total arm voltages clamping/balancing, voltage static gain independent of the submodules quantity and efficiency with reduced duty cycle influence. The topology operates with a Quasi-Two-Level modulation, which provides passive components volume/weight reduction, a degree of freedom regarding the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${dv/dt}$</tex-math></inline-formula> applied on the magnetic windings and basis to perform the submodule capacitor voltages equalization within each arm. The topology operating principles are approached by an average value static analysis, while an instant value static analysis is used to estimate the operating current spike worst case. A <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${1.17}$</tex-math></inline-formula> kW, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${350/200}$</tex-math></inline-formula> V laboratory scale prototype using IGBTs is implemented to experimentally confirm the theoretical approaches.

RPOL2V5: a compact radiation-hard resonant switched-capacitor DC-DC converter for the CMS HGCAL

A radiation-tolerant resonant switched-capacitor DC-DC converter (rPOL2V5) has been developed to supply the front-end analog and digital circuits for the detectors used in the LHC High Luminosity upgrades. It has been of particular interest to the CMS High-Granularity Calorimeter (HGCAL) community due to its lower volume compared to existing radiation-hard buck converters. rPOL2V5 is based on an ASIC developed using 130 nm CMOS technology. It is powered by a 2.5 V input and it can supply a maximum current from 2 A to 5 A, depending on the output voltage value, which can range from 1 V to 1.5 V. This work presents the strategies adopted at the ASIC and PCB level to bring the converter to maturity, and its electrical and radiation characterisation results.

Non‐resonant soft‐switching technique with linear current on switching cycle time‐scale for switched‐capacitor DC‐DC converters

The switched-capacitor DC-DC converters have been widely applied to convert energy from low voltage to DC bus for the power generation systems with fuel cells, photovoltaic array, and so on. However, the large capacitance is generally selected to eliminate the high current spike of switched-capacitors in the hard-switching switched-capacitor (SC) DC-DC converters, which will lead to the large volume and weight of capacitors and of converters. To solve this problem, a non-resonant soft-switching (NRSS) technique with linear current on switching cycle time-scale for switched-capacitor DC-DC converters is first proposed in this paper, which achieves zero-current-switching (ZCS) turn-on of switches and ZCS turn-off of diodes with linear current on switching cycle time-scale. In detail, the NRSS technique is proposed based on the idea that the current of an auxiliary inductor on switching cycle time-scale is considered as the linear parts for the resonant current of the auxiliary inductor on resonant cycle time-scale. The proposed NRSS technique is utilized into SC DC-DC converter and the current spikes of switches can be reduced to two third by using the same capacitance compared with the hard-switching SC DC-DC converters and be reduced to a third compared with the resonant soft-switching SC DC-DC converters. Further, nine new soft-switching SC DC-DC converters, with single switch and double switches, are built based on the proposed non-resonant soft-switching technique. Finally, the non-resonant soft-switching technique is verified theoretically and experimentally by three of the nine proposed SC DC-DC converters. This paper provides a new way to realize soft-switching during the non-resonant interval on switching cycle time-scale and a new method to significantly reduce the required capacitance in SC DC-DC converters.

Asymmetrical ZVS-PWM Half-Bridge-Type Switched-Capacitor DC-DC Converter Isolated with Peak Voltage Equal to Vin/2 Switch

This paper presents a new power converter topology generated by the integration of the asymmetrical ZVS-PWM dc-dc converter with a switched-capacitor ladder-type commutation cell. Circuit operation and theoretical analysis with emphasis on the soft-commutation process are included in the paper. The main advantage of the proposed converter with respect to the conventional asymmetrical half-bridge dc-dc converter is the reduction of the voltage stress across the power switches to the half of the input dc bus voltage, enabling the utilization of lower voltage rating components. Experiments conducted on a laboratory prototype with 1.4 kW power-rating, 800 V input voltage, 48 V output voltage and 100 kHz switching frequency are included to verify the theoretical analysis and the design methodology. The maximum efficiency of the experimental non-optimized prototype was 93.6%.

EM Side-Channel Countermeasure for Switched-Capacitor DC–DC Converters Based on Amplitude Modulation

The security of IoT devices is becoming a major concern in industry. Noninvasive side-channel attacks pose a serious threat as they are capable of extracting secret information from distance while using low-cost equipment. In this article, we propose an efficient countermeasure technique against the electromagnetic (EM) side-channel attacks. The technique is applied to switched-capacitor (SC) dc-dc converters and is based on amplitude modulation of the load signal by the converter capacitance that acts as a carrier. We verify the proposed technique by using a reliable evaluation metric that predicts the correlation between the encryption secret key and the attacker's measured signal. The results show that the proposed technique can achieve cross correlation coefficients as low as 0.2, disabling the attacker from extracting the sensitive information. In addition, test vector leakage assessment (TVLA) ρ-test indicates that the number of leaky points for advanced encryption standard (AES) execution drops from 62 for unprotected circuit to zero for the circuit secured by the proposed technique. TVLA t-statistic is decreased by three orders of magnitude in the protected AES execution.

On optimization of manufacturing of a step-down DC-DC converter to increase integration density of elements

&lt;p&gt;We consider possibility to increase field-effect transistor's density in a switched-capacitor step-down DC-DC converter. Based on this approach we analyzed manufacturing of the converter in a heterostructure with special structure. Some specific sections of the heterostructure must be doped by ion implantation or by diffusion. After this procedure optimized annealing has been done. We also obtained conditions for decreasing of mismatch-induced stress value in this heterostructure. An analytical approach for analysis of heat and mass transport in multilayer structures has been introduced. The approach gives a possibility without crosslinking of solutionson interfaces between layers, take into account (i) spatial variation of parameters of considered processes; (ii) temporal variation of parameters of considered processes; (iii) nonlinearity of considered processes; (iv) mismatch-induced stress.&lt;/p&gt;