Switching Fabric Architecture Research Articles

Simultaneous Connections Routing in Wavelength–Space–Wavelength Elastic Optical Switches

In this paper, we investigate the three-stage, wavelength-space-wavelength switching fabric architecture for nodes in elastic optical networks. In general, this switching fabric has r input and output switches with wavelength-converting capabilities and one center-stage space switch that does not change the spectrum used by a connection. This architecture is most commonly denoted by the WSW1 (r, n, k) switching network. We focus on this switching fabric serving simultaneous connection routing. Such routing takes place mostly in synchronous packet networks, where packets for switching arrive at the inputs of a switching network at the same time. Until now, only switching fabrics with up to three inputs and outputs have been extensively investigated. Routing in switching fabrics of greater capacity is estimated based on routing in switches with two or three inputs and outputs. We now improve the results for the switching fabrics with four inputs and outputs and use these results to estimate routing in the switching fabric with an arbitrary number of inputs and outputs. We propose six routing algorithms based on matrix decomposition for simultaneous connection routing. For the proposed routing algorithms, we derive criteria under which they always succeed. The proposed routing algorithms allow the construction of nonblocking switching fabrics with a lower number of wavelength converters and the reduction of the overall switching fabric cost.

Wide-sense nonblocking and blocking converting-space-converting switching node architecture under XsVarSLOT algorithm

In this study, we evaluate the operation of the Converting-Space-Converting switching fabric architecture. The investigated switching fabric is suitable for all kinds of slot-operating switches, no matters the slots are wavelengths, time, or others. The switching fabric is evaluated in terms of the number of slots in the interstage links and the blocking probability. In the evaluation process, we used the proposed class of routing algorithms based on the functional decomposition of slots into subsets. The routing algorithm decomposes the slots in the interstage links into X subsets. The number of slots in each subset is evaluated by simulation, in order to obtain a blocking probability at the value of about 10−8, and analytically, in case the blocking probability is reduced to 0. The proposed algorithm can reduce the required number of slots in the interstage links by almost 84% in the nonblocking switching fabrics. However; when the blocking is acceptable, the proposed routing algorithm can also reduce this number of slots, but only when the values of blocking probability are very low.

Scalable Microring-Based Silicon Clos Switch Fabric With Switch-and-Select Stages

We propose and analyze a scalable microring-based Clos switch fabric architecture constructed with switch-and-select switching stages. A silicon 4 × 4 building block that was designed and fabricated through American Institute for Manufacturing Integrated Photonics is used for the proof-of-principle demonstration of a 16 × 16 Clos switch fabric. By fully blocking the first-order crosstalk, the 4 × 4 device is measured to show a crosstalk ratio in the range of –57 to –48.5 dB, enabling better than –39 dB crosstalk for the 16 × 16 switch. Our study shows that the three-stage Clos design enables up to a factor of 4 in the reduction of the number of switching cells compared to single-stage switch-and-select fabrics. We further explore the design space for both first-order and second-order switching elements using the foundry-validated parameters and how these factors impact the performance and scalability of the three-stage Clos switch. A detailed power penalty map is drawn for Clos switch fabrics with various scales, which reveals that the ultimate key limiting factor is the shuffle insertion loss. An optimized 32-port Clos switch fabric using foundry-enabled parameters is shown to have a less than 10-dB power penalty.

Rearrangeability of Wavelength-Space-Wavelength Switching Fabric Architecture for Elastic Optical Switches

In this paper, we consider the necessary and sufficient rearrangeability conditions for the wavelength-space-wavelength switching fabric, called the WSW2 switching fabric, for elastic optical network nodes. We derive and prove the lower bound of the necessary conditions for such switching fabrics to be rearrangeable. We also show the upper bound of the sufficient conditions for the rearrangeability of the switching fabric with two input and two output switches. For simultaneous connection routing, we propose a routing algorithm that always ends with success in switching fabrics, which fulfill the sufficient conditions. Finally, we extend the proposed algorithm to the switching fabric with $r$ input and $r$ output switches, and we derive the conditions under which this routing algorithm always ends in success. The required number of center-stage switches is significantly lower than that in the strict-sense nonblocking switching fabrics. To our knowledge, the proposed routing algorithm is the first one which ends with success for any connection set, within the provided sufficient conditions.

Rethinking IXPs’ Architecture in the Age of SDN

Software-defined Internet eXchange points (SDXs) are a promising solution to the long-standing limitations and problems of interdomain routing. While the proposed SDX architectures have improved the scalability of the control plane, these solutions have ignored the underlying fabric upon which they should be deployed. In this paper, we present Umbrella , a software-defined interconnection fabric that complements and enhances those architectures. Umbrella is a switching fabric architecture and management approach that improves the overall robustness, limiting control plane dependence, and suitable for the topology of any existing Internet eXchange Point (IXP). We validate Umbrella through a real-world deployment on two production IXPs, TouSIX and NSPIXP-3, and demonstrate its use in practice, sharing our experience of the challenges faced.

Multiphysics Base of Modelling of the MEMS Micromirror and Simulation by Modal Control

This paper presents the introduction of a method for optical design, modelling and simulation of a three-dimensional microelectromechanical system (3D MEMS) based on a photonic cross-connect. The 3D MEMS switch fabric architecture based on highly reactive micromirrors is ideal for switches with large and medium ports of counts. Due to this reason, it is necessary to provide responsive closed-loop control to position the mirrors accurately representing optimization of control by an advantage of the 3D optical MEMS. In optimization of control of 3D MEMS technologies, the position control utilizing an optical feedback is not capable of correcting shocks, vibrations and other instabilities. The forwarded 3D MEMS closed-loop control technology employs integrated position-sensing electronics in a closed-loop control system of a position of micromirrors and maintains stability. Simulation results of modal control represent a chosen position of a micromirror depending on capacity changes between the micromirror and the electrodes. The paper presents closed-loop control, as well as multi-physical modelling and simulation of a double-gimbaled MEMS-based cross-connect. Moreover, the case study including simulation and optimization of micromirror tilting is also given. Possibilities of applying the presented optimization of closed-loop control are straightforward, and they are able to improve dynamic behaviour of micromirrors significantly.

Demonstration of Failure Reconfiguration via Cross-Layer Enabled Optical Switching Fabrics

Growing bandwidth requirements of future Internet applications are driving the potential deployment of all-optical packet switching fabrics in next-generation routers. The switching fabric should be capable of executing a fast reconfiguration of its switching state, allowing for the dynamic management of optical packets and the seamless recovery of the fabric, in the case of IP-layer router failures and cross-layer enabled optical-layer signal degradations. We demonstrate a reconfigurable optical switching fabric architecture that uses a field-programmable gate array control plane. Based on the state of a higher-layer router, the switching fabric supports the correct routing and error-free transmission of 10 × 10-Gb/s wavelength-striped optical packets, with bit-error rates less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> on all payload channels. A power penalty less than 1 dB is shown.

Large Port Count High-Speed Optical Switch Fabric for Use Within Datacenters [Invited

This paper reviews advances in the technology of integrated semiconductor optical amplifier based photonic switch fabrics, with particular emphasis on their suitability for high performance network switches for use within a datacenter. The key requirements for large port count optical switch fabrics are addressed noting the need for switches with substantial port counts. The design options for a 16 × 16 port photonic switch fabric architecture are discussed and the choice of a Clos–tree design is described. The control strategy, based on arbitration and scheduling, for an integrated switch fabric is explained. The detailed design and fabrication of the switch is followed by experimental characterization, showing net optical gain and operation at 10 Gb/s with bit error rates lower than 10−9. Finally improvements to the switch are suggested, which should result in 100 Gb/s per port operation at energy efficiencies of 3 pJ/bit.

The log_2{N-1} Optical Switching Fabrics

In this article, we introduce a new space-division optical switching fabric architecture based on baseline switching networks. The new structure is built from optical switching elements (OSE) 2 × 2, 3 × 3, 2 × 3, and 3 × 2. The new structure is called the log <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> N-1 switching network and consists of fewer numbers of active and passive optical elements than traditional baseline switching networks composed of symmetrical OSEs. In the paper, we investigate space-division multiplane strict-sense and rearrangeable log <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> N-1 nonblocking switching networks and compare these with space-division multiplane baseline switching networks. The new structure has lower cost than other architectures for strict-sense nonblocking (SSNB) conditions and for rearrangeable (RNB) networks with odd number of stages. For RNB networks, when the number of stages is even, the cost of the multiplane log <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> N-1 optical switching network is equal to or higher than traditional networks.

Delayed resource reservation for multicast sessions in labelled optical packet switched networks

Delayed resource reservation for multicast sessions in labelled optical packet switched networks is achieved by the proposed optical switch fabric architecture and corresponding multicast routing scheme. With them, contentions of multicast packets with unicast packets can be avoided and steady data transport pipelines for multicast sessions can be established from the source node to all the destination nodes. Consequently, quality of service for multicast sessions can be guaranteed effectively in labelled optical packet switched networks.

Optical packet switching: A reality check

This paper presents an analysis of the energy consumption in a number of optical switch fabric architectures for optical packet-switched applications and compares them to electronic switch fabrics. Optical packet switching does not appear to offer any substantial power consumption advantages over electronic packet switching. Therefore, there is no compelling case for optical packet switching.

All-optical variable buffering strategies and switch fabric architectures for future all-optical data routers

Future compact and power-efficient all-optical data routers can benefit from versatile all-optical buffering strategies and switch fabric architectures to achieve high performance. This paper reports two novel variable all-optical-buffer-based optical packet switching (OPS) fabric architectures and corresponding all-optical contention resolution schemes designed towards this goal. The combined input-queued-and-output-queued OPS (CIOQ-OPS) architecture incorporating enhanced K-stage output buffer units achieves lowest packet rates with an optimized input and output buffer capacity partition ratio of 0.5, while the multiple-input-queued OPS (MIQ-OPS) architecture achieves the best performance when each input parallel all-optical buffer contains two variable all-optical buffer queues. Simulation results demonstrate that the newly proposed OPS architectures achieve much lower packet loss rates, packet buffering delay, and jitter for a relatively high traffic load level of 0.7. The performance improvement is typically by one or two orders of magnitude compared to the previously reported OPS architectures with all-optical variable delay buffers with a given reasonable all-optical buffer size of 1000 B.

Combined input and output all-optical variable buffered switch architecture for future optical routers

We present a novel optical packet switching fabric architecture incorporating both input single-stage and output multistage all-optical variable delay buffers as combined input and output queues. For a given optical buffer size (1000 B), the proposed architecture, which has combined input and output optical variable buffer queues with optimum partition, achieves packet loss rates (3.4E-5) that are three orders of magnitude lower than the case without the variable buffers and two orders of magnitude lower than the cases with input or output optical queues alone.

Multicast Optical Switch Fabric With Ultrafast Channel Access Based on Heterodyne Receivers

We demonstrate a switch fabric architecture that allows multicasting and broadcasting and record fast channel access in the nanosecond range. The 10-Gb/s receiver modules are based on a heterodyne detection technique, which is tolerant to moderate wavelength drifts of the local oscillator. A gain clipped electrical amplifier is used as rectifier for bandpass signal recovery.

Switch fabric architecture analysis for a scalable bi-directionally reconfigurable IP router

This paper provides an in-depth analysis using six basic router functional requirements, a primary switch fabrics (SFs) selection criterion, and a semi-quantitative compliance scoring scheme for 10 SFs. The goal is to select candidates that can serve a hardware (HW)-wise scalable and bi-directionally reconfigurable Internet Protocol (IP) router. HW scalability and bi-directional HW reconfigurability for an IP router denote respectively its ability to (1) expand according to network traffic capacity growth; and (2) be functionally converted to perform in two conceptual directions on-demand: downward as edge, or upward as hub or backbone router according to the layer of the internet services provider's network hierarchy it is targeted to serve at the moment. Overall result points to Hypercube, Multistage Interconnection Network (MIN), and 3-Dimensional Torus Mesh as potential candidates.

Network Calculus-Based Delay Analysis for QoS Provision in Buffered Crossbar Switch

The buffered crossbar switch employs crossbar-based switching fabric architecture with internal buffers and combined input and output queueing scheme. It is promising to achieve high performance without complex implementation. In this paper, we apply network calculus-based analytical technique to study the delay performance of the buffered crossbar switch. We set up a service curve-based model for the traffic control system of buffered crossbar switch. Based on this model, we develop techniques that can determine the end-to-end service curve guaranteed to a flow of traffic and calculate the packet delay upper bound of this flow. Then we analyze the determining factors of this delay bound performance and the relation between the delay bound and the amount of resources (bandwidth and credits) allocated in the switch to a flow.

PROPOSAL OF A PACKET SWITCH BASED ON PURELY RANDOM ROUTING

A new self-routing packet switching fabric architecture is presented, which avoids the use of electronic logic. This can be obtained by adopting a random routing procedure which can be simply implemented on available photonic devices. The results achieved for a 16 × 16 switching fabric demonstrate that either multicast or point-to-point traffic can be handled by the proposed switch indifferently.

A growable ATM switching fabric architecture

A growable ATM or fast packet switching fabric architecture is proposed. The fabric has a two-sided structure and allows for the modular growth of its size from small to very large number of ports. The fabric is expanded by connecting additional basic fabrics to the existing structure by some interconnecting modules. The expansion process does not disturb the existing cabling. The architecture makes it also possible to adjust the system throughput. The hardware complexity of the new fabric is moderate and is discussed in the paper. Some important implementation issues such as the physical design and reliability are also presented in the paper.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Blocking in digital cross-connect systems

A background discussion of blocking in space switch fabric architectures is presented. The analysis of blocking during broadcasting is discussed, followed by an explanation of the results of the analysis. Conclusions and some possible solutions to blocking during broadcasting are presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A survey of modern high-performance switching techniques

A survey of high-performance switch fabric architectures which incorporate fast packet switching as their underlying switching technique to handle various traffic types is presented. A descriptive overview of the major activities in this rapidly evolving field of telecommunications is given. The switch fabrics are classified into the following categories: banyan and buffered banyan-based fabrics, sort-banyan-based fabrics fabrics with disjoint-path topology and output queuing, crossbar-based fabrics, time division fabrics with common packet memory, and fabrics with shared medium. >