Surface Roughness Limited Mobility Research Articles

Hall effect mobility in inversion layer of 4H-SiC MOSFETs with a thermally grown gate oxide

The inversion layer mobility of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) with a thermally grown gate oxide was investigated using Hall effect measurements. To clarify the fundamental scattering properties of inversion layer mobility in SiO2/4H-SiC systems, we examined the effects of nitridation treatment after thermal oxidation and the gate oxide thickness on Hall effect mobility (μHall) in the inversion layer of 4H-SiC MOSFETs. The effect of nitridation treatment after thermal oxidation on phonon-limited mobility (μphonon) was investigated by using a p-type well region with an epitaxial layer with extremely low acceptor concentration (NA). It was found that nitridation treatment had little effect on μphonon for gate oxide thicknesses of 5 nm and 50 nm. The carrier transport properties were experimentally evaluated from the viewpoint of the effects of gate oxide thickness and nitridation treatment after thermal oxidation. Here, we used samples with a moderate NA of 1 × 1016 cm−3, which enabled us to distinguish μphonon, Coulomb-limited mobility (μCoulomb) and surface roughness-limited mobility (μSR). It was found that thermally grown SiO2/4H-SiC systems have the common feature that the dominant scattering components in the inversion layer are phonon scattering and Coulomb scattering and not surface roughness scattering at room temperature within the measured effective normal field (Eeff).

A new formulation for surface roughness limited mobility in bulk and ultra-thin-body metal–oxide–semiconductor transistors

This paper presents a new model for the surface roughness (SR) limited mobility in MOS transistors. The model is suitable for bulk and thin body devices and explicitly takes into account the non linear relation between the displacement Δ of the interface position and the SR scattering matrix elements, which is found to significantly influence the r.m.s value (Δrms) of the interface roughness that is necessary to reproduce SR-limited mobility measurements. In particular, comparison with experimental mobility for bulk Si MOSFETs shows that with the new SR scattering model a good agreement with measured mobility can be obtained with Δrms values of about 0.2 nm, which is in good agreement with several AFM and TEM measurements. For thin body III–V MOSFETs, the proposed model predicts a weaker mobility degradation at small well thicknesses (Tw), compared to the Tw6 behavior observed in Si extremely thin body devices.

Physical Origins of High Normal Field Mobility Degradation in Ge p- and n-MOSFETs With GeO x /Ge MOS Interfaces Fabricated by Plasma Postoxidation

Mechanisms of the mobility degradation in high normal field (or Ns) in Ge pand n-metal-oxide-semiconductor field-effect transistors (MOSFETs) with plasma postoxidation GeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /Ge MOS interfaces: 1) carrier trapping due to surface states; 2) surface roughness scattering; and 3) electron transfer into the Δ valleys with the high effective mass, have been systematically investigated. It is confirmed that the existence of surface states inside the valence band and the conduction band of Ge results in over estimation of the mobile inversion carrier concentration and the rapid reduction of the effective mobility. It is also found that the Hall hole and electron mobility in high N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> region agree well with the theoretical surface roughness limited mobility, indicating that the high N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> mobility in Ge MOSFETs are still significantly limited by surface roughness scattering. On the other hand, any evidence of the carrier repopulation into the subband with low mobility has not been experimentally identified in both Ge pand n-MOSFETs yet.

Surface roughness scattering model for arbitrarily oriented silicon nanowires

We present an extension of the unscreened generalized Prange-Nee term used to calculate the surface roughness (SR) limited mobility in arbitrarily oriented square nanowires. The presence of non-diagonal terms in the effective mass tensor is responsible for an additional term not considered in previous studies. We assess the impact of such a modification on the SR limited mobility and on the total mobility (SR and phonon scattering are considered) for devices with different orientation and size. We show that this impact is more relevant for small devices, where the SR plays an important role, even at low inversion charge.

An Analytic Model for Electron Mobility in Strained Si/Si&lt;sub&gt;1-x&lt;/sub&gt;Ge&lt;sub&gt;x&lt;/sub&gt; nMOSFETs

In order to describe electron transport properties in inversion layer of strained Si/Si1-xGex nMOSFETs, a new analytic electron mobility model is proposed. The model not only takes into account the effect of germanium(Ge) content on phonon scattering-limited mobility and surface roughness-limited mobility, and but also includes the degradation effect of strained Si film thickness and temperature on the device mobility. For various Ge content and a wide range of normal electric field, temperature and strained Si film thickness, the model provides good agreement with the experimental data in references. In addition, the model can be expressed using the analytical expression and can be easily included in the device simulator.

Detailed investigation of effective field, hole mobility and scattering mechanisms in GeOI and Ge pMOSFETs

We present a methodology for accurate calculation of effective electric field in Ge and GeOI (Germanium-on-Insulator) pMOSFETs, based on the experimental determination of the parameter η, linking the inversion charge and the effective field. The fabrication procedure of wafers and devices is described. The novel extraction methodology for η factor has been validated experimentally for both bulk-Ge and fully-depleted (FD) GeOI MOSFETs. A difference in η of 20% has been found between the two structures. This correction has a significant impact on effective mobility analysis for advanced GeOI-based pMOSFETs. Furthermore, the influence of the temperature on η parameter has been investigated. The analysis reveals the behavior of the surface roughness limited mobility, which appears to be independent on T and to vary as a function of E eff - 1 for holes in Ge. An appropriate Coulomb limited mobility modelling is finally proposed, providing relevant information on the interface trap charge in undoped GeOI pMOSFET devices.

Model of electron mobility in inversion layer of strained Si/Si1-xGex n type metal-oxide-semiconductor field-effect transistors

In order to describe the electron mobility enhancement in inversion layer in strained-Si on Si1-xGex n type metal-oxide-semiconductor field-effect transistors (nMOSFETs), a new physically-based electron mobility model is presented in the paper. This model can not only show the dependence of acoustic phonon-limited mobility and surface roughness-limited mobility on transverse electrical field normal to the semiconductor-insulator interface, but also explains the electron mobility enhancement mechanism due to scattering suppression caused by germanium (Ge) content. The expression of the new model is simple and can simulate the mobility for any Ge content. Numerical analysis results show that this model fits the reported experimental data very well. In addition, this model can be easily included in the device simulator ISE and gives good agreement with simulated results of device simulator with built-in model.

Influence of TiN metal gate on Si/SiO2 surface roughness in N and PMOSFETs

In this article, we report the influence of TiN gate on electron and hole channel mobility at low temperatures down to 13K. TiN gate is found to modify the Si/SiO2 surface roughness limited mobility term as compared to Poly-Si gate, leading to a modification of the high field effective mobility behaviour. Interface roughness is shown to be process dependent (CVD vs. MOCVD). An analytical model of surface roughness scattering is used to link our electrical results to morphological roughness parameters.

Explaining the dependences of the hole and electron mobilities in Si inversion layers

In this work the hole surface roughness-limited mobility in Si MOSFETs is investigated. Based on full-band Monte Carlo simulations and on an equivalent relaxation-time numerical model, we show that the differences between hole and electron experimental mobilities are not due to any peculiar physics of the valence band. They can be instead accounted for by a suitable shape of the power spectrum describing the surface roughness. The new power spectrum explains the experimental dependences of both electron and hole mobilities using the same surface roughness parameters. Finally the spatial features of the roughness described by the new spectrum are discussed and compared to those represented by Gaussian and exponential auto-covariance functions.

On surface roughness-limited mobility in highly doped n-MOSFET's

Based on a numerical study of Ando's model for surface roughness scattering, we assess the links between the functional dependencies of the electron surface roughness-limited mobility and the morphology of the interface. The results are summarized in an analytical expression that can be implemented into device simulators. Our results also highlight that as the channel doping increases, the surface roughness-limited mobility features a roll-off in the low effective field region, similar to the one due to the Coulomb-limited mobility. This physical effect is discussed.

An improved electron and hole mobility model for general purpose device simulation

A new, comprehensive, physically-based, semiempirical, local model for transverse-field dependent electron and hole mobility in MOS transistors is presented. In order to accurately predict the measured relationship between the effective mobility and effective electric field over a wide range of substrate doping and bias, we account for the dependence of surface roughness limited mobility on the inversion charge density, in addition to including the effect of coulomb screening of impurities by charge carriers in the bulk mobility term. The result is a single mobility model applicable throughout a generalized device structure that gives good agreement with measured mobility data and measured MOS I-V characteristics over a wide range of substrate doping, channel length, transverse electric field, substrate bias, and temperature.